diff options
Diffstat (limited to 'arch/arm/plat-omap/include/plat/omap-serial.h')
| -rw-r--r-- | arch/arm/plat-omap/include/plat/omap-serial.h | 128 | 
1 files changed, 0 insertions, 128 deletions
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h deleted file mode 100644 index c8dae02f070..00000000000 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Driver for OMAP-UART controller. - * Based on drivers/serial/8250.c - * - * Copyright (C) 2010 Texas Instruments. - * - * Authors: - *	Govindraj R	<govindraj.raja@ti.com> - *	Thara Gopinath	<thara@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef __OMAP_SERIAL_H__ -#define __OMAP_SERIAL_H__ - -#include <linux/serial_core.h> -#include <linux/platform_device.h> - -#include <plat/mux.h> - -#define DRIVER_NAME	"omap-hsuart" - -/* - * Use tty device name as ttyO, [O -> OMAP] - * in bootargs we specify as console=ttyO0 if uart1 - * is used as console uart. - */ -#define OMAP_SERIAL_NAME	"ttyO" - -#define OMAP_MDR1_DISABLE	0x07 -#define OMAP_MDR1_MODE13X	0x03 -#define OMAP_MDR1_MODE16X	0x00 -#define OMAP_MODE13X_SPEED	230400 - -/* - * LCR = 0XBF: Switch to Configuration Mode B. - * In configuration mode b allow access - * to EFR,DLL,DLH. - * Reference OMAP TRM Chapter 17 - * Section: 1.4.3 Mode Selection - */ -#define OMAP_UART_LCR_CONF_MDB	0XBF - -/* WER = 0x7F - * Enable module level wakeup in WER reg - */ -#define OMAP_UART_WER_MOD_WKUP	0X7F - -/* Enable XON/XOFF flow control on output */ -#define OMAP_UART_SW_TX		0x04 - -/* Enable XON/XOFF flow control on input */ -#define OMAP_UART_SW_RX		0x04 - -#define OMAP_UART_SYSC_RESET	0X07 -#define OMAP_UART_TCR_TRIG	0X0F -#define OMAP_UART_SW_CLR	0XF0 -#define OMAP_UART_FIFO_CLR	0X06 - -#define OMAP_UART_DMA_CH_FREE	-1 - -#define RX_TIMEOUT		(3 * HZ) -#define OMAP_MAX_HSUART_PORTS	4 - -#define MSR_SAVE_FLAGS		UART_MSR_ANY_DELTA - -struct omap_uart_port_info { -	bool			dma_enabled;	/* To specify DMA Mode */ -	unsigned int		uartclk;	/* UART clock rate */ -	void __iomem		*membase;	/* ioremap cookie or NULL */ -	resource_size_t		mapbase;	/* resource base */ -	unsigned long		irqflags;	/* request_irq flags */ -	upf_t			flags;		/* UPF_* flags */ -}; - -struct uart_omap_dma { -	u8			uart_dma_tx; -	u8			uart_dma_rx; -	int			rx_dma_channel; -	int			tx_dma_channel; -	dma_addr_t		rx_buf_dma_phys; -	dma_addr_t		tx_buf_dma_phys; -	unsigned int		uart_base; -	/* -	 * Buffer for rx dma.It is not required for tx because the buffer -	 * comes from port structure. -	 */ -	unsigned char		*rx_buf; -	unsigned int		prev_rx_dma_pos; -	int			tx_buf_size; -	int			tx_dma_used; -	int			rx_dma_used; -	spinlock_t		tx_lock; -	spinlock_t		rx_lock; -	/* timer to poll activity on rx dma */ -	struct timer_list	rx_timer; -	int			rx_buf_size; -	int			rx_timeout; -}; - -struct uart_omap_port { -	struct uart_port	port; -	struct uart_omap_dma	uart_dma; -	struct platform_device	*pdev; - -	unsigned char		ier; -	unsigned char		lcr; -	unsigned char		mcr; -	unsigned char		fcr; -	unsigned char		efr; - -	int			use_dma; -	/* -	 * Some bits in registers are cleared on a read, so they must -	 * be saved whenever the register is read but the bits will not -	 * be immediately processed. -	 */ -	unsigned int		lsr_break_flag; -	unsigned char		msr_saved_flags; -	char			name[20]; -	unsigned long		port_activity; -}; - -#endif /* __OMAP_SERIAL_H__ */  | 
