diff options
Diffstat (limited to 'arch/arm/plat-iop')
| -rw-r--r-- | arch/arm/plat-iop/Makefile | 8 | ||||
| -rw-r--r-- | arch/arm/plat-iop/adma.c | 6 | ||||
| -rw-r--r-- | arch/arm/plat-iop/cp6.c | 1 | ||||
| -rw-r--r-- | arch/arm/plat-iop/gpio.c | 91 | ||||
| -rw-r--r-- | arch/arm/plat-iop/i2c.c | 1 | ||||
| -rw-r--r-- | arch/arm/plat-iop/io.c | 58 | ||||
| -rw-r--r-- | arch/arm/plat-iop/pci.c | 40 | ||||
| -rw-r--r-- | arch/arm/plat-iop/pmu.c | 39 | ||||
| -rw-r--r-- | arch/arm/plat-iop/restart.c | 20 | ||||
| -rw-r--r-- | arch/arm/plat-iop/setup.c | 7 | ||||
| -rw-r--r-- | arch/arm/plat-iop/time.c | 142 |
11 files changed, 184 insertions, 229 deletions
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile index 36bff032595..224e56c6049 100644 --- a/arch/arm/plat-iop/Makefile +++ b/arch/arm/plat-iop/Makefile @@ -5,24 +5,24 @@ obj-y := # IOP32X -obj-$(CONFIG_ARCH_IOP32X) += gpio.o obj-$(CONFIG_ARCH_IOP32X) += i2c.o obj-$(CONFIG_ARCH_IOP32X) += pci.o obj-$(CONFIG_ARCH_IOP32X) += setup.o obj-$(CONFIG_ARCH_IOP32X) += time.o -obj-$(CONFIG_ARCH_IOP32X) += io.o obj-$(CONFIG_ARCH_IOP32X) += cp6.o obj-$(CONFIG_ARCH_IOP32X) += adma.o +obj-$(CONFIG_ARCH_IOP32X) += pmu.o +obj-$(CONFIG_ARCH_IOP32X) += restart.o # IOP33X -obj-$(CONFIG_ARCH_IOP33X) += gpio.o obj-$(CONFIG_ARCH_IOP33X) += i2c.o obj-$(CONFIG_ARCH_IOP33X) += pci.o obj-$(CONFIG_ARCH_IOP33X) += setup.o obj-$(CONFIG_ARCH_IOP33X) += time.o -obj-$(CONFIG_ARCH_IOP33X) += io.o obj-$(CONFIG_ARCH_IOP33X) += cp6.o obj-$(CONFIG_ARCH_IOP33X) += adma.o +obj-$(CONFIG_ARCH_IOP33X) += pmu.o +obj-$(CONFIG_ARCH_IOP33X) += restart.o # IOP13XX obj-$(CONFIG_ARCH_IOP13XX) += cp6.o diff --git a/arch/arm/plat-iop/adma.c b/arch/arm/plat-iop/adma.c index 3c127aabe21..a4d1f8de3b5 100644 --- a/arch/arm/plat-iop/adma.c +++ b/arch/arm/plat-iop/adma.c @@ -179,7 +179,6 @@ static int __init iop3xx_adma_cap_init(void) dma_cap_set(DMA_INTERRUPT, iop3xx_dma_0_data.cap_mask); #else dma_cap_set(DMA_MEMCPY, iop3xx_dma_0_data.cap_mask); - dma_cap_set(DMA_MEMCPY_CRC32C, iop3xx_dma_0_data.cap_mask); dma_cap_set(DMA_INTERRUPT, iop3xx_dma_0_data.cap_mask); #endif @@ -188,18 +187,15 @@ static int __init iop3xx_adma_cap_init(void) dma_cap_set(DMA_INTERRUPT, iop3xx_dma_1_data.cap_mask); #else dma_cap_set(DMA_MEMCPY, iop3xx_dma_1_data.cap_mask); - dma_cap_set(DMA_MEMCPY_CRC32C, iop3xx_dma_1_data.cap_mask); dma_cap_set(DMA_INTERRUPT, iop3xx_dma_1_data.cap_mask); #endif #ifdef CONFIG_ARCH_IOP32X /* the 32x AAU does not perform zero sum */ dma_cap_set(DMA_XOR, iop3xx_aau_data.cap_mask); - dma_cap_set(DMA_MEMSET, iop3xx_aau_data.cap_mask); dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask); #else dma_cap_set(DMA_XOR, iop3xx_aau_data.cap_mask); - dma_cap_set(DMA_ZERO_SUM, iop3xx_aau_data.cap_mask); - dma_cap_set(DMA_MEMSET, iop3xx_aau_data.cap_mask); + dma_cap_set(DMA_XOR_VAL, iop3xx_aau_data.cap_mask); dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask); #endif diff --git a/arch/arm/plat-iop/cp6.c b/arch/arm/plat-iop/cp6.c index 9612a87e2a8..bab73e2c79d 100644 --- a/arch/arm/plat-iop/cp6.c +++ b/arch/arm/plat-iop/cp6.c @@ -18,6 +18,7 @@ */ #include <linux/init.h> #include <asm/traps.h> +#include <asm/ptrace.h> static int cp6_trap(struct pt_regs *regs, unsigned int instr) { diff --git a/arch/arm/plat-iop/gpio.c b/arch/arm/plat-iop/gpio.c deleted file mode 100644 index 640e498c12e..00000000000 --- a/arch/arm/plat-iop/gpio.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * arch/arm/plat-iop/gpio.c - * GPIO handling for Intel IOP3xx processors. - * - * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or (at - * your option) any later version. - */ - -#include <linux/device.h> -#include <linux/init.h> -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/gpio.h> -#include <asm/hardware/iop3xx.h> - -void gpio_line_config(int line, int direction) -{ - unsigned long flags; - - local_irq_save(flags); - if (direction == GPIO_IN) { - *IOP3XX_GPOE |= 1 << line; - } else if (direction == GPIO_OUT) { - *IOP3XX_GPOE &= ~(1 << line); - } - local_irq_restore(flags); -} -EXPORT_SYMBOL(gpio_line_config); - -int gpio_line_get(int line) -{ - return !!(*IOP3XX_GPID & (1 << line)); -} -EXPORT_SYMBOL(gpio_line_get); - -void gpio_line_set(int line, int value) -{ - unsigned long flags; - - local_irq_save(flags); - if (value == GPIO_LOW) { - *IOP3XX_GPOD &= ~(1 << line); - } else if (value == GPIO_HIGH) { - *IOP3XX_GPOD |= 1 << line; - } - local_irq_restore(flags); -} -EXPORT_SYMBOL(gpio_line_set); - -static int iop3xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) -{ - gpio_line_config(gpio, GPIO_IN); - return 0; -} - -static int iop3xx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int level) -{ - gpio_line_set(gpio, level); - gpio_line_config(gpio, GPIO_OUT); - return 0; -} - -static int iop3xx_gpio_get_value(struct gpio_chip *chip, unsigned gpio) -{ - return gpio_line_get(gpio); -} - -static void iop3xx_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value) -{ - gpio_line_set(gpio, value); -} - -static struct gpio_chip iop3xx_chip = { - .label = "iop3xx", - .direction_input = iop3xx_gpio_direction_input, - .get = iop3xx_gpio_get_value, - .direction_output = iop3xx_gpio_direction_output, - .set = iop3xx_gpio_set_value, - .base = 0, - .ngpio = IOP3XX_N_GPIOS, -}; - -static int __init iop3xx_gpio_setup(void) -{ - return gpiochip_add(&iop3xx_chip); -} -arch_initcall(iop3xx_gpio_setup); diff --git a/arch/arm/plat-iop/i2c.c b/arch/arm/plat-iop/i2c.c index 4efe392859e..88215ad031a 100644 --- a/arch/arm/plat-iop/i2c.c +++ b/arch/arm/plat-iop/i2c.c @@ -23,7 +23,6 @@ #include <asm/page.h> #include <asm/mach/map.h> #include <asm/setup.h> -#include <asm/system.h> #include <asm/memory.h> #include <mach/hardware.h> #include <asm/hardware/iop3xx.h> diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c deleted file mode 100644 index ed0bbece0d6..00000000000 --- a/arch/arm/plat-iop/io.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * iop3xx custom ioremap implementation - * Copyright (c) 2006, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place - Suite 330, Boston, MA 02111-1307 USA. - * - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/io.h> -#include <mach/hardware.h> - -void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size, - unsigned int mtype) -{ - void __iomem * retval; - - switch (cookie) { - case IOP3XX_PCI_LOWER_IO_PA ... IOP3XX_PCI_UPPER_IO_PA: - retval = (void *) IOP3XX_PCI_IO_PHYS_TO_VIRT(cookie); - break; - case IOP3XX_PERIPHERAL_PHYS_BASE ... IOP3XX_PERIPHERAL_UPPER_PA: - retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie); - break; - default: - retval = __arm_ioremap(cookie, size, mtype); - } - - return retval; -} -EXPORT_SYMBOL(__iop3xx_ioremap); - -void __iop3xx_iounmap(void __iomem *addr) -{ - extern void __iounmap(volatile void __iomem *addr); - - switch ((u32) addr) { - case IOP3XX_PCI_LOWER_IO_VA ... IOP3XX_PCI_UPPER_IO_VA: - case IOP3XX_PERIPHERAL_VIRT_BASE ... IOP3XX_PERIPHERAL_UPPER_VA: - goto skip; - } - __iounmap(addr); - -skip: - return; -} -EXPORT_SYMBOL(__iop3xx_iounmap); diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c index 77fa7cc7d16..362474b5c40 100644 --- a/arch/arm/plat-iop/pci.c +++ b/arch/arm/plat-iop/pci.c @@ -20,7 +20,6 @@ #include <linux/io.h> #include <asm/irq.h> #include <asm/signal.h> -#include <asm/system.h> #include <mach/hardware.h> #include <asm/mach/pci.h> #include <asm/hardware/iop3xx.h> @@ -161,7 +160,7 @@ iop3xx_write_config(struct pci_bus *bus, unsigned int devfn, int where, return PCIBIOS_SUCCESSFUL; } -static struct pci_ops iop3xx_ops = { +struct pci_ops iop3xx_ops = { .read = iop3xx_read_config, .write = iop3xx_write_config, }; @@ -193,38 +192,26 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys) if (nr != 0) return 0; - res = kzalloc(2 * sizeof(struct resource), GFP_KERNEL); + res = kzalloc(sizeof(struct resource), GFP_KERNEL); if (!res) panic("PCI: unable to alloc resources"); - res[0].start = IOP3XX_PCI_LOWER_IO_PA; - res[0].end = IOP3XX_PCI_LOWER_IO_PA + IOP3XX_PCI_IO_WINDOW_SIZE - 1; - res[0].name = "IOP3XX PCI I/O Space"; - res[0].flags = IORESOURCE_IO; - request_resource(&ioport_resource, &res[0]); - - res[1].start = IOP3XX_PCI_LOWER_MEM_PA; - res[1].end = IOP3XX_PCI_LOWER_MEM_PA + IOP3XX_PCI_MEM_WINDOW_SIZE - 1; - res[1].name = "IOP3XX PCI Memory Space"; - res[1].flags = IORESOURCE_MEM; - request_resource(&iomem_resource, &res[1]); + res->start = IOP3XX_PCI_LOWER_MEM_PA; + res->end = IOP3XX_PCI_LOWER_MEM_PA + IOP3XX_PCI_MEM_WINDOW_SIZE - 1; + res->name = "IOP3XX PCI Memory Space"; + res->flags = IORESOURCE_MEM; + request_resource(&iomem_resource, res); /* * Use whatever translation is already setup. */ sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0; - sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR; - sys->resource[0] = &res[0]; - sys->resource[1] = &res[1]; - sys->resource[2] = NULL; + pci_add_resource_offset(&sys->resources, res, sys->mem_offset); - return 1; -} + pci_ioremap_io(0, IOP3XX_PCI_LOWER_IO_PA); -struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *sys) -{ - return pci_scan_bus(sys->busnr, &iop3xx_ops, sys); + return 1; } void __init iop3xx_atu_setup(void) @@ -257,7 +244,8 @@ void __init iop3xx_atu_setup(void) *IOP3XX_OUMWTVR0 = 0; /* Outbound window 1 */ - *IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_BA + IOP3XX_PCI_MEM_WINDOW_SIZE; + *IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_BA + + IOP3XX_PCI_MEM_WINDOW_SIZE / 2; *IOP3XX_OUMWTVR1 = 0; /* BAR 3 ( Disabled ) */ @@ -358,7 +346,7 @@ static void __init iop3xx_atu_debug(void) DBG("ATU: IOP3XX_ATUCMD=0x%04x\n", *IOP3XX_ATUCMD); DBG("ATU: IOP3XX_ATUCR=0x%08x\n", *IOP3XX_ATUCR); - hook_fault_code(16+6, iop3xx_pci_abort, SIGBUS, "imprecise external abort"); + hook_fault_code(16+6, iop3xx_pci_abort, SIGBUS, 0, "imprecise external abort"); } /* for platforms that might be host-bus-adapters */ @@ -373,6 +361,8 @@ void __init iop3xx_pci_preinit_cond(void) void __init iop3xx_pci_preinit(void) { + pcibios_min_mem = 0; + iop3xx_atu_disable(); iop3xx_atu_setup(); iop3xx_atu_debug(); diff --git a/arch/arm/plat-iop/pmu.c b/arch/arm/plat-iop/pmu.c new file mode 100644 index 00000000000..ad9f9744a82 --- /dev/null +++ b/arch/arm/plat-iop/pmu.c @@ -0,0 +1,39 @@ +/* + * PMU IRQ registration for the iop3xx xscale PMU families. + * Copyright (C) 2010 Will Deacon, ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/platform_device.h> +#include <mach/irqs.h> + +static struct resource pmu_resource = { +#ifdef CONFIG_ARCH_IOP32X + .start = IRQ_IOP32X_CORE_PMU, + .end = IRQ_IOP32X_CORE_PMU, +#endif +#ifdef CONFIG_ARCH_IOP33X + .start = IRQ_IOP33X_CORE_PMU, + .end = IRQ_IOP33X_CORE_PMU, +#endif + .flags = IORESOURCE_IRQ, +}; + +static struct platform_device pmu_device = { + .name = "arm-pmu", + .id = -1, + .resource = &pmu_resource, + .num_resources = 1, +}; + +static int __init iop3xx_pmu_init(void) +{ + platform_device_register(&pmu_device); + return 0; +} + +arch_initcall(iop3xx_pmu_init); diff --git a/arch/arm/plat-iop/restart.c b/arch/arm/plat-iop/restart.c new file mode 100644 index 00000000000..3a4d5e5fde5 --- /dev/null +++ b/arch/arm/plat-iop/restart.c @@ -0,0 +1,20 @@ +/* + * restart.c + * + * Copyright (C) 2001 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <asm/hardware/iop3xx.h> +#include <asm/system_misc.h> +#include <mach/hardware.h> + +void iop3xx_restart(enum reboot_mode mode, const char *cmd) +{ + *IOP3XX_PCSR = 0x30; + + /* Jump into ROM at address 0 */ + soft_restart(0); +} diff --git a/arch/arm/plat-iop/setup.c b/arch/arm/plat-iop/setup.c index 9e573e78176..5b217f460f1 100644 --- a/arch/arm/plat-iop/setup.c +++ b/arch/arm/plat-iop/setup.c @@ -1,7 +1,7 @@ /* * arch/arm/plat-iop/setup.c * - * Author: Nicolas Pitre <nico@cam.org> + * Author: Nicolas Pitre <nico@fluxnic.net> * Copyright (C) 2001 MontaVista Software, Inc. * Copyright (C) 2004 Intel Corporation. * @@ -25,11 +25,6 @@ static struct map_desc iop3xx_std_desc[] __initdata = { .pfn = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE), .length = IOP3XX_PERIPHERAL_SIZE, .type = MT_UNCACHED, - }, { /* PCI IO space */ - .virtual = IOP3XX_PCI_LOWER_IO_VA, - .pfn = __phys_to_pfn(IOP3XX_PCI_LOWER_IO_PA), - .length = IOP3XX_PCI_IO_WINDOW_SIZE, - .type = MT_DEVICE, }, }; diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index 3695bbe3ee2..6ad65d8ae23 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c @@ -19,6 +19,10 @@ #include <linux/init.h> #include <linux/timex.h> #include <linux/io.h> +#include <linux/clocksource.h> +#include <linux/clockchips.h> +#include <linux/export.h> +#include <linux/sched_clock.h> #include <mach/hardware.h> #include <asm/irq.h> #include <asm/uaccess.h> @@ -26,52 +30,105 @@ #include <asm/mach/time.h> #include <mach/time.h> +/* + * Minimum clocksource/clockevent timer range in seconds + */ +#define IOP_MIN_RANGE 4 + +/* + * IOP clocksource (free-running timer 1). + */ +static cycle_t notrace iop_clocksource_read(struct clocksource *unused) +{ + return 0xffffffffu - read_tcr1(); +} + +static struct clocksource iop_clocksource = { + .name = "iop_timer1", + .rating = 300, + .read = iop_clocksource_read, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +/* + * IOP sched_clock() implementation via its clocksource. + */ +static u64 notrace iop_read_sched_clock(void) +{ + return 0xffffffffu - read_tcr1(); +} + +/* + * IOP clockevents (interrupting timer 0). + */ +static int iop_set_next_event(unsigned long delta, + struct clock_event_device *unused) +{ + u32 tmr = IOP_TMR_PRIVILEGED | IOP_TMR_RATIO_1_1; + + BUG_ON(delta == 0); + write_tmr0(tmr & ~(IOP_TMR_EN | IOP_TMR_RELOAD)); + write_tcr0(delta); + write_tmr0((tmr & ~IOP_TMR_RELOAD) | IOP_TMR_EN); + + return 0; +} + static unsigned long ticks_per_jiffy; -static unsigned long ticks_per_usec; -static unsigned long next_jiffy_time; -unsigned long iop_gettimeoffset(void) +static void iop_set_mode(enum clock_event_mode mode, + struct clock_event_device *unused) { - unsigned long offset, temp; + u32 tmr = read_tmr0(); + + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + write_tmr0(tmr & ~IOP_TMR_EN); + write_tcr0(ticks_per_jiffy - 1); + write_trr0(ticks_per_jiffy - 1); + tmr |= (IOP_TMR_RELOAD | IOP_TMR_EN); + break; + case CLOCK_EVT_MODE_ONESHOT: + /* ->set_next_event sets period and enables timer */ + tmr &= ~(IOP_TMR_RELOAD | IOP_TMR_EN); + break; + case CLOCK_EVT_MODE_RESUME: + tmr |= IOP_TMR_EN; + break; + case CLOCK_EVT_MODE_SHUTDOWN: + case CLOCK_EVT_MODE_UNUSED: + default: + tmr &= ~IOP_TMR_EN; + break; + } - /* enable cp6, if necessary, to avoid taking the overhead of an - * undefined instruction trap - */ - asm volatile ( - "mrc p15, 0, %0, c15, c1, 0\n\t" - "tst %0, #(1 << 6)\n\t" - "orreq %0, %0, #(1 << 6)\n\t" - "mcreq p15, 0, %0, c15, c1, 0\n\t" -#ifdef CONFIG_CPU_XSCALE - "mrceq p15, 0, %0, c15, c1, 0\n\t" - "moveq %0, %0\n\t" - "subeq pc, pc, #4\n\t" -#endif - : "=r"(temp) : : "cc"); - - offset = next_jiffy_time - read_tcr1(); - - return offset / ticks_per_usec; + write_tmr0(tmr); } +static struct clock_event_device iop_clockevent = { + .name = "iop_timer0", + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .rating = 300, + .set_next_event = iop_set_next_event, + .set_mode = iop_set_mode, +}; + static irqreturn_t iop_timer_interrupt(int irq, void *dev_id) { - write_tisr(1); - - while ((signed long)(next_jiffy_time - read_tcr1()) - >= ticks_per_jiffy) { - timer_tick(); - next_jiffy_time -= ticks_per_jiffy; - } + struct clock_event_device *evt = dev_id; + write_tisr(1); + evt->event_handler(evt); return IRQ_HANDLED; } static struct irqaction iop_timer_irq = { .name = "IOP Timer Tick", .handler = iop_timer_interrupt, - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .flags = IRQF_TIMER | IRQF_IRQPOLL, + .dev_id = &iop_clockevent, }; static unsigned long iop_tick_rate; @@ -85,22 +142,29 @@ void __init iop_init_time(unsigned long tick_rate) { u32 timer_ctl; - ticks_per_jiffy = (tick_rate + HZ/2) / HZ; - ticks_per_usec = tick_rate / 1000000; - next_jiffy_time = 0xffffffff; + sched_clock_register(iop_read_sched_clock, 32, tick_rate); + + ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ); iop_tick_rate = tick_rate; timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED | IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1; /* - * We use timer 0 for our timer interrupt, and timer 1 as - * monotonic counter for tracking missed jiffies. + * Set up interrupting clockevent timer 0. + */ + write_tmr0(timer_ctl & ~IOP_TMR_EN); + write_tisr(1); + setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); + iop_clockevent.cpumask = cpumask_of(0); + clockevents_config_and_register(&iop_clockevent, tick_rate, + 0xf, 0xfffffffe); + + /* + * Set up free-running clocksource timer 1. */ - write_trr0(ticks_per_jiffy - 1); - write_tmr0(timer_ctl); write_trr1(0xffffffff); + write_tcr1(0xffffffff); write_tmr1(timer_ctl); - - setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); + clocksource_register_hz(&iop_clocksource, tick_rate); } |