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-rw-r--r--arch/arm/oprofile/Kconfig23
-rw-r--r--arch/arm/oprofile/Makefile6
-rw-r--r--arch/arm/oprofile/backtrace.c116
-rw-r--r--arch/arm/oprofile/common.c211
-rw-r--r--arch/arm/oprofile/op_arm_model.h31
-rw-r--r--arch/arm/oprofile/op_counter.h29
-rw-r--r--arch/arm/oprofile/op_model_xscale.c443
7 files changed, 91 insertions, 768 deletions
diff --git a/arch/arm/oprofile/Kconfig b/arch/arm/oprofile/Kconfig
deleted file mode 100644
index 19d37730b66..00000000000
--- a/arch/arm/oprofile/Kconfig
+++ /dev/null
@@ -1,23 +0,0 @@
-
-menu "Profiling support"
- depends on EXPERIMENTAL
-
-config PROFILING
- bool "Profiling support (EXPERIMENTAL)"
- help
- Say Y here to enable the extended profiling support mechanisms used
- by profilers such as OProfile.
-
-
-config OPROFILE
- tristate "OProfile system profiling (EXPERIMENTAL)"
- depends on PROFILING
- help
- OProfile is a profiling system capable of profiling the
- whole system, include the kernel, kernel modules, libraries,
- and applications.
-
- If unsure, say N.
-
-endmenu
-
diff --git a/arch/arm/oprofile/Makefile b/arch/arm/oprofile/Makefile
index 6a94e54848f..b2215c61cdf 100644
--- a/arch/arm/oprofile/Makefile
+++ b/arch/arm/oprofile/Makefile
@@ -6,6 +6,8 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
oprofilefs.o oprofile_stats.o \
timer_int.o )
-oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
-oprofile-$(CONFIG_CPU_XSCALE) += op_model_xscale.o
+ifeq ($(CONFIG_HW_PERF_EVENTS),y)
+DRIVER_OBJS += $(addprefix ../../../drivers/oprofile/, oprofile_perf.o)
+endif
+oprofile-y := $(DRIVER_OBJS) common.o
diff --git a/arch/arm/oprofile/backtrace.c b/arch/arm/oprofile/backtrace.c
deleted file mode 100644
index 7c22c12618c..00000000000
--- a/arch/arm/oprofile/backtrace.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Arm specific backtracing code for oprofile
- *
- * Copyright 2005 Openedhand Ltd.
- *
- * Author: Richard Purdie <rpurdie@openedhand.com>
- *
- * Based on i386 oprofile backtrace code by John Levon, David Smith
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/oprofile.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <asm/ptrace.h>
-#include <asm/uaccess.h>
-
-
-/*
- * The registers we're interested in are at the end of the variable
- * length saved register structure. The fp points at the end of this
- * structure so the address of this struct is:
- * (struct frame_tail *)(xxx->fp)-1
- */
-struct frame_tail {
- struct frame_tail *fp;
- unsigned long sp;
- unsigned long lr;
-} __attribute__((packed));
-
-
-#ifdef CONFIG_FRAME_POINTER
-static struct frame_tail* kernel_backtrace(struct frame_tail *tail)
-{
- oprofile_add_trace(tail->lr);
-
- /* frame pointers should strictly progress back up the stack
- * (towards higher addresses) */
- if (tail >= tail->fp)
- return NULL;
-
- return tail->fp-1;
-}
-#endif
-
-static struct frame_tail* user_backtrace(struct frame_tail *tail)
-{
- struct frame_tail buftail[2];
-
- /* Also check accessibility of one struct frame_tail beyond */
- if (!access_ok(VERIFY_READ, tail, sizeof(buftail)))
- return NULL;
- if (__copy_from_user_inatomic(buftail, tail, sizeof(buftail)))
- return NULL;
-
- oprofile_add_trace(buftail[0].lr);
-
- /* frame pointers should strictly progress back up the stack
- * (towards higher addresses) */
- if (tail >= buftail[0].fp)
- return NULL;
-
- return buftail[0].fp-1;
-}
-
-/*
- * | | /\ Higher addresses
- * | |
- * --------------- stack base (address of current_thread_info)
- * | thread info |
- * . .
- * | stack |
- * --------------- saved regs->ARM_fp value if valid (frame_tail address)
- * . .
- * --------------- struct pt_regs stored on stack (struct pt_regs *)
- * | |
- * . .
- * | |
- * --------------- %esp
- * | |
- * | | \/ Lower addresses
- *
- * Thus, &pt_regs <-> stack base restricts the valid(ish) fp values
- */
-static int valid_kernel_stack(struct frame_tail *tail, struct pt_regs *regs)
-{
- unsigned long tailaddr = (unsigned long)tail;
- unsigned long stack = (unsigned long)regs;
- unsigned long stack_base = (stack & ~(THREAD_SIZE - 1)) + THREAD_SIZE;
-
- return (tailaddr > stack) && (tailaddr < stack_base);
-}
-
-void arm_backtrace(struct pt_regs * const regs, unsigned int depth)
-{
- struct frame_tail *tail;
-
- tail = ((struct frame_tail *) regs->ARM_fp) - 1;
-
- if (!user_mode(regs)) {
-
-#ifdef CONFIG_FRAME_POINTER
- while (depth-- && tail && valid_kernel_stack(tail, regs)) {
- tail = kernel_backtrace(tail);
- }
-#endif
- return;
- }
-
- while (depth-- && tail && !((unsigned long) tail & 3))
- tail = user_backtrace(tail);
-}
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index 6f833358cd0..99c63d4b6af 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -2,169 +2,132 @@
* @file common.c
*
* @remark Copyright 2004 Oprofile Authors
+ * @remark Copyright 2010 ARM Ltd.
* @remark Read the file COPYING
*
* @author Zwane Mwaikambo
+ * @author Will Deacon [move to perf]
*/
+#include <linux/cpumask.h>
#include <linux/init.h>
+#include <linux/mutex.h>
#include <linux/oprofile.h>
-#include <linux/errno.h>
+#include <linux/perf_event.h>
+#include <linux/platform_device.h>
#include <linux/slab.h>
-#include <linux/sysdev.h>
-#include <linux/mutex.h>
+#include <asm/stacktrace.h>
+#include <linux/uaccess.h>
-#include "op_counter.h"
-#include "op_arm_model.h"
+#include <asm/perf_event.h>
+#include <asm/ptrace.h>
-static struct op_arm_model_spec *op_arm_model;
-static int op_arm_enabled;
-static DEFINE_MUTEX(op_arm_mutex);
+#ifdef CONFIG_HW_PERF_EVENTS
-struct op_counter_config *counter_config;
+/*
+ * OProfile has a curious naming scheme for the ARM PMUs, but they are
+ * part of the user ABI so we need to map from the perf PMU name for
+ * supported PMUs.
+ */
+static struct op_perf_name {
+ char *perf_name;
+ char *op_name;
+} op_perf_name_map[] = {
+ { "xscale1", "arm/xscale1" },
+ { "xscale1", "arm/xscale2" },
+ { "v6", "arm/armv6" },
+ { "v6mpcore", "arm/mpcore" },
+ { "ARMv7 Cortex-A8", "arm/armv7" },
+ { "ARMv7 Cortex-A9", "arm/armv7-ca9" },
+};
-static int op_arm_create_files(struct super_block *sb, struct dentry *root)
+char *op_name_from_perf_id(void)
{
- unsigned int i;
-
- for (i = 0; i < op_arm_model->num_counters; i++) {
- struct dentry *dir;
- char buf[4];
-
- snprintf(buf, sizeof buf, "%d", i);
- dir = oprofilefs_mkdir(sb, root, buf);
- oprofilefs_create_ulong(sb, dir, "enabled", &counter_config[i].enabled);
- oprofilefs_create_ulong(sb, dir, "event", &counter_config[i].event);
- oprofilefs_create_ulong(sb, dir, "count", &counter_config[i].count);
- oprofilefs_create_ulong(sb, dir, "unit_mask", &counter_config[i].unit_mask);
- oprofilefs_create_ulong(sb, dir, "kernel", &counter_config[i].kernel);
- oprofilefs_create_ulong(sb, dir, "user", &counter_config[i].user);
+ int i;
+ struct op_perf_name names;
+ const char *perf_name = perf_pmu_name();
+
+ for (i = 0; i < ARRAY_SIZE(op_perf_name_map); ++i) {
+ names = op_perf_name_map[i];
+ if (!strcmp(names.perf_name, perf_name))
+ return names.op_name;
}
- return 0;
-}
-
-static int op_arm_setup(void)
-{
- int ret;
-
- spin_lock(&oprofilefs_lock);
- ret = op_arm_model->setup_ctrs();
- spin_unlock(&oprofilefs_lock);
- return ret;
+ return NULL;
}
+#endif
-static int op_arm_start(void)
+static int report_trace(struct stackframe *frame, void *d)
{
- int ret = -EBUSY;
+ unsigned int *depth = d;
- mutex_lock(&op_arm_mutex);
- if (!op_arm_enabled) {
- ret = op_arm_model->start();
- op_arm_enabled = !ret;
+ if (*depth) {
+ oprofile_add_trace(frame->pc);
+ (*depth)--;
}
- mutex_unlock(&op_arm_mutex);
- return ret;
-}
-static void op_arm_stop(void)
-{
- mutex_lock(&op_arm_mutex);
- if (op_arm_enabled)
- op_arm_model->stop();
- op_arm_enabled = 0;
- mutex_unlock(&op_arm_mutex);
+ return *depth == 0;
}
-#ifdef CONFIG_PM
-static int op_arm_suspend(struct sys_device *dev, pm_message_t state)
-{
- mutex_lock(&op_arm_mutex);
- if (op_arm_enabled)
- op_arm_model->stop();
- mutex_unlock(&op_arm_mutex);
- return 0;
-}
+/*
+ * The registers we're interested in are at the end of the variable
+ * length saved register structure. The fp points at the end of this
+ * structure so the address of this struct is:
+ * (struct frame_tail *)(xxx->fp)-1
+ */
+struct frame_tail {
+ struct frame_tail *fp;
+ unsigned long sp;
+ unsigned long lr;
+} __attribute__((packed));
-static int op_arm_resume(struct sys_device *dev)
+static struct frame_tail* user_backtrace(struct frame_tail *tail)
{
- mutex_lock(&op_arm_mutex);
- if (op_arm_enabled && op_arm_model->start())
- op_arm_enabled = 0;
- mutex_unlock(&op_arm_mutex);
- return 0;
-}
+ struct frame_tail buftail[2];
-static struct sysdev_class oprofile_sysclass = {
- set_kset_name("oprofile"),
- .resume = op_arm_resume,
- .suspend = op_arm_suspend,
-};
+ /* Also check accessibility of one struct frame_tail beyond */
+ if (!access_ok(VERIFY_READ, tail, sizeof(buftail)))
+ return NULL;
+ if (__copy_from_user_inatomic(buftail, tail, sizeof(buftail)))
+ return NULL;
-static struct sys_device device_oprofile = {
- .id = 0,
- .cls = &oprofile_sysclass,
-};
+ oprofile_add_trace(buftail[0].lr);
-static int __init init_driverfs(void)
-{
- int ret;
-
- if (!(ret = sysdev_class_register(&oprofile_sysclass)))
- ret = sysdev_register(&device_oprofile);
+ /* frame pointers should strictly progress back up the stack
+ * (towards higher addresses) */
+ if (tail + 1 >= buftail[0].fp)
+ return NULL;
- return ret;
+ return buftail[0].fp-1;
}
-static void exit_driverfs(void)
+static void arm_backtrace(struct pt_regs * const regs, unsigned int depth)
{
- sysdev_unregister(&device_oprofile);
- sysdev_class_unregister(&oprofile_sysclass);
+ struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1;
+
+ if (!user_mode(regs)) {
+ struct stackframe frame;
+ frame.fp = regs->ARM_fp;
+ frame.sp = regs->ARM_sp;
+ frame.lr = regs->ARM_lr;
+ frame.pc = regs->ARM_pc;
+ walk_stackframe(&frame, report_trace, &depth);
+ return;
+ }
+
+ while (depth-- && tail && !((unsigned long) tail & 3))
+ tail = user_backtrace(tail);
}
-#else
-#define init_driverfs() do { } while (0)
-#define exit_driverfs() do { } while (0)
-#endif /* CONFIG_PM */
int __init oprofile_arch_init(struct oprofile_operations *ops)
{
- struct op_arm_model_spec *spec = NULL;
- int ret = -ENODEV;
-
-#ifdef CONFIG_CPU_XSCALE
- spec = &op_xscale_spec;
-#endif
+ /* provide backtrace support also in timer mode: */
+ ops->backtrace = arm_backtrace;
- if (spec) {
- ret = spec->init();
- if (ret < 0)
- return ret;
-
- counter_config = kcalloc(spec->num_counters, sizeof(struct op_counter_config),
- GFP_KERNEL);
- if (!counter_config)
- return -ENOMEM;
-
- op_arm_model = spec;
- init_driverfs();
- ops->create_files = op_arm_create_files;
- ops->setup = op_arm_setup;
- ops->shutdown = op_arm_stop;
- ops->start = op_arm_start;
- ops->stop = op_arm_stop;
- ops->cpu_type = op_arm_model->name;
- ops->backtrace = arm_backtrace;
- printk(KERN_INFO "oprofile: using %s\n", spec->name);
- }
-
- return ret;
+ return oprofile_perf_init(ops);
}
void oprofile_arch_exit(void)
{
- if (op_arm_model) {
- exit_driverfs();
- op_arm_model = NULL;
- }
- kfree(counter_config);
+ oprofile_perf_exit();
}
diff --git a/arch/arm/oprofile/op_arm_model.h b/arch/arm/oprofile/op_arm_model.h
deleted file mode 100644
index 38c6ad15854..00000000000
--- a/arch/arm/oprofile/op_arm_model.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/**
- * @file op_arm_model.h
- * interface to ARM machine specific operations
- *
- * @remark Copyright 2004 Oprofile Authors
- * @remark Read the file COPYING
- *
- * @author Zwane Mwaikambo
- */
-
-#ifndef OP_ARM_MODEL_H
-#define OP_ARM_MODEL_H
-
-struct op_arm_model_spec {
- int (*init)(void);
- unsigned int num_counters;
- int (*setup_ctrs)(void);
- int (*start)(void);
- void (*stop)(void);
- char *name;
-};
-
-#ifdef CONFIG_CPU_XSCALE
-extern struct op_arm_model_spec op_xscale_spec;
-#endif
-
-extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth);
-
-extern int __init op_arm_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec);
-extern void op_arm_exit(void);
-#endif /* OP_ARM_MODEL_H */
diff --git a/arch/arm/oprofile/op_counter.h b/arch/arm/oprofile/op_counter.h
deleted file mode 100644
index 8c5351d751c..00000000000
--- a/arch/arm/oprofile/op_counter.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/**
- * @file op_counter.h
- *
- * @remark Copyright 2004 Oprofile Authors
- * @remark Read the file COPYING
- *
- * @author Zwane Mwaikambo
- */
-
-#ifndef OP_COUNTER_H
-#define OP_COUNTER_H
-
-#define OP_MAX_COUNTER 5
-
-/* Per performance monitor configuration as set via
- * oprofilefs.
- */
-struct op_counter_config {
- unsigned long count;
- unsigned long enabled;
- unsigned long event;
- unsigned long unit_mask;
- unsigned long kernel;
- unsigned long user;
-};
-
-extern struct op_counter_config *counter_config;
-
-#endif /* OP_COUNTER_H */
diff --git a/arch/arm/oprofile/op_model_xscale.c b/arch/arm/oprofile/op_model_xscale.c
deleted file mode 100644
index e0f0b320d76..00000000000
--- a/arch/arm/oprofile/op_model_xscale.c
+++ /dev/null
@@ -1,443 +0,0 @@
-/**
- * @file op_model_xscale.c
- * XScale Performance Monitor Driver
- *
- * @remark Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
- * @remark Copyright 2000-2004 MontaVista Software Inc
- * @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com>
- * @remark Copyright 2004 Intel Corporation
- * @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
- * @remark Copyright 2004 OProfile Authors
- *
- * @remark Read the file COPYING
- *
- * @author Zwane Mwaikambo
- */
-
-/* #define DEBUG */
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/oprofile.h>
-#include <linux/interrupt.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-
-#include "op_counter.h"
-#include "op_arm_model.h"
-
-#define PMU_ENABLE 0x001 /* Enable counters */
-#define PMN_RESET 0x002 /* Reset event counters */
-#define CCNT_RESET 0x004 /* Reset clock counter */
-#define PMU_RESET (CCNT_RESET | PMN_RESET)
-#define PMU_CNT64 0x008 /* Make CCNT count every 64th cycle */
-
-/* TODO do runtime detection */
-#ifdef CONFIG_ARCH_IOP310
-#define XSCALE_PMU_IRQ IRQ_XS80200_PMU
-#endif
-#ifdef CONFIG_ARCH_IOP321
-#define XSCALE_PMU_IRQ IRQ_IOP321_CORE_PMU
-#endif
-#ifdef CONFIG_ARCH_IOP331
-#define XSCALE_PMU_IRQ IRQ_IOP331_CORE_PMU
-#endif
-#ifdef CONFIG_ARCH_PXA
-#define XSCALE_PMU_IRQ IRQ_PMU
-#endif
-
-/*
- * Different types of events that can be counted by the XScale PMU
- * as used by Oprofile userspace. Here primarily for documentation
- * purposes.
- */
-
-#define EVT_ICACHE_MISS 0x00
-#define EVT_ICACHE_NO_DELIVER 0x01
-#define EVT_DATA_STALL 0x02
-#define EVT_ITLB_MISS 0x03
-#define EVT_DTLB_MISS 0x04
-#define EVT_BRANCH 0x05
-#define EVT_BRANCH_MISS 0x06
-#define EVT_INSTRUCTION 0x07
-#define EVT_DCACHE_FULL_STALL 0x08
-#define EVT_DCACHE_FULL_STALL_CONTIG 0x09
-#define EVT_DCACHE_ACCESS 0x0A
-#define EVT_DCACHE_MISS 0x0B
-#define EVT_DCACE_WRITE_BACK 0x0C
-#define EVT_PC_CHANGED 0x0D
-#define EVT_BCU_REQUEST 0x10
-#define EVT_BCU_FULL 0x11
-#define EVT_BCU_DRAIN 0x12
-#define EVT_BCU_ECC_NO_ELOG 0x14
-#define EVT_BCU_1_BIT_ERR 0x15
-#define EVT_RMW 0x16
-/* EVT_CCNT is not hardware defined */
-#define EVT_CCNT 0xFE
-#define EVT_UNUSED 0xFF
-
-struct pmu_counter {
- volatile unsigned long ovf;
- unsigned long reset_counter;
-};
-
-enum { CCNT, PMN0, PMN1, PMN2, PMN3, MAX_COUNTERS };
-
-static struct pmu_counter results[MAX_COUNTERS];
-
-/*
- * There are two versions of the PMU in current XScale processors
- * with differing register layouts and number of performance counters.
- * e.g. IOP321 is xsc1 whilst IOP331 is xsc2.
- * We detect which register layout to use in xscale_detect_pmu()
- */
-enum { PMU_XSC1, PMU_XSC2 };
-
-struct pmu_type {
- int id;
- char *name;
- int num_counters;
- unsigned int int_enable;
- unsigned int cnt_ovf[MAX_COUNTERS];
- unsigned int int_mask[MAX_COUNTERS];
-};
-
-static struct pmu_type pmu_parms[] = {
- {
- .id = PMU_XSC1,
- .name = "arm/xscale1",
- .num_counters = 3,
- .int_mask = { [PMN0] = 0x10, [PMN1] = 0x20,
- [CCNT] = 0x40 },
- .cnt_ovf = { [CCNT] = 0x400, [PMN0] = 0x100,
- [PMN1] = 0x200},
- },
- {
- .id = PMU_XSC2,
- .name = "arm/xscale2",
- .num_counters = 5,
- .int_mask = { [CCNT] = 0x01, [PMN0] = 0x02,
- [PMN1] = 0x04, [PMN2] = 0x08,
- [PMN3] = 0x10 },
- .cnt_ovf = { [CCNT] = 0x01, [PMN0] = 0x02,
- [PMN1] = 0x04, [PMN2] = 0x08,
- [PMN3] = 0x10 },
- },
-};
-
-static struct pmu_type *pmu;
-
-static void write_pmnc(u32 val)
-{
- if (pmu->id == PMU_XSC1) {
- /* upper 4bits and 7, 11 are write-as-0 */
- val &= 0xffff77f;
- __asm__ __volatile__ ("mcr p14, 0, %0, c0, c0, 0" : : "r" (val));
- } else {
- /* bits 4-23 are write-as-0, 24-31 are write ignored */
- val &= 0xf;
- __asm__ __volatile__ ("mcr p14, 0, %0, c0, c1, 0" : : "r" (val));
- }
-}
-
-static u32 read_pmnc(void)
-{
- u32 val;
-
- if (pmu->id == PMU_XSC1)
- __asm__ __volatile__ ("mrc p14, 0, %0, c0, c0, 0" : "=r" (val));
- else {
- __asm__ __volatile__ ("mrc p14, 0, %0, c0, c1, 0" : "=r" (val));
- /* bits 1-2 and 4-23 are read-unpredictable */
- val &= 0xff000009;
- }
-
- return val;
-}
-
-static u32 __xsc1_read_counter(int counter)
-{
- u32 val = 0;
-
- switch (counter) {
- case CCNT:
- __asm__ __volatile__ ("mrc p14, 0, %0, c1, c0, 0" : "=r" (val));
- break;
- case PMN0:
- __asm__ __volatile__ ("mrc p14, 0, %0, c2, c0, 0" : "=r" (val));
- break;
- case PMN1:
- __asm__ __volatile__ ("mrc p14, 0, %0, c3, c0, 0" : "=r" (val));
- break;
- }
- return val;
-}
-
-static u32 __xsc2_read_counter(int counter)
-{
- u32 val = 0;
-
- switch (counter) {
- case CCNT:
- __asm__ __volatile__ ("mrc p14, 0, %0, c1, c1, 0" : "=r" (val));
- break;
- case PMN0:
- __asm__ __volatile__ ("mrc p14, 0, %0, c0, c2, 0" : "=r" (val));
- break;
- case PMN1:
- __asm__ __volatile__ ("mrc p14, 0, %0, c1, c2, 0" : "=r" (val));
- break;
- case PMN2:
- __asm__ __volatile__ ("mrc p14, 0, %0, c2, c2, 0" : "=r" (val));
- break;
- case PMN3:
- __asm__ __volatile__ ("mrc p14, 0, %0, c3, c2, 0" : "=r" (val));
- break;
- }
- return val;
-}
-
-static u32 read_counter(int counter)
-{
- u32 val;
-
- if (pmu->id == PMU_XSC1)
- val = __xsc1_read_counter(counter);
- else
- val = __xsc2_read_counter(counter);
-
- return val;
-}
-
-static void __xsc1_write_counter(int counter, u32 val)
-{
- switch (counter) {
- case CCNT:
- __asm__ __volatile__ ("mcr p14, 0, %0, c1, c0, 0" : : "r" (val));
- break;
- case PMN0:
- __asm__ __volatile__ ("mcr p14, 0, %0, c2, c0, 0" : : "r" (val));
- break;
- case PMN1:
- __asm__ __volatile__ ("mcr p14, 0, %0, c3, c0, 0" : : "r" (val));
- break;
- }
-}
-
-static void __xsc2_write_counter(int counter, u32 val)
-{
- switch (counter) {
- case CCNT:
- __asm__ __volatile__ ("mcr p14, 0, %0, c1, c1, 0" : : "r" (val));
- break;
- case PMN0:
- __asm__ __volatile__ ("mcr p14, 0, %0, c0, c2, 0" : : "r" (val));
- break;
- case PMN1:
- __asm__ __volatile__ ("mcr p14, 0, %0, c1, c2, 0" : : "r" (val));
- break;
- case PMN2:
- __asm__ __volatile__ ("mcr p14, 0, %0, c2, c2, 0" : : "r" (val));
- break;
- case PMN3:
- __asm__ __volatile__ ("mcr p14, 0, %0, c3, c2, 0" : : "r" (val));
- break;
- }
-}
-
-static void write_counter(int counter, u32 val)
-{
- if (pmu->id == PMU_XSC1)
- __xsc1_write_counter(counter, val);
- else
- __xsc2_write_counter(counter, val);
-}
-
-static int xscale_setup_ctrs(void)
-{
- u32 evtsel, pmnc;
- int i;
-
- for (i = CCNT; i < MAX_COUNTERS; i++) {
- if (counter_config[i].enabled)
- continue;
-
- counter_config[i].event = EVT_UNUSED;
- }
-
- switch (pmu->id) {
- case PMU_XSC1:
- pmnc = (counter_config[PMN1].event << 20) | (counter_config[PMN0].event << 12);
- pr_debug("xscale_setup_ctrs: pmnc: %#08x\n", pmnc);
- write_pmnc(pmnc);
- break;
-
- case PMU_XSC2:
- evtsel = counter_config[PMN0].event | (counter_config[PMN1].event << 8) |
- (counter_config[PMN2].event << 16) | (counter_config[PMN3].event << 24);
-
- pr_debug("xscale_setup_ctrs: evtsel %#08x\n", evtsel);
- __asm__ __volatile__ ("mcr p14, 0, %0, c8, c1, 0" : : "r" (evtsel));
- break;
- }
-
- for (i = CCNT; i < MAX_COUNTERS; i++) {
- if (counter_config[i].event == EVT_UNUSED) {
- counter_config[i].event = 0;
- pmu->int_enable &= ~pmu->int_mask[i];
- continue;
- }
-
- results[i].reset_counter = counter_config[i].count;
- write_counter(i, -(u32)counter_config[i].count);
- pmu->int_enable |= pmu->int_mask[i];
- pr_debug("xscale_setup_ctrs: counter%d %#08x from %#08lx\n", i,
- read_counter(i), counter_config[i].count);
- }
-
- return 0;
-}
-
-static void inline __xsc1_check_ctrs(void)
-{
- int i;
- u32 pmnc = read_pmnc();
-
- /* NOTE: there's an A stepping errata that states if an overflow */
- /* bit already exists and another occurs, the previous */
- /* Overflow bit gets cleared. There's no workaround. */
- /* Fixed in B stepping or later */
-
- /* Write the value back to clear the overflow flags. Overflow */
- /* flags remain in pmnc for use below */
- write_pmnc(pmnc & ~PMU_ENABLE);
-
- for (i = CCNT; i <= PMN1; i++) {
- if (!(pmu->int_mask[i] & pmu->int_enable))
- continue;
-
- if (pmnc & pmu->cnt_ovf[i])
- results[i].ovf++;
- }
-}
-
-static void inline __xsc2_check_ctrs(void)
-{
- int i;
- u32 flag = 0, pmnc = read_pmnc();
-
- pmnc &= ~PMU_ENABLE;
- write_pmnc(pmnc);
-
- /* read overflow flag register */
- __asm__ __volatile__ ("mrc p14, 0, %0, c5, c1, 0" : "=r" (flag));
-
- for (i = CCNT; i <= PMN3; i++) {
- if (!(pmu->int_mask[i] & pmu->int_enable))
- continue;
-
- if (flag & pmu->cnt_ovf[i])
- results[i].ovf++;
- }
-
- /* writeback clears overflow bits */
- __asm__ __volatile__ ("mcr p14, 0, %0, c5, c1, 0" : : "r" (flag));
-}
-
-static irqreturn_t xscale_pmu_interrupt(int irq, void *arg, struct pt_regs *regs)
-{
- int i;
- u32 pmnc;
-
- if (pmu->id == PMU_XSC1)
- __xsc1_check_ctrs();
- else
- __xsc2_check_ctrs();
-
- for (i = CCNT; i < MAX_COUNTERS; i++) {
- if (!results[i].ovf)
- continue;
-
- write_counter(i, -(u32)results[i].reset_counter);
- oprofile_add_sample(regs, i);
- results[i].ovf--;
- }
-
- pmnc = read_pmnc() | PMU_ENABLE;
- write_pmnc(pmnc);
-
- return IRQ_HANDLED;
-}
-
-static void xscale_pmu_stop(void)
-{
- u32 pmnc = read_pmnc();
-
- pmnc &= ~PMU_ENABLE;
- write_pmnc(pmnc);
-
- free_irq(XSCALE_PMU_IRQ, results);
-}
-
-static int xscale_pmu_start(void)
-{
- int ret;
- u32 pmnc = read_pmnc();
-
- ret = request_irq(XSCALE_PMU_IRQ, xscale_pmu_interrupt, SA_INTERRUPT,
- "XScale PMU", (void *)results);
-
- if (ret < 0) {
- printk(KERN_ERR "oprofile: unable to request IRQ%d for XScale PMU\n",
- XSCALE_PMU_IRQ);
- return ret;
- }
-
- if (pmu->id == PMU_XSC1)
- pmnc |= pmu->int_enable;
- else {
- __asm__ __volatile__ ("mcr p14, 0, %0, c4, c1, 0" : : "r" (pmu->int_enable));
- pmnc &= ~PMU_CNT64;
- }
-
- pmnc |= PMU_ENABLE;
- write_pmnc(pmnc);
- pr_debug("xscale_pmu_start: pmnc: %#08x mask: %08x\n", pmnc, pmu->int_enable);
- return 0;
-}
-
-static int xscale_detect_pmu(void)
-{
- int ret = 0;
- u32 id;
-
- id = (read_cpuid(CPUID_ID) >> 13) & 0x7;
-
- switch (id) {
- case 1:
- pmu = &pmu_parms[PMU_XSC1];
- break;
- case 2:
- pmu = &pmu_parms[PMU_XSC2];
- break;
- default:
- ret = -ENODEV;
- break;
- }
-
- if (!ret) {
- op_xscale_spec.name = pmu->name;
- op_xscale_spec.num_counters = pmu->num_counters;
- pr_debug("xscale_detect_pmu: detected %s PMU\n", pmu->name);
- }
-
- return ret;
-}
-
-struct op_arm_model_spec op_xscale_spec = {
- .init = xscale_detect_pmu,
- .setup_ctrs = xscale_setup_ctrs,
- .start = xscale_pmu_start,
- .stop = xscale_pmu_stop,
-};
-
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-12-24 10:47:37 +0000