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Diffstat (limited to 'arch/arm/mach-ux500/cpu-db8500.c')
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c272
1 files changed, 160 insertions, 112 deletions
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 4acab7544b3..fa308f07fae 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008-2009 ST-Ericsson
+ * Copyright (C) 2008-2009 ST-Ericsson SA
*
* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
*
@@ -12,153 +12,201 @@
#include <linux/init.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
+#include <linux/interrupt.h>
#include <linux/irq.h>
-#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/io.h>
-
+#include <linux/mfd/abx500/ab8500.h>
+#include <linux/mfd/dbx500-prcmu.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/regulator/machine.h>
+#include <linux/random.h>
+
+#include <asm/pmu.h>
#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/setup.h>
-#include <mach/devices.h>
-
-static struct platform_device *platform_devs[] __initdata = {
- &u8500_gpio_devs[0],
- &u8500_gpio_devs[1],
- &u8500_gpio_devs[2],
- &u8500_gpio_devs[3],
- &u8500_gpio_devs[4],
- &u8500_gpio_devs[5],
- &u8500_gpio_devs[6],
- &u8500_gpio_devs[7],
- &u8500_gpio_devs[8],
- &u8500_dma40_device,
+
+#include "setup.h"
+
+#include "board-mop500-regulators.h"
+#include "board-mop500.h"
+#include "db8500-regs.h"
+#include "id.h"
+
+struct ab8500_platform_data ab8500_platdata = {
+ .regulator = &ab8500_regulator_plat_data,
+};
+
+struct prcmu_pdata db8500_prcmu_pdata = {
+ .ab_platdata = &ab8500_platdata,
+ .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
+ .legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
};
/* minimum static i/o mapping required to boot U8500 platforms */
-static struct map_desc u8500_io_desc[] __initdata = {
- __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
+static struct map_desc u8500_uart_io_desc[] __initdata = {
+ __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
+};
+/* U8500 and U9540 common io_desc */
+static struct map_desc u8500_common_io_desc[] __initdata = {
+ /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
+ __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
+
+ __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
+
__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
- __MEM_DEV_DESC(U8500_BOOT_ROM_BASE, SZ_1M),
};
-static struct map_desc u8500ed_io_desc[] __initdata = {
- __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K),
-};
+/* U8500 IO map specific description */
+static struct map_desc u8500_io_desc[] __initdata = {
+ __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
-static struct map_desc u8500v1_io_desc[] __initdata = {
- __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
};
-/*
- * Functions to differentiate between later ASICs
- * We look into the end of the ROM to locate the hardcoded ASIC ID.
- * This is only needed to differentiate between minor revisions and
- * process variants of an ASIC, the major revisions are encoded in
- * the cpuid.
- */
-#define U8500_ASIC_ID_LOC_ED_V1 (U8500_BOOT_ROM_BASE + 0x1FFF4)
-#define U8500_ASIC_ID_LOC_V2 (U8500_BOOT_ROM_BASE + 0x1DBF4)
-#define U8500_ASIC_REV_ED 0x01
-#define U8500_ASIC_REV_V10 0xA0
-#define U8500_ASIC_REV_V11 0xA1
-#define U8500_ASIC_REV_V20 0xB0
-
-/**
- * struct db8500_asic_id - fields of the ASIC ID
- * @process: the manufacturing process, 0x40 is 40 nm
- * 0x00 is "standard"
- * @partnumber: hithereto 0x8500 for DB8500
- * @revision: version code in the series
- * This field definion is not formally defined but makes
- * sense.
- */
-struct db8500_asic_id {
- u8 process;
- u16 partnumber;
- u8 revision;
+/* U9540 IO map specific description */
+static struct map_desc u9540_io_desc[] __initdata = {
+ __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
+ __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
};
-/* This isn't going to change at runtime */
-static struct db8500_asic_id db8500_id;
-
-static void __init get_db8500_asic_id(void)
+void __init u8500_map_io(void)
{
- u32 asicid;
+ /*
+ * Map the UARTs early so that the DEBUG_LL stuff continues to work.
+ */
+ iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
- if (cpu_is_u8500v1() || cpu_is_u8500ed())
- asicid = readl(__io_address(U8500_ASIC_ID_LOC_ED_V1));
- else if (cpu_is_u8500v2())
- asicid = readl(__io_address(U8500_ASIC_ID_LOC_V2));
- else
- BUG();
+ ux500_map_io();
- db8500_id.process = (asicid >> 24);
- db8500_id.partnumber = (asicid >> 16) & 0xFFFFU;
- db8500_id.revision = asicid & 0xFFU;
-}
+ iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
-bool cpu_is_u8500v10(void)
-{
- return (db8500_id.revision == U8500_ASIC_REV_V10);
+ if (cpu_is_ux540_family())
+ iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
+ else
+ iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
}
-bool cpu_is_u8500v11(void)
+/*
+ * The PMU IRQ lines of two cores are wired together into a single interrupt.
+ * Bounce the interrupt to the other core if it's not ours.
+ */
+static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
{
- return (db8500_id.revision == U8500_ASIC_REV_V11);
+ irqreturn_t ret = handler(irq, dev);
+ int other = !smp_processor_id();
+
+ if (ret == IRQ_NONE && cpu_online(other))
+ irq_set_affinity(irq, cpumask_of(other));
+
+ /*
+ * We should be able to get away with the amount of IRQ_NONEs we give,
+ * while still having the spurious IRQ detection code kick in if the
+ * interrupt really starts hitting spuriously.
+ */
+ return ret;
}
-bool cpu_is_u8500v20(void)
+struct arm_pmu_platdata db8500_pmu_platdata = {
+ .handle_irq = db8500_pmu_handler,
+};
+
+static const char *db8500_read_soc_id(void)
{
- return (db8500_id.revision == U8500_ASIC_REV_V20);
+ void __iomem *uid = __io_address(U8500_BB_UID_BASE);
+
+ /* Throw these device-specific numbers into the entropy pool */
+ add_device_randomness(uid, 0x14);
+ return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
+ readl((u32 *)uid+0),
+ readl((u32 *)uid+1), readl((u32 *)uid+2),
+ readl((u32 *)uid+3), readl((u32 *)uid+4));
}
-void __init u8500_map_io(void)
+static struct device * __init db8500_soc_device_init(void)
{
- ux500_map_io();
-
- iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
-
- if (cpu_is_u8500ed())
- iotable_init(u8500ed_io_desc, ARRAY_SIZE(u8500ed_io_desc));
- else
- iotable_init(u8500v1_io_desc, ARRAY_SIZE(u8500v1_io_desc));
+ const char *soc_id = db8500_read_soc_id();
- /* Read out the ASIC ID as early as we can */
- get_db8500_asic_id();
+ return ux500_soc_device_init(soc_id);
}
-/*
- * This function is called from the board init
- */
-void __init u8500_init_devices(void)
-{
- /* Display some ASIC boilerplate */
- pr_info("DB8500: process: %02x, revision ID: 0x%02x\n",
- db8500_id.process, db8500_id.revision);
- if (cpu_is_u8500ed())
- pr_info("DB8500: Early Drop (ED)\n");
- else if (cpu_is_u8500v10())
- pr_info("DB8500: version 1.0\n");
- else if (cpu_is_u8500v11())
- pr_info("DB8500: version 1.1\n");
- else if (cpu_is_u8500v20())
- pr_info("DB8500: version 2.0\n");
- else
- pr_warning("ASIC: UNKNOWN SILICON VERSION!\n");
+static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
+ /* Requires call-back bindings. */
+ OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
+ /* Requires DMA bindings. */
+ OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
+ "ux500-msp-i2s.0", &msp0_platform_data),
+ OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
+ "ux500-msp-i2s.1", &msp1_platform_data),
+ OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
+ "ux500-msp-i2s.2", &msp2_platform_data),
+ OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
+ "ux500-msp-i2s.3", &msp3_platform_data),
+ /* Requires non-DT:able platform data. */
+ OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
+ &db8500_prcmu_pdata),
+ OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
+ OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
+ OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
+ NULL),
+ {},
+};
- ux500_init_devices();
+static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
+ OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
+ &db8500_prcmu_pdata),
+ {},
+};
- if (cpu_is_u8500ed())
- dma40_u8500ed_fixup();
+static const struct of_device_id u8500_local_bus_nodes[] = {
+ /* only create devices below soc node */
+ { .compatible = "stericsson,db8500", },
+ { .compatible = "stericsson,db8500-prcmu", },
+ { .compatible = "simple-bus"},
+ { },
+};
- /* Register the platform devices */
- platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
+static void __init u8500_init_machine(void)
+{
+ struct device *parent = db8500_soc_device_init();
- return ;
+ /* automatically probe child nodes of dbx5x0 devices */
+ if (of_machine_is_compatible("st-ericsson,u8540"))
+ of_platform_populate(NULL, u8500_local_bus_nodes,
+ u8540_auxdata_lookup, parent);
+ else
+ of_platform_populate(NULL, u8500_local_bus_nodes,
+ u8500_auxdata_lookup, parent);
}
+
+static const char * stericsson_dt_platform_compat[] = {
+ "st-ericsson,u8500",
+ "st-ericsson,u8540",
+ "st-ericsson,u9500",
+ "st-ericsson,u9540",
+ NULL,
+};
+
+DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
+ .smp = smp_ops(ux500_smp_ops),
+ .map_io = u8500_map_io,
+ .init_irq = ux500_init_irq,
+ /* we re-use nomadik timer here */
+ .init_time = ux500_timer_init,
+ .init_machine = u8500_init_machine,
+ .init_late = NULL,
+ .dt_compat = stericsson_dt_platform_compat,
+ .restart = ux500_restart,
+MACHINE_END