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Diffstat (limited to 'arch/arm/mach-ux500/cache-l2x0.c')
-rw-r--r--arch/arm/mach-ux500/cache-l2x0.c36
1 files changed, 21 insertions, 15 deletions
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index da5569d83d5..842ebedbdd1 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c
@@ -5,10 +5,13 @@
*/
#include <linux/io.h>
+#include <linux/of.h>
+
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
-#include <mach/hardware.h>
-#include <mach/id.h>
+
+#include "db8500-regs.h"
+#include "id.h"
static void __iomem *l2x0_base;
@@ -32,28 +35,31 @@ static int __init ux500_l2x0_unlock(void)
return 0;
}
+static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
+{
+ /*
+ * We can't write to secure registers as we are in non-secure
+ * mode, until we have some SMI service available.
+ */
+}
+
static int __init ux500_l2x0_init(void)
{
- if (cpu_is_u5500())
- l2x0_base = __io_address(U5500_L2CC_BASE);
- else if (cpu_is_u8500())
+ if (cpu_is_u8500_family() || cpu_is_ux540_family())
l2x0_base = __io_address(U8500_L2CC_BASE);
else
- ux500_unknown_soc();
+ /* Non-Ux500 platform */
+ return -ENODEV;
/* Unlock before init */
ux500_l2x0_unlock();
- /* 64KB way size, 8 way associativity, force WA */
- l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
+ outer_cache.write_sec = ux500_l2c310_write_sec;
- /*
- * We can't disable l2 as we are in non secure mode, currently
- * this seems be called only during kexec path. So let's
- * override outer.disable with nasty assignment until we have
- * some SMI service available.
- */
- outer_cache.disable = NULL;
+ if (of_have_populated_dt())
+ l2x0_of_init(0, ~0);
+ else
+ l2x0_init(l2x0_base, 0, ~0);
return 0;
}