diff options
Diffstat (limited to 'arch/arm/mach-tegra/include')
21 files changed, 0 insertions, 2032 deletions
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h deleted file mode 100644 index fc3ecb66de0..00000000000 --- a/arch/arm/mach-tegra/include/mach/clk.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/clk.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_CLK_H -#define __MACH_CLK_H - -struct clk; - -void tegra_periph_reset_deassert(struct clk *c); -void tegra_periph_reset_assert(struct clk *c); - -unsigned long clk_get_rate_all_locked(struct clk *c); -void tegra2_sdmmc_tap_delay(struct clk *c, int delay); - -#endif diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S deleted file mode 100644 index 619abc63aee..00000000000 --- a/arch/arm/mach-tegra/include/mach/debug-macro.S +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/debug-macro.S - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross <ccross@google.com> - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <mach/io.h> -#include <mach/iomap.h> - - .macro addruart, rp, rv, tmp - ldr \rp, =IO_APB_PHYS @ physical - ldr \rv, =IO_APB_VIRT @ virtual - orr \rp, \rp, #(TEGRA_DEBUG_UART_BASE & 0xFF) - orr \rp, \rp, #(TEGRA_DEBUG_UART_BASE & 0xFF00) - orr \rv, \rv, #(TEGRA_DEBUG_UART_BASE & 0xFF) - orr \rv, \rv, #(TEGRA_DEBUG_UART_BASE & 0xFF00) - .endm - -#define UART_SHIFT 2 -#include <asm/hardware/debug-8250.S> - diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h deleted file mode 100644 index 3c9339058be..00000000000 --- a/arch/arm/mach-tegra/include/mach/dma.h +++ /dev/null @@ -1,155 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/dma.h - * - * Copyright (c) 2008-2009, NVIDIA Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - */ - -#ifndef __MACH_TEGRA_DMA_H -#define __MACH_TEGRA_DMA_H - -#include <linux/list.h> - -#define TEGRA_DMA_REQ_SEL_CNTR 0 -#define TEGRA_DMA_REQ_SEL_I2S_2 1 -#define TEGRA_DMA_REQ_SEL_I2S_1 2 -#define TEGRA_DMA_REQ_SEL_SPD_I 3 -#define TEGRA_DMA_REQ_SEL_UI_I 4 -#define TEGRA_DMA_REQ_SEL_MIPI 5 -#define TEGRA_DMA_REQ_SEL_I2S2_2 6 -#define TEGRA_DMA_REQ_SEL_I2S2_1 7 -#define TEGRA_DMA_REQ_SEL_UARTA 8 -#define TEGRA_DMA_REQ_SEL_UARTB 9 -#define TEGRA_DMA_REQ_SEL_UARTC 10 -#define TEGRA_DMA_REQ_SEL_SPI 11 -#define TEGRA_DMA_REQ_SEL_AC97 12 -#define TEGRA_DMA_REQ_SEL_ACMODEM 13 -#define TEGRA_DMA_REQ_SEL_SL4B 14 -#define TEGRA_DMA_REQ_SEL_SL2B1 15 -#define TEGRA_DMA_REQ_SEL_SL2B2 16 -#define TEGRA_DMA_REQ_SEL_SL2B3 17 -#define TEGRA_DMA_REQ_SEL_SL2B4 18 -#define TEGRA_DMA_REQ_SEL_UARTD 19 -#define TEGRA_DMA_REQ_SEL_UARTE 20 -#define TEGRA_DMA_REQ_SEL_I2C 21 -#define TEGRA_DMA_REQ_SEL_I2C2 22 -#define TEGRA_DMA_REQ_SEL_I2C3 23 -#define TEGRA_DMA_REQ_SEL_DVC_I2C 24 -#define TEGRA_DMA_REQ_SEL_OWR 25 -#define TEGRA_DMA_REQ_SEL_INVALID 31 - -#if defined(CONFIG_TEGRA_SYSTEM_DMA) - -struct tegra_dma_req; -struct tegra_dma_channel; - -enum tegra_dma_mode { - TEGRA_DMA_SHARED = 1, - TEGRA_DMA_MODE_CONTINOUS = 2, - TEGRA_DMA_MODE_ONESHOT = 4, -}; - -enum tegra_dma_req_error { - TEGRA_DMA_REQ_SUCCESS = 0, - TEGRA_DMA_REQ_ERROR_ABORTED, - TEGRA_DMA_REQ_INFLIGHT, -}; - -enum tegra_dma_req_buff_status { - TEGRA_DMA_REQ_BUF_STATUS_EMPTY = 0, - TEGRA_DMA_REQ_BUF_STATUS_HALF_FULL, - TEGRA_DMA_REQ_BUF_STATUS_FULL, -}; - -struct tegra_dma_req { - struct list_head node; - unsigned int modid; - int instance; - - /* Called when the req is complete and from the DMA ISR context. - * When this is called the req structure is no longer queued by - * the DMA channel. - * - * State of the DMA depends on the number of req it has. If there are - * no DMA requests queued up, then it will STOP the DMA. It there are - * more requests in the DMA, then it will queue the next request. - */ - void (*complete)(struct tegra_dma_req *req); - - /* This is a called from the DMA ISR context when the DMA is still in - * progress and is actively filling same buffer. - * - * In case of continuous mode receive, this threshold is 1/2 the buffer - * size. In other cases, this will not even be called as there is no - * hardware support for it. - * - * In the case of continuous mode receive, if there is next req already - * queued, DMA programs the HW to use that req when this req is - * completed. If there is no "next req" queued, then DMA ISR doesn't do - * anything before calling this callback. - * - * This is mainly used by the cases, where the clients has queued - * only one req and want to get some sort of DMA threshold - * callback to program the next buffer. - * - */ - void (*threshold)(struct tegra_dma_req *req); - - /* 1 to copy to memory. - * 0 to copy from the memory to device FIFO */ - int to_memory; - - void *virt_addr; - - unsigned long source_addr; - unsigned long dest_addr; - unsigned long dest_wrap; - unsigned long source_wrap; - unsigned long source_bus_width; - unsigned long dest_bus_width; - unsigned long req_sel; - unsigned int size; - - /* Updated by the DMA driver on the conpletion of the request. */ - int bytes_transferred; - int status; - - /* DMA completion tracking information */ - int buffer_status; - - /* Client specific data */ - void *dev; -}; - -int tegra_dma_enqueue_req(struct tegra_dma_channel *ch, - struct tegra_dma_req *req); -int tegra_dma_dequeue_req(struct tegra_dma_channel *ch, - struct tegra_dma_req *req); -void tegra_dma_dequeue(struct tegra_dma_channel *ch); -void tegra_dma_flush(struct tegra_dma_channel *ch); - -bool tegra_dma_is_req_inflight(struct tegra_dma_channel *ch, - struct tegra_dma_req *req); -bool tegra_dma_is_empty(struct tegra_dma_channel *ch); - -struct tegra_dma_channel *tegra_dma_allocate_channel(int mode); -void tegra_dma_free_channel(struct tegra_dma_channel *ch); - -int __init tegra_dma_init(void); - -#endif - -#endif diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S deleted file mode 100644 index e577cfe27e7..00000000000 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ /dev/null @@ -1,20 +0,0 @@ -/* arch/arm/mach-tegra/include/mach/entry-macro.S - * - * Copyright (C) 2009 Palm, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-tegra/include/mach/gpio-tegra.h b/arch/arm/mach-tegra/include/mach/gpio-tegra.h deleted file mode 100644 index 87d37fdf508..00000000000 --- a/arch/arm/mach-tegra/include/mach/gpio-tegra.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/gpio.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_GPIO_TEGRA_H -#define __MACH_TEGRA_GPIO_TEGRA_H - -#include <linux/types.h> -#include <mach/irqs.h> - -#define TEGRA_NR_GPIOS INT_GPIO_NR - -#define TEGRA_GPIO_TO_IRQ(gpio) (INT_GPIO_BASE + (gpio)) - -struct tegra_gpio_table { - int gpio; /* GPIO number */ - bool enable; /* Enable for GPIO at init? */ -}; - -void tegra_gpio_config(struct tegra_gpio_table *table, int num); -void tegra_gpio_enable(int gpio); -void tegra_gpio_disable(int gpio); - -#endif diff --git a/arch/arm/mach-tegra/include/mach/gpio.h b/arch/arm/mach-tegra/include/mach/gpio.h deleted file mode 100644 index 40a8c178f10..00000000000 --- a/arch/arm/mach-tegra/include/mach/gpio.h +++ /dev/null @@ -1 +0,0 @@ -/* empty */ diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h deleted file mode 100644 index f15defffb5d..00000000000 --- a/arch/arm/mach-tegra/include/mach/io.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/io.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross <ccross@google.com> - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_IO_H -#define __MACH_TEGRA_IO_H - -#define IO_SPACE_LIMIT 0xffff - -/* On TEGRA, many peripherals are very closely packed in - * two 256MB io windows (that actually only use about 64KB - * at the start of each). - * - * We will just map the first 1MB of each window (to minimize - * pt entries needed) and provide a macro to transform physical - * io addresses to an appropriate void __iomem *. - * - */ - -#ifdef __ASSEMBLY__ -#define IOMEM(x) (x) -#else -#define IOMEM(x) ((void __force __iomem *)(x)) -#endif - -#define IO_IRAM_PHYS 0x40000000 -#define IO_IRAM_VIRT IOMEM(0xFE400000) -#define IO_IRAM_SIZE SZ_256K - -#define IO_CPU_PHYS 0x50040000 -#define IO_CPU_VIRT IOMEM(0xFE000000) -#define IO_CPU_SIZE SZ_16K - -#define IO_PPSB_PHYS 0x60000000 -#define IO_PPSB_VIRT IOMEM(0xFE200000) -#define IO_PPSB_SIZE SZ_1M - -#define IO_APB_PHYS 0x70000000 -#define IO_APB_VIRT IOMEM(0xFE300000) -#define IO_APB_SIZE SZ_1M - -#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz))) -#define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst))) - -#define IO_TO_VIRT(n) ( \ - IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ? \ - IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) : \ - IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ? \ - IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) : \ - IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ? \ - IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \ - IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \ - IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \ - NULL) - -#ifndef __ASSEMBLER__ - -#define IO_ADDRESS(n) (IO_TO_VIRT(n)) - -#ifdef CONFIG_TEGRA_PCI -extern void __iomem *tegra_pcie_io_base; - -static inline void __iomem *__io(unsigned long addr) -{ - return tegra_pcie_io_base + (addr & IO_SPACE_LIMIT); -} -#else -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)addr; -} -#endif - -#define __io(a) __io(a) -#define __mem_pci(a) (a) - -#endif - -#endif diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h deleted file mode 100644 index 19dec3ac085..00000000000 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ /dev/null @@ -1,274 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/iomap.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross <ccross@google.com> - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_IOMAP_H -#define __MACH_TEGRA_IOMAP_H - -#include <asm/sizes.h> - -#define TEGRA_IRAM_BASE 0x40000000 -#define TEGRA_IRAM_SIZE SZ_256K - -#define TEGRA_HOST1X_BASE 0x50000000 -#define TEGRA_HOST1X_SIZE 0x24000 - -#define TEGRA_ARM_PERIF_BASE 0x50040000 -#define TEGRA_ARM_PERIF_SIZE SZ_8K - -#define TEGRA_ARM_PL310_BASE 0x50043000 -#define TEGRA_ARM_PL310_SIZE SZ_4K - -#define TEGRA_ARM_INT_DIST_BASE 0x50041000 -#define TEGRA_ARM_INT_DIST_SIZE SZ_4K - -#define TEGRA_MPE_BASE 0x54040000 -#define TEGRA_MPE_SIZE SZ_256K - -#define TEGRA_VI_BASE 0x54080000 -#define TEGRA_VI_SIZE SZ_256K - -#define TEGRA_ISP_BASE 0x54100000 -#define TEGRA_ISP_SIZE SZ_256K - -#define TEGRA_DISPLAY_BASE 0x54200000 -#define TEGRA_DISPLAY_SIZE SZ_256K - -#define TEGRA_DISPLAY2_BASE 0x54240000 -#define TEGRA_DISPLAY2_SIZE SZ_256K - -#define TEGRA_HDMI_BASE 0x54280000 -#define TEGRA_HDMI_SIZE SZ_256K - -#define TEGRA_GART_BASE 0x58000000 -#define TEGRA_GART_SIZE SZ_32M - -#define TEGRA_RES_SEMA_BASE 0x60001000 -#define TEGRA_RES_SEMA_SIZE SZ_4K - -#define TEGRA_PRIMARY_ICTLR_BASE 0x60004000 -#define TEGRA_PRIMARY_ICTLR_SIZE SZ_64 - -#define TEGRA_SECONDARY_ICTLR_BASE 0x60004100 -#define TEGRA_SECONDARY_ICTLR_SIZE SZ_64 - -#define TEGRA_TERTIARY_ICTLR_BASE 0x60004200 -#define TEGRA_TERTIARY_ICTLR_SIZE SZ_64 - -#define TEGRA_QUATERNARY_ICTLR_BASE 0x60004300 -#define TEGRA_QUATERNARY_ICTLR_SIZE SZ_64 - -#define TEGRA_TMR1_BASE 0x60005000 -#define TEGRA_TMR1_SIZE SZ_8 - -#define TEGRA_TMR2_BASE 0x60005008 -#define TEGRA_TMR2_SIZE SZ_8 - -#define TEGRA_TMRUS_BASE 0x60005010 -#define TEGRA_TMRUS_SIZE SZ_64 - -#define TEGRA_TMR3_BASE 0x60005050 -#define TEGRA_TMR3_SIZE SZ_8 - -#define TEGRA_TMR4_BASE 0x60005058 -#define TEGRA_TMR4_SIZE SZ_8 - -#define TEGRA_CLK_RESET_BASE 0x60006000 -#define TEGRA_CLK_RESET_SIZE SZ_4K - -#define TEGRA_FLOW_CTRL_BASE 0x60007000 -#define TEGRA_FLOW_CTRL_SIZE 20 - -#define TEGRA_AHB_DMA_BASE 0x60008000 -#define TEGRA_AHB_DMA_SIZE SZ_4K - -#define TEGRA_AHB_DMA_CH0_BASE 0x60009000 -#define TEGRA_AHB_DMA_CH0_SIZE 32 - -#define TEGRA_APB_DMA_BASE 0x6000A000 -#define TEGRA_APB_DMA_SIZE SZ_4K - -#define TEGRA_APB_DMA_CH0_BASE 0x6000B000 -#define TEGRA_APB_DMA_CH0_SIZE 32 - -#define TEGRA_AHB_GIZMO_BASE 0x6000C004 -#define TEGRA_AHB_GIZMO_SIZE 0x10C - -#define TEGRA_STATMON_BASE 0x6000C400 -#define TEGRA_STATMON_SIZE SZ_1K - -#define TEGRA_GPIO_BASE 0x6000D000 -#define TEGRA_GPIO_SIZE SZ_4K - -#define TEGRA_EXCEPTION_VECTORS_BASE 0x6000F000 -#define TEGRA_EXCEPTION_VECTORS_SIZE SZ_4K - -#define TEGRA_APB_MISC_BASE 0x70000000 -#define TEGRA_APB_MISC_SIZE SZ_4K - -#define TEGRA_APB_MISC_DAS_BASE 0x70000c00 -#define TEGRA_APB_MISC_DAS_SIZE SZ_128 - -#define TEGRA_AC97_BASE 0x70002000 -#define TEGRA_AC97_SIZE SZ_512 - -#define TEGRA_SPDIF_BASE 0x70002400 -#define TEGRA_SPDIF_SIZE SZ_512 - -#define TEGRA_I2S1_BASE 0x70002800 -#define TEGRA_I2S1_SIZE SZ_256 - -#define TEGRA_I2S2_BASE 0x70002A00 -#define TEGRA_I2S2_SIZE SZ_256 - -#define TEGRA_UARTA_BASE 0x70006000 -#define TEGRA_UARTA_SIZE SZ_64 - -#define TEGRA_UARTB_BASE 0x70006040 -#define TEGRA_UARTB_SIZE SZ_64 - -#define TEGRA_UARTC_BASE 0x70006200 -#define TEGRA_UARTC_SIZE SZ_256 - -#define TEGRA_UARTD_BASE 0x70006300 -#define TEGRA_UARTD_SIZE SZ_256 - -#define TEGRA_UARTE_BASE 0x70006400 -#define TEGRA_UARTE_SIZE SZ_256 - -#define TEGRA_NAND_BASE 0x70008000 -#define TEGRA_NAND_SIZE SZ_256 - -#define TEGRA_HSMMC_BASE 0x70008500 -#define TEGRA_HSMMC_SIZE SZ_256 - -#define TEGRA_SNOR_BASE 0x70009000 -#define TEGRA_SNOR_SIZE SZ_4K - -#define TEGRA_PWFM_BASE 0x7000A000 -#define TEGRA_PWFM_SIZE SZ_256 - -#define TEGRA_PWFM0_BASE 0x7000A000 -#define TEGRA_PWFM0_SIZE 4 - -#define TEGRA_PWFM1_BASE 0x7000A010 -#define TEGRA_PWFM1_SIZE 4 - -#define TEGRA_PWFM2_BASE 0x7000A020 -#define TEGRA_PWFM2_SIZE 4 - -#define TEGRA_PWFM3_BASE 0x7000A030 -#define TEGRA_PWFM3_SIZE 4 - -#define TEGRA_MIPI_BASE 0x7000B000 -#define TEGRA_MIPI_SIZE SZ_256 - -#define TEGRA_I2C_BASE 0x7000C000 -#define TEGRA_I2C_SIZE SZ_256 - -#define TEGRA_TWC_BASE 0x7000C100 -#define TEGRA_TWC_SIZE SZ_256 - -#define TEGRA_SPI_BASE 0x7000C380 -#define TEGRA_SPI_SIZE 48 - -#define TEGRA_I2C2_BASE 0x7000C400 -#define TEGRA_I2C2_SIZE SZ_256 - -#define TEGRA_I2C3_BASE 0x7000C500 -#define TEGRA_I2C3_SIZE SZ_256 - -#define TEGRA_OWR_BASE 0x7000C600 -#define TEGRA_OWR_SIZE 80 - -#define TEGRA_DVC_BASE 0x7000D000 -#define TEGRA_DVC_SIZE SZ_512 - -#define TEGRA_SPI1_BASE 0x7000D400 -#define TEGRA_SPI1_SIZE SZ_512 - -#define TEGRA_SPI2_BASE 0x7000D600 -#define TEGRA_SPI2_SIZE SZ_512 - -#define TEGRA_SPI3_BASE 0x7000D800 -#define TEGRA_SPI3_SIZE SZ_512 - -#define TEGRA_SPI4_BASE 0x7000DA00 -#define TEGRA_SPI4_SIZE SZ_512 - -#define TEGRA_RTC_BASE 0x7000E000 -#define TEGRA_RTC_SIZE SZ_256 - -#define TEGRA_KBC_BASE 0x7000E200 -#define TEGRA_KBC_SIZE SZ_256 - -#define TEGRA_PMC_BASE 0x7000E400 -#define TEGRA_PMC_SIZE SZ_256 - -#define TEGRA_MC_BASE 0x7000F000 -#define TEGRA_MC_SIZE SZ_1K - -#define TEGRA_EMC_BASE 0x7000F400 -#define TEGRA_EMC_SIZE SZ_1K - -#define TEGRA_FUSE_BASE 0x7000F800 -#define TEGRA_FUSE_SIZE SZ_1K - -#define TEGRA_KFUSE_BASE 0x7000FC00 -#define TEGRA_KFUSE_SIZE SZ_1K - -#define TEGRA_CSITE_BASE 0x70040000 -#define TEGRA_CSITE_SIZE SZ_256K - -#define TEGRA_USB_BASE 0xC5000000 -#define TEGRA_USB_SIZE SZ_16K - -#define TEGRA_USB2_BASE 0xC5004000 -#define TEGRA_USB2_SIZE SZ_16K - -#define TEGRA_USB3_BASE 0xC5008000 -#define TEGRA_USB3_SIZE SZ_16K - -#define TEGRA_SDMMC1_BASE 0xC8000000 -#define TEGRA_SDMMC1_SIZE SZ_512 - -#define TEGRA_SDMMC2_BASE 0xC8000200 -#define TEGRA_SDMMC2_SIZE SZ_512 - -#define TEGRA_SDMMC3_BASE 0xC8000400 -#define TEGRA_SDMMC3_SIZE SZ_512 - -#define TEGRA_SDMMC4_BASE 0xC8000600 -#define TEGRA_SDMMC4_SIZE SZ_512 - -#if defined(CONFIG_TEGRA_DEBUG_UART_NONE) -# define TEGRA_DEBUG_UART_BASE 0 -#elif defined(CONFIG_TEGRA_DEBUG_UARTA) -# define TEGRA_DEBUG_UART_BASE TEGRA_UARTA_BASE -#elif defined(CONFIG_TEGRA_DEBUG_UARTB) -# define TEGRA_DEBUG_UART_BASE TEGRA_UARTB_BASE -#elif defined(CONFIG_TEGRA_DEBUG_UARTC) -# define TEGRA_DEBUG_UART_BASE TEGRA_UARTC_BASE -#elif defined(CONFIG_TEGRA_DEBUG_UARTD) -# define TEGRA_DEBUG_UART_BASE TEGRA_UARTD_BASE -#elif defined(CONFIG_TEGRA_DEBUG_UARTE) -# define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE -#endif - -#endif diff --git a/arch/arm/mach-tegra/include/mach/irqs.h b/arch/arm/mach-tegra/include/mach/irqs.h deleted file mode 100644 index a2146cd6867..00000000000 --- a/arch/arm/mach-tegra/include/mach/irqs.h +++ /dev/null @@ -1,181 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/irqs.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross <ccross@google.com> - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_IRQS_H -#define __MACH_TEGRA_IRQS_H - -#define INT_GIC_BASE 0 - -#define IRQ_LOCALTIMER 29 - -/* Primary Interrupt Controller */ -#define INT_PRI_BASE (INT_GIC_BASE + 32) -#define INT_TMR1 (INT_PRI_BASE + 0) -#define INT_TMR2 (INT_PRI_BASE + 1) -#define INT_RTC (INT_PRI_BASE + 2) -#define INT_I2S2 (INT_PRI_BASE + 3) -#define INT_SHR_SEM_INBOX_IBF (INT_PRI_BASE + 4) -#define INT_SHR_SEM_INBOX_IBE (INT_PRI_BASE + 5) -#define INT_SHR_SEM_OUTBOX_IBF (INT_PRI_BASE + 6) -#define INT_SHR_SEM_OUTBOX_IBE (INT_PRI_BASE + 7) -#define INT_VDE_UCQ_ERROR (INT_PRI_BASE + 8) -#define INT_VDE_SYNC_TOKEN (INT_PRI_BASE + 9) -#define INT_VDE_BSE_V (INT_PRI_BASE + 10) -#define INT_VDE_BSE_A (INT_PRI_BASE + 11) -#define INT_VDE_SXE (INT_PRI_BASE + 12) -#define INT_I2S1 (INT_PRI_BASE + 13) -#define INT_SDMMC1 (INT_PRI_BASE + 14) -#define INT_SDMMC2 (INT_PRI_BASE + 15) -#define INT_XIO (INT_PRI_BASE + 16) -#define INT_VDE (INT_PRI_BASE + 17) -#define INT_AVP_UCQ (INT_PRI_BASE + 18) -#define INT_SDMMC3 (INT_PRI_BASE + 19) -#define INT_USB (INT_PRI_BASE + 20) -#define INT_USB2 (INT_PRI_BASE + 21) -#define INT_PRI_RES_22 (INT_PRI_BASE + 22) -#define INT_EIDE (INT_PRI_BASE + 23) -#define INT_NANDFLASH (INT_PRI_BASE + 24) -#define INT_VCP (INT_PRI_BASE + 25) -#define INT_APB_DMA (INT_PRI_BASE + 26) -#define INT_AHB_DMA (INT_PRI_BASE + 27) -#define INT_GNT_0 (INT_PRI_BASE + 28) -#define INT_GNT_1 (INT_PRI_BASE + 29) -#define INT_OWR (INT_PRI_BASE + 30) -#define INT_SDMMC4 (INT_PRI_BASE + 31) - -/* Secondary Interrupt Controller */ -#define INT_SEC_BASE (INT_PRI_BASE + 32) -#define INT_GPIO1 (INT_SEC_BASE + 0) -#define INT_GPIO2 (INT_SEC_BASE + 1) -#define INT_GPIO3 (INT_SEC_BASE + 2) -#define INT_GPIO4 (INT_SEC_BASE + 3) -#define INT_UARTA (INT_SEC_BASE + 4) -#define INT_UARTB (INT_SEC_BASE + 5) -#define INT_I2C (INT_SEC_BASE + 6) -#define INT_SPI (INT_SEC_BASE + 7) -#define INT_TWC (INT_SEC_BASE + 8) -#define INT_TMR3 (INT_SEC_BASE + 9) -#define INT_TMR4 (INT_SEC_BASE + 10) -#define INT_FLOW_RSM0 (INT_SEC_BASE + 11) -#define INT_FLOW_RSM1 (INT_SEC_BASE + 12) -#define INT_SPDIF (INT_SEC_BASE + 13) -#define INT_UARTC (INT_SEC_BASE + 14) -#define INT_MIPI (INT_SEC_BASE + 15) -#define INT_EVENTA (INT_SEC_BASE + 16) -#define INT_EVENTB (INT_SEC_BASE + 17) -#define INT_EVENTC (INT_SEC_BASE + 18) -#define INT_EVENTD (INT_SEC_BASE + 19) -#define INT_VFIR (INT_SEC_BASE + 20) -#define INT_DVC (INT_SEC_BASE + 21) -#define INT_SYS_STATS_MON (INT_SEC_BASE + 22) -#define INT_GPIO5 (INT_SEC_BASE + 23) -#define INT_CPU0_PMU_INTR (INT_SEC_BASE + 24) -#define INT_CPU1_PMU_INTR (INT_SEC_BASE + 25) -#define INT_SEC_RES_26 (INT_SEC_BASE + 26) -#define INT_S_LINK1 (INT_SEC_BASE + 27) -#define INT_APB_DMA_COP (INT_SEC_BASE + 28) -#define INT_AHB_DMA_COP (INT_SEC_BASE + 29) -#define INT_DMA_TX (INT_SEC_BASE + 30) -#define INT_DMA_RX (INT_SEC_BASE + 31) - -/* Tertiary Interrupt Controller */ -#define INT_TRI_BASE (INT_SEC_BASE + 32) -#define INT_HOST1X_COP_SYNCPT (INT_TRI_BASE + 0) -#define INT_HOST1X_MPCORE_SYNCPT (INT_TRI_BASE + 1) -#define INT_HOST1X_COP_GENERAL (INT_TRI_BASE + 2) -#define INT_HOST1X_MPCORE_GENERAL (INT_TRI_BASE + 3) -#define INT_MPE_GENERAL (INT_TRI_BASE + 4) -#define INT_VI_GENERAL (INT_TRI_BASE + 5) -#define INT_EPP_GENERAL (INT_TRI_BASE + 6) -#define INT_ISP_GENERAL (INT_TRI_BASE + 7) -#define INT_2D_GENERAL (INT_TRI_BASE + 8) -#define INT_DISPLAY_GENERAL (INT_TRI_BASE + 9) -#define INT_DISPLAY_B_GENERAL (INT_TRI_BASE + 10) -#define INT_HDMI (INT_TRI_BASE + 11) -#define INT_TVO_GENERAL (INT_TRI_BASE + 12) -#define INT_MC_GENERAL (INT_TRI_BASE + 13) -#define INT_EMC_GENERAL (INT_TRI_BASE + 14) -#define INT_TRI_RES_15 (INT_TRI_BASE + 15) -#define INT_TRI_RES_16 (INT_TRI_BASE + 16) -#define INT_AC97 (INT_TRI_BASE + 17) -#define INT_SPI_2 (INT_TRI_BASE + 18) -#define INT_SPI_3 (INT_TRI_BASE + 19) -#define INT_I2C2 (INT_TRI_BASE + 20) -#define INT_KBC (INT_TRI_BASE + 21) -#define INT_EXTERNAL_PMU (INT_TRI_BASE + 22) -#define INT_GPIO6 (INT_TRI_BASE + 23) -#define INT_TVDAC (INT_TRI_BASE + 24) -#define INT_GPIO7 (INT_TRI_BASE + 25) -#define INT_UARTD (INT_TRI_BASE + 26) -#define INT_UARTE (INT_TRI_BASE + 27) -#define INT_I2C3 (INT_TRI_BASE + 28) -#define INT_SPI_4 (INT_TRI_BASE + 29) -#define INT_TRI_RES_30 (INT_TRI_BASE + 30) -#define INT_SW_RESERVED (INT_TRI_BASE + 31) - -/* Quaternary Interrupt Controller */ -#define INT_QUAD_BASE (INT_TRI_BASE + 32) -#define INT_SNOR (INT_QUAD_BASE + 0) -#define INT_USB3 (INT_QUAD_BASE + 1) -#define INT_PCIE_INTR (INT_QUAD_BASE + 2) -#define INT_PCIE_MSI (INT_QUAD_BASE + 3) -#define INT_QUAD_RES_4 (INT_QUAD_BASE + 4) -#define INT_QUAD_RES_5 (INT_QUAD_BASE + 5) -#define INT_QUAD_RES_6 (INT_QUAD_BASE + 6) -#define INT_QUAD_RES_7 (INT_QUAD_BASE + 7) -#define INT_APB_DMA_CH0 (INT_QUAD_BASE + 8) -#define INT_APB_DMA_CH1 (INT_QUAD_BASE + 9) -#define INT_APB_DMA_CH2 (INT_QUAD_BASE + 10) -#define INT_APB_DMA_CH3 (INT_QUAD_BASE + 11) -#define INT_APB_DMA_CH4 (INT_QUAD_BASE + 12) -#define INT_APB_DMA_CH5 (INT_QUAD_BASE + 13) -#define INT_APB_DMA_CH6 (INT_QUAD_BASE + 14) -#define INT_APB_DMA_CH7 (INT_QUAD_BASE + 15) -#define INT_APB_DMA_CH8 (INT_QUAD_BASE + 16) -#define INT_APB_DMA_CH9 (INT_QUAD_BASE + 17) -#define INT_APB_DMA_CH10 (INT_QUAD_BASE + 18) -#define INT_APB_DMA_CH11 (INT_QUAD_BASE + 19) -#define INT_APB_DMA_CH12 (INT_QUAD_BASE + 20) -#define INT_APB_DMA_CH13 (INT_QUAD_BASE + 21) -#define INT_APB_DMA_CH14 (INT_QUAD_BASE + 22) -#define INT_APB_DMA_CH15 (INT_QUAD_BASE + 23) -#define INT_QUAD_RES_24 (INT_QUAD_BASE + 24) -#define INT_QUAD_RES_25 (INT_QUAD_BASE + 25) -#define INT_QUAD_RES_26 (INT_QUAD_BASE + 26) -#define INT_QUAD_RES_27 (INT_QUAD_BASE + 27) -#define INT_QUAD_RES_28 (INT_QUAD_BASE + 28) -#define INT_QUAD_RES_29 (INT_QUAD_BASE + 29) -#define INT_QUAD_RES_30 (INT_QUAD_BASE + 30) -#define INT_QUAD_RES_31 (INT_QUAD_BASE + 31) - -#define INT_MAIN_NR (INT_QUAD_BASE + 32 - INT_PRI_BASE) - -#define INT_GPIO_BASE (INT_PRI_BASE + INT_MAIN_NR) - -#define INT_GPIO_NR (28 * 8) - -#define TEGRA_NR_IRQS (INT_GPIO_BASE + INT_GPIO_NR) - -#define INT_BOARD_BASE TEGRA_NR_IRQS -#define NR_BOARD_IRQS 32 - -#define NR_IRQS (INT_BOARD_BASE + NR_BOARD_IRQS) - -#endif diff --git a/arch/arm/mach-tegra/include/mach/kbc.h b/arch/arm/mach-tegra/include/mach/kbc.h deleted file mode 100644 index 20bb0545f99..00000000000 --- a/arch/arm/mach-tegra/include/mach/kbc.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Platform definitions for tegra-kbc keyboard input driver - * - * Copyright (c) 2010-2011, NVIDIA Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - */ - -#ifndef ASMARM_ARCH_TEGRA_KBC_H -#define ASMARM_ARCH_TEGRA_KBC_H - -#include <linux/types.h> -#include <linux/input/matrix_keypad.h> - -#ifdef CONFIG_ARCH_TEGRA_2x_SOC -#define KBC_MAX_GPIO 24 -#define KBC_MAX_KPENT 8 -#else -#define KBC_MAX_GPIO 20 -#define KBC_MAX_KPENT 7 -#endif - -#define KBC_MAX_ROW 16 -#define KBC_MAX_COL 8 -#define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL) - -struct tegra_kbc_pin_cfg { - bool is_row; - unsigned char num; -}; - -struct tegra_kbc_wake_key { - u8 row:4; - u8 col:4; -}; - -struct tegra_kbc_platform_data { - unsigned int debounce_cnt; - unsigned int repeat_cnt; - - struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO]; - const struct matrix_keymap_data *keymap_data; - - u32 wakeup_key; - bool wakeup; - bool use_fn_map; - bool use_ghost_filter; -}; -#endif diff --git a/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h b/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h deleted file mode 100644 index 6a40c1dbab1..00000000000 --- a/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h +++ /dev/null @@ -1,184 +0,0 @@ -/* - * linux/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h - * - * Copyright (C) 2010 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_PINMUX_TEGRA20_H -#define __MACH_TEGRA_PINMUX_TEGRA20_H - -enum tegra_pingroup { - TEGRA_PINGROUP_ATA = 0, - TEGRA_PINGROUP_ATB, - TEGRA_PINGROUP_ATC, - TEGRA_PINGROUP_ATD, - TEGRA_PINGROUP_ATE, - TEGRA_PINGROUP_CDEV1, - TEGRA_PINGROUP_CDEV2, - TEGRA_PINGROUP_CRTP, - TEGRA_PINGROUP_CSUS, - TEGRA_PINGROUP_DAP1, - TEGRA_PINGROUP_DAP2, - TEGRA_PINGROUP_DAP3, - TEGRA_PINGROUP_DAP4, - TEGRA_PINGROUP_DDC, - TEGRA_PINGROUP_DTA, - TEGRA_PINGROUP_DTB, - TEGRA_PINGROUP_DTC, - TEGRA_PINGROUP_DTD, - TEGRA_PINGROUP_DTE, - TEGRA_PINGROUP_DTF, - TEGRA_PINGROUP_GMA, - TEGRA_PINGROUP_GMB, - TEGRA_PINGROUP_GMC, - TEGRA_PINGROUP_GMD, - TEGRA_PINGROUP_GME, - TEGRA_PINGROUP_GPU, - TEGRA_PINGROUP_GPU7, - TEGRA_PINGROUP_GPV, - TEGRA_PINGROUP_HDINT, - TEGRA_PINGROUP_I2CP, - TEGRA_PINGROUP_IRRX, - TEGRA_PINGROUP_IRTX, - TEGRA_PINGROUP_KBCA, - TEGRA_PINGROUP_KBCB, - TEGRA_PINGROUP_KBCC, - TEGRA_PINGROUP_KBCD, - TEGRA_PINGROUP_KBCE, - TEGRA_PINGROUP_KBCF, - TEGRA_PINGROUP_LCSN, - TEGRA_PINGROUP_LD0, - TEGRA_PINGROUP_LD1, - TEGRA_PINGROUP_LD10, - TEGRA_PINGROUP_LD11, - TEGRA_PINGROUP_LD12, - TEGRA_PINGROUP_LD13, - TEGRA_PINGROUP_LD14, - TEGRA_PINGROUP_LD15, - TEGRA_PINGROUP_LD16, - TEGRA_PINGROUP_LD17, - TEGRA_PINGROUP_LD2, - TEGRA_PINGROUP_LD3, - TEGRA_PINGROUP_LD4, - TEGRA_PINGROUP_LD5, - TEGRA_PINGROUP_LD6, - TEGRA_PINGROUP_LD7, - TEGRA_PINGROUP_LD8, - TEGRA_PINGROUP_LD9, - TEGRA_PINGROUP_LDC, - TEGRA_PINGROUP_LDI, - TEGRA_PINGROUP_LHP0, - TEGRA_PINGROUP_LHP1, - TEGRA_PINGROUP_LHP2, - TEGRA_PINGROUP_LHS, - TEGRA_PINGROUP_LM0, - TEGRA_PINGROUP_LM1, - TEGRA_PINGROUP_LPP, - TEGRA_PINGROUP_LPW0, - TEGRA_PINGROUP_LPW1, - TEGRA_PINGROUP_LPW2, - TEGRA_PINGROUP_LSC0, - TEGRA_PINGROUP_LSC1, - TEGRA_PINGROUP_LSCK, - TEGRA_PINGROUP_LSDA, - TEGRA_PINGROUP_LSDI, - TEGRA_PINGROUP_LSPI, - TEGRA_PINGROUP_LVP0, - TEGRA_PINGROUP_LVP1, - TEGRA_PINGROUP_LVS, - TEGRA_PINGROUP_OWC, - TEGRA_PINGROUP_PMC, - TEGRA_PINGROUP_PTA, - TEGRA_PINGROUP_RM, - TEGRA_PINGROUP_SDB, - TEGRA_PINGROUP_SDC, - TEGRA_PINGROUP_SDD, - TEGRA_PINGROUP_SDIO1, - TEGRA_PINGROUP_SLXA, - TEGRA_PINGROUP_SLXC, - TEGRA_PINGROUP_SLXD, - TEGRA_PINGROUP_SLXK, - TEGRA_PINGROUP_SPDI, - TEGRA_PINGROUP_SPDO, - TEGRA_PINGROUP_SPIA, - TEGRA_PINGROUP_SPIB, - TEGRA_PINGROUP_SPIC, - TEGRA_PINGROUP_SPID, - TEGRA_PINGROUP_SPIE, - TEGRA_PINGROUP_SPIF, - TEGRA_PINGROUP_SPIG, - TEGRA_PINGROUP_SPIH, - TEGRA_PINGROUP_UAA, - TEGRA_PINGROUP_UAB, - TEGRA_PINGROUP_UAC, - TEGRA_PINGROUP_UAD, - TEGRA_PINGROUP_UCA, - TEGRA_PINGROUP_UCB, - TEGRA_PINGROUP_UDA, - /* these pin groups only have pullup and pull down control */ - TEGRA_PINGROUP_CK32, - TEGRA_PINGROUP_DDRC, - TEGRA_PINGROUP_PMCA, - TEGRA_PINGROUP_PMCB, - TEGRA_PINGROUP_PMCC, - TEGRA_PINGROUP_PMCD, - TEGRA_PINGROUP_PMCE, - TEGRA_PINGROUP_XM2C, - TEGRA_PINGROUP_XM2D, - TEGRA_MAX_PINGROUP, -}; - -enum tegra_drive_pingroup { - TEGRA_DRIVE_PINGROUP_AO1 = 0, - TEGRA_DRIVE_PINGROUP_AO2, - TEGRA_DRIVE_PINGROUP_AT1, - TEGRA_DRIVE_PINGROUP_AT2, - TEGRA_DRIVE_PINGROUP_CDEV1, - TEGRA_DRIVE_PINGROUP_CDEV2, - TEGRA_DRIVE_PINGROUP_CSUS, - TEGRA_DRIVE_PINGROUP_DAP1, - TEGRA_DRIVE_PINGROUP_DAP2, - TEGRA_DRIVE_PINGROUP_DAP3, - TEGRA_DRIVE_PINGROUP_DAP4, - TEGRA_DRIVE_PINGROUP_DBG, - TEGRA_DRIVE_PINGROUP_LCD1, - TEGRA_DRIVE_PINGROUP_LCD2, - TEGRA_DRIVE_PINGROUP_SDMMC2, - TEGRA_DRIVE_PINGROUP_SDMMC3, - TEGRA_DRIVE_PINGROUP_SPI, - TEGRA_DRIVE_PINGROUP_UAA, - TEGRA_DRIVE_PINGROUP_UAB, - TEGRA_DRIVE_PINGROUP_UART2, - TEGRA_DRIVE_PINGROUP_UART3, - TEGRA_DRIVE_PINGROUP_VI1, - TEGRA_DRIVE_PINGROUP_VI2, - TEGRA_DRIVE_PINGROUP_XM2A, - TEGRA_DRIVE_PINGROUP_XM2C, - TEGRA_DRIVE_PINGROUP_XM2D, - TEGRA_DRIVE_PINGROUP_XM2CLK, - TEGRA_DRIVE_PINGROUP_MEMCOMP, - TEGRA_DRIVE_PINGROUP_SDIO1, - TEGRA_DRIVE_PINGROUP_CRT, - TEGRA_DRIVE_PINGROUP_DDC, - TEGRA_DRIVE_PINGROUP_GMA, - TEGRA_DRIVE_PINGROUP_GMB, - TEGRA_DRIVE_PINGROUP_GMC, - TEGRA_DRIVE_PINGROUP_GMD, - TEGRA_DRIVE_PINGROUP_GME, - TEGRA_DRIVE_PINGROUP_OWR, - TEGRA_DRIVE_PINGROUP_UAD, - TEGRA_MAX_DRIVE_PINGROUP, -}; - -#endif - diff --git a/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h b/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h deleted file mode 100644 index c1aee3eb2df..00000000000 --- a/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h +++ /dev/null @@ -1,320 +0,0 @@ -/* - * linux/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h - * - * Copyright (C) 2010 Google, Inc. - * Copyright (C) 2010,2011 Nvidia, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_PINMUX_TEGRA30_H -#define __MACH_TEGRA_PINMUX_TEGRA30_H - -enum tegra_pingroup { - TEGRA_PINGROUP_ULPI_DATA0 = 0, - TEGRA_PINGROUP_ULPI_DATA1, - TEGRA_PINGROUP_ULPI_DATA2, - TEGRA_PINGROUP_ULPI_DATA3, - TEGRA_PINGROUP_ULPI_DATA4, - TEGRA_PINGROUP_ULPI_DATA5, - TEGRA_PINGROUP_ULPI_DATA6, - TEGRA_PINGROUP_ULPI_DATA7, - TEGRA_PINGROUP_ULPI_CLK, - TEGRA_PINGROUP_ULPI_DIR, - TEGRA_PINGROUP_ULPI_NXT, - TEGRA_PINGROUP_ULPI_STP, - TEGRA_PINGROUP_DAP3_FS, - TEGRA_PINGROUP_DAP3_DIN, - TEGRA_PINGROUP_DAP3_DOUT, - TEGRA_PINGROUP_DAP3_SCLK, - TEGRA_PINGROUP_GPIO_PV0, - TEGRA_PINGROUP_GPIO_PV1, - TEGRA_PINGROUP_SDMMC1_CLK, - TEGRA_PINGROUP_SDMMC1_CMD, - TEGRA_PINGROUP_SDMMC1_DAT3, - TEGRA_PINGROUP_SDMMC1_DAT2, - TEGRA_PINGROUP_SDMMC1_DAT1, - TEGRA_PINGROUP_SDMMC1_DAT0, - TEGRA_PINGROUP_GPIO_PV2, - TEGRA_PINGROUP_GPIO_PV3, - TEGRA_PINGROUP_CLK2_OUT, - TEGRA_PINGROUP_CLK2_REQ, - TEGRA_PINGROUP_LCD_PWR1, - TEGRA_PINGROUP_LCD_PWR2, - TEGRA_PINGROUP_LCD_SDIN, - TEGRA_PINGROUP_LCD_SDOUT, - TEGRA_PINGROUP_LCD_WR_N, - TEGRA_PINGROUP_LCD_CS0_N, - TEGRA_PINGROUP_LCD_DC0, - TEGRA_PINGROUP_LCD_SCK, - TEGRA_PINGROUP_LCD_PWR0, - TEGRA_PINGROUP_LCD_PCLK, - TEGRA_PINGROUP_LCD_DE, - TEGRA_PINGROUP_LCD_HSYNC, - TEGRA_PINGROUP_LCD_VSYNC, - TEGRA_PINGROUP_LCD_D0, - TEGRA_PINGROUP_LCD_D1, - TEGRA_PINGROUP_LCD_D2, - TEGRA_PINGROUP_LCD_D3, - TEGRA_PINGROUP_LCD_D4, - TEGRA_PINGROUP_LCD_D5, - TEGRA_PINGROUP_LCD_D6, - TEGRA_PINGROUP_LCD_D7, - TEGRA_PINGROUP_LCD_D8, - TEGRA_PINGROUP_LCD_D9, - TEGRA_PINGROUP_LCD_D10, - TEGRA_PINGROUP_LCD_D11, - TEGRA_PINGROUP_LCD_D12, - TEGRA_PINGROUP_LCD_D13, - TEGRA_PINGROUP_LCD_D14, - TEGRA_PINGROUP_LCD_D15, - TEGRA_PINGROUP_LCD_D16, - TEGRA_PINGROUP_LCD_D17, - TEGRA_PINGROUP_LCD_D18, - TEGRA_PINGROUP_LCD_D19, - TEGRA_PINGROUP_LCD_D20, - TEGRA_PINGROUP_LCD_D21, - TEGRA_PINGROUP_LCD_D22, - TEGRA_PINGROUP_LCD_D23, - TEGRA_PINGROUP_LCD_CS1_N, - TEGRA_PINGROUP_LCD_M1, - TEGRA_PINGROUP_LCD_DC1, - TEGRA_PINGROUP_HDMI_INT, - TEGRA_PINGROUP_DDC_SCL, - TEGRA_PINGROUP_DDC_SDA, - TEGRA_PINGROUP_CRT_HSYNC, - TEGRA_PINGROUP_CRT_VSYNC, - TEGRA_PINGROUP_VI_D0, - TEGRA_PINGROUP_VI_D1, - TEGRA_PINGROUP_VI_D2, - TEGRA_PINGROUP_VI_D3, - TEGRA_PINGROUP_VI_D4, - TEGRA_PINGROUP_VI_D5, - TEGRA_PINGROUP_VI_D6, - TEGRA_PINGROUP_VI_D7, - TEGRA_PINGROUP_VI_D8, - TEGRA_PINGROUP_VI_D9, - TEGRA_PINGROUP_VI_D10, - TEGRA_PINGROUP_VI_D11, - TEGRA_PINGROUP_VI_PCLK, - TEGRA_PINGROUP_VI_MCLK, - TEGRA_PINGROUP_VI_VSYNC, - TEGRA_PINGROUP_VI_HSYNC, - TEGRA_PINGROUP_UART2_RXD, - TEGRA_PINGROUP_UART2_TXD, - TEGRA_PINGROUP_UART2_RTS_N, - TEGRA_PINGROUP_UART2_CTS_N, - TEGRA_PINGROUP_UART3_TXD, - TEGRA_PINGROUP_UART3_RXD, - TEGRA_PINGROUP_UART3_CTS_N, - TEGRA_PINGROUP_UART3_RTS_N, - TEGRA_PINGROUP_GPIO_PU0, - TEGRA_PINGROUP_GPIO_PU1, - TEGRA_PINGROUP_GPIO_PU2, - TEGRA_PINGROUP_GPIO_PU3, - TEGRA_PINGROUP_GPIO_PU4, - TEGRA_PINGROUP_GPIO_PU5, - TEGRA_PINGROUP_GPIO_PU6, - TEGRA_PINGROUP_GEN1_I2C_SDA, - TEGRA_PINGROUP_GEN1_I2C_SCL, - TEGRA_PINGROUP_DAP4_FS, - TEGRA_PINGROUP_DAP4_DIN, - TEGRA_PINGROUP_DAP4_DOUT, - TEGRA_PINGROUP_DAP4_SCLK, - TEGRA_PINGROUP_CLK3_OUT, - TEGRA_PINGROUP_CLK3_REQ, - TEGRA_PINGROUP_GMI_WP_N, - TEGRA_PINGROUP_GMI_IORDY, - TEGRA_PINGROUP_GMI_WAIT, - TEGRA_PINGROUP_GMI_ADV_N, - TEGRA_PINGROUP_GMI_CLK, - TEGRA_PINGROUP_GMI_CS0_N, - TEGRA_PINGROUP_GMI_CS1_N, - TEGRA_PINGROUP_GMI_CS2_N, - TEGRA_PINGROUP_GMI_CS3_N, - TEGRA_PINGROUP_GMI_CS4_N, - TEGRA_PINGROUP_GMI_CS6_N, - TEGRA_PINGROUP_GMI_CS7_N, - TEGRA_PINGROUP_GMI_AD0, - TEGRA_PINGROUP_GMI_AD1, - TEGRA_PINGROUP_GMI_AD2, - TEGRA_PINGROUP_GMI_AD3, - TEGRA_PINGROUP_GMI_AD4, - TEGRA_PINGROUP_GMI_AD5, - TEGRA_PINGROUP_GMI_AD6, - TEGRA_PINGROUP_GMI_AD7, - TEGRA_PINGROUP_GMI_AD8, - TEGRA_PINGROUP_GMI_AD9, - TEGRA_PINGROUP_GMI_AD10, - TEGRA_PINGROUP_GMI_AD11, - TEGRA_PINGROUP_GMI_AD12, - TEGRA_PINGROUP_GMI_AD13, - TEGRA_PINGROUP_GMI_AD14, - TEGRA_PINGROUP_GMI_AD15, - TEGRA_PINGROUP_GMI_A16, - TEGRA_PINGROUP_GMI_A17, - TEGRA_PINGROUP_GMI_A18, - TEGRA_PINGROUP_GMI_A19, - TEGRA_PINGROUP_GMI_WR_N, - TEGRA_PINGROUP_GMI_OE_N, - TEGRA_PINGROUP_GMI_DQS, - TEGRA_PINGROUP_GMI_RST_N, - TEGRA_PINGROUP_GEN2_I2C_SCL, - TEGRA_PINGROUP_GEN2_I2C_SDA, - TEGRA_PINGROUP_SDMMC4_CLK, - TEGRA_PINGROUP_SDMMC4_CMD, - TEGRA_PINGROUP_SDMMC4_DAT0, - TEGRA_PINGROUP_SDMMC4_DAT1, - TEGRA_PINGROUP_SDMMC4_DAT2, - TEGRA_PINGROUP_SDMMC4_DAT3, - TEGRA_PINGROUP_SDMMC4_DAT4, - TEGRA_PINGROUP_SDMMC4_DAT5, - TEGRA_PINGROUP_SDMMC4_DAT6, - TEGRA_PINGROUP_SDMMC4_DAT7, - TEGRA_PINGROUP_SDMMC4_RST_N, - TEGRA_PINGROUP_CAM_MCLK, - TEGRA_PINGROUP_GPIO_PCC1, - TEGRA_PINGROUP_GPIO_PBB0, - TEGRA_PINGROUP_CAM_I2C_SCL, - TEGRA_PINGROUP_CAM_I2C_SDA, - TEGRA_PINGROUP_GPIO_PBB3, - TEGRA_PINGROUP_GPIO_PBB4, - TEGRA_PINGROUP_GPIO_PBB5, - TEGRA_PINGROUP_GPIO_PBB6, - TEGRA_PINGROUP_GPIO_PBB7, - TEGRA_PINGROUP_GPIO_PCC2, - TEGRA_PINGROUP_JTAG_RTCK, - TEGRA_PINGROUP_PWR_I2C_SCL, - TEGRA_PINGROUP_PWR_I2C_SDA, - TEGRA_PINGROUP_KB_ROW0, - TEGRA_PINGROUP_KB_ROW1, - TEGRA_PINGROUP_KB_ROW2, - TEGRA_PINGROUP_KB_ROW3, - TEGRA_PINGROUP_KB_ROW4, - TEGRA_PINGROUP_KB_ROW5, - TEGRA_PINGROUP_KB_ROW6, - TEGRA_PINGROUP_KB_ROW7, - TEGRA_PINGROUP_KB_ROW8, - TEGRA_PINGROUP_KB_ROW9, - TEGRA_PINGROUP_KB_ROW10, - TEGRA_PINGROUP_KB_ROW11, - TEGRA_PINGROUP_KB_ROW12, - TEGRA_PINGROUP_KB_ROW13, - TEGRA_PINGROUP_KB_ROW14, - TEGRA_PINGROUP_KB_ROW15, - TEGRA_PINGROUP_KB_COL0, - TEGRA_PINGROUP_KB_COL1, - TEGRA_PINGROUP_KB_COL2, - TEGRA_PINGROUP_KB_COL3, - TEGRA_PINGROUP_KB_COL4, - TEGRA_PINGROUP_KB_COL5, - TEGRA_PINGROUP_KB_COL6, - TEGRA_PINGROUP_KB_COL7, - TEGRA_PINGROUP_CLK_32K_OUT, - TEGRA_PINGROUP_SYS_CLK_REQ, - TEGRA_PINGROUP_CORE_PWR_REQ, - TEGRA_PINGROUP_CPU_PWR_REQ, - TEGRA_PINGROUP_PWR_INT_N, - TEGRA_PINGROUP_CLK_32K_IN, - TEGRA_PINGROUP_OWR, - TEGRA_PINGROUP_DAP1_FS, - TEGRA_PINGROUP_DAP1_DIN, - TEGRA_PINGROUP_DAP1_DOUT, - TEGRA_PINGROUP_DAP1_SCLK, - TEGRA_PINGROUP_CLK1_REQ, - TEGRA_PINGROUP_CLK1_OUT, - TEGRA_PINGROUP_SPDIF_IN, - TEGRA_PINGROUP_SPDIF_OUT, - TEGRA_PINGROUP_DAP2_FS, - TEGRA_PINGROUP_DAP2_DIN, - TEGRA_PINGROUP_DAP2_DOUT, - TEGRA_PINGROUP_DAP2_SCLK, - TEGRA_PINGROUP_SPI2_MOSI, - TEGRA_PINGROUP_SPI2_MISO, - TEGRA_PINGROUP_SPI2_CS0_N, - TEGRA_PINGROUP_SPI2_SCK, - TEGRA_PINGROUP_SPI1_MOSI, - TEGRA_PINGROUP_SPI1_SCK, - TEGRA_PINGROUP_SPI1_CS0_N, - TEGRA_PINGROUP_SPI1_MISO, - TEGRA_PINGROUP_SPI2_CS1_N, - TEGRA_PINGROUP_SPI2_CS2_N, - TEGRA_PINGROUP_SDMMC3_CLK, - TEGRA_PINGROUP_SDMMC3_CMD, - TEGRA_PINGROUP_SDMMC3_DAT0, - TEGRA_PINGROUP_SDMMC3_DAT1, - TEGRA_PINGROUP_SDMMC3_DAT2, - TEGRA_PINGROUP_SDMMC3_DAT3, - TEGRA_PINGROUP_SDMMC3_DAT4, - TEGRA_PINGROUP_SDMMC3_DAT5, - TEGRA_PINGROUP_SDMMC3_DAT6, - TEGRA_PINGROUP_SDMMC3_DAT7, - TEGRA_PINGROUP_PEX_L0_PRSNT_N, - TEGRA_PINGROUP_PEX_L0_RST_N, - TEGRA_PINGROUP_PEX_L0_CLKREQ_N, - TEGRA_PINGROUP_PEX_WAKE_N, - TEGRA_PINGROUP_PEX_L1_PRSNT_N, - TEGRA_PINGROUP_PEX_L1_RST_N, - TEGRA_PINGROUP_PEX_L1_CLKREQ_N, - TEGRA_PINGROUP_PEX_L2_PRSNT_N, - TEGRA_PINGROUP_PEX_L2_RST_N, - TEGRA_PINGROUP_PEX_L2_CLKREQ_N, - TEGRA_PINGROUP_HDMI_CEC, - TEGRA_MAX_PINGROUP, -}; - -enum tegra_drive_pingroup { - TEGRA_DRIVE_PINGROUP_AO1 = 0, - TEGRA_DRIVE_PINGROUP_AO2, - TEGRA_DRIVE_PINGROUP_AT1, - TEGRA_DRIVE_PINGROUP_AT2, - TEGRA_DRIVE_PINGROUP_AT3, - TEGRA_DRIVE_PINGROUP_AT4, - TEGRA_DRIVE_PINGROUP_AT5, - TEGRA_DRIVE_PINGROUP_CDEV1, - TEGRA_DRIVE_PINGROUP_CDEV2, - TEGRA_DRIVE_PINGROUP_CSUS, - TEGRA_DRIVE_PINGROUP_DAP1, - TEGRA_DRIVE_PINGROUP_DAP2, - TEGRA_DRIVE_PINGROUP_DAP3, - TEGRA_DRIVE_PINGROUP_DAP4, - TEGRA_DRIVE_PINGROUP_DBG, - TEGRA_DRIVE_PINGROUP_LCD1, - TEGRA_DRIVE_PINGROUP_LCD2, - TEGRA_DRIVE_PINGROUP_SDIO2, - TEGRA_DRIVE_PINGROUP_SDIO3, - TEGRA_DRIVE_PINGROUP_SPI, - TEGRA_DRIVE_PINGROUP_UAA, - TEGRA_DRIVE_PINGROUP_UAB, - TEGRA_DRIVE_PINGROUP_UART2, - TEGRA_DRIVE_PINGROUP_UART3, - TEGRA_DRIVE_PINGROUP_VI1, - TEGRA_DRIVE_PINGROUP_SDIO1, - TEGRA_DRIVE_PINGROUP_CRT, - TEGRA_DRIVE_PINGROUP_DDC, - TEGRA_DRIVE_PINGROUP_GMA, - TEGRA_DRIVE_PINGROUP_GMB, - TEGRA_DRIVE_PINGROUP_GMC, - TEGRA_DRIVE_PINGROUP_GMD, - TEGRA_DRIVE_PINGROUP_GME, - TEGRA_DRIVE_PINGROUP_GMF, - TEGRA_DRIVE_PINGROUP_GMG, - TEGRA_DRIVE_PINGROUP_GMH, - TEGRA_DRIVE_PINGROUP_OWR, - TEGRA_DRIVE_PINGROUP_UAD, - TEGRA_DRIVE_PINGROUP_GPV, - TEGRA_DRIVE_PINGROUP_DEV3, - TEGRA_DRIVE_PINGROUP_CEC, - TEGRA_MAX_DRIVE_PINGROUP, -}; - -#endif - diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h deleted file mode 100644 index 055f1792c8f..00000000000 --- a/arch/arm/mach-tegra/include/mach/pinmux.h +++ /dev/null @@ -1,302 +0,0 @@ -/* - * linux/arch/arm/mach-tegra/include/mach/pinmux.h - * - * Copyright (C) 2010 Google, Inc. - * Copyright (C) 2010,2011 Nvidia, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_PINMUX_H -#define __MACH_TEGRA_PINMUX_H - -enum tegra_mux_func { - TEGRA_MUX_RSVD = 0x8000, - TEGRA_MUX_RSVD1 = 0x8000, - TEGRA_MUX_RSVD2 = 0x8001, - TEGRA_MUX_RSVD3 = 0x8002, - TEGRA_MUX_RSVD4 = 0x8003, - TEGRA_MUX_INVALID = 0x4000, - TEGRA_MUX_NONE = -1, - TEGRA_MUX_AHB_CLK, - TEGRA_MUX_APB_CLK, - TEGRA_MUX_AUDIO_SYNC, - TEGRA_MUX_CRT, - TEGRA_MUX_DAP1, - TEGRA_MUX_DAP2, - TEGRA_MUX_DAP3, - TEGRA_MUX_DAP4, - TEGRA_MUX_DAP5, - TEGRA_MUX_DISPLAYA, - TEGRA_MUX_DISPLAYB, - TEGRA_MUX_EMC_TEST0_DLL, - TEGRA_MUX_EMC_TEST1_DLL, - TEGRA_MUX_GMI, - TEGRA_MUX_GMI_INT, - TEGRA_MUX_HDMI, - TEGRA_MUX_I2C, - TEGRA_MUX_I2C2, - TEGRA_MUX_I2C3, - TEGRA_MUX_IDE, - TEGRA_MUX_IRDA, - TEGRA_MUX_KBC, - TEGRA_MUX_MIO, - TEGRA_MUX_MIPI_HS, - TEGRA_MUX_NAND, - TEGRA_MUX_OSC, - TEGRA_MUX_OWR, - TEGRA_MUX_PCIE, - TEGRA_MUX_PLLA_OUT, - TEGRA_MUX_PLLC_OUT1, - TEGRA_MUX_PLLM_OUT1, - TEGRA_MUX_PLLP_OUT2, - TEGRA_MUX_PLLP_OUT3, - TEGRA_MUX_PLLP_OUT4, - TEGRA_MUX_PWM, - TEGRA_MUX_PWR_INTR, - TEGRA_MUX_PWR_ON, - TEGRA_MUX_RTCK, - TEGRA_MUX_SDIO1, - TEGRA_MUX_SDIO2, - TEGRA_MUX_SDIO3, - TEGRA_MUX_SDIO4, - TEGRA_MUX_SFLASH, - TEGRA_MUX_SPDIF, - TEGRA_MUX_SPI1, - TEGRA_MUX_SPI2, - TEGRA_MUX_SPI2_ALT, - TEGRA_MUX_SPI3, - TEGRA_MUX_SPI4, - TEGRA_MUX_TRACE, - TEGRA_MUX_TWC, - TEGRA_MUX_UARTA, - TEGRA_MUX_UARTB, - TEGRA_MUX_UARTC, - TEGRA_MUX_UARTD, - TEGRA_MUX_UARTE, - TEGRA_MUX_ULPI, - TEGRA_MUX_VI, - TEGRA_MUX_VI_SENSOR_CLK, - TEGRA_MUX_XIO, - TEGRA_MUX_BLINK, - TEGRA_MUX_CEC, - TEGRA_MUX_CLK12, - TEGRA_MUX_DAP, - TEGRA_MUX_DAPSDMMC2, - TEGRA_MUX_DDR, - TEGRA_MUX_DEV3, - TEGRA_MUX_DTV, - TEGRA_MUX_VI_ALT1, - TEGRA_MUX_VI_ALT2, - TEGRA_MUX_VI_ALT3, - TEGRA_MUX_EMC_DLL, - TEGRA_MUX_EXTPERIPH1, - TEGRA_MUX_EXTPERIPH2, - TEGRA_MUX_EXTPERIPH3, - TEGRA_MUX_GMI_ALT, - TEGRA_MUX_HDA, - TEGRA_MUX_HSI, - TEGRA_MUX_I2C4, - TEGRA_MUX_I2C5, - TEGRA_MUX_I2CPWR, - TEGRA_MUX_I2S0, - TEGRA_MUX_I2S1, - TEGRA_MUX_I2S2, - TEGRA_MUX_I2S3, - TEGRA_MUX_I2S4, - TEGRA_MUX_NAND_ALT, - TEGRA_MUX_POPSDIO4, - TEGRA_MUX_POPSDMMC4, - TEGRA_MUX_PWM0, - TEGRA_MUX_PWM1, - TEGRA_MUX_PWM2, - TEGRA_MUX_PWM3, - TEGRA_MUX_SATA, - TEGRA_MUX_SPI5, - TEGRA_MUX_SPI6, - TEGRA_MUX_SYSCLK, - TEGRA_MUX_VGP1, - TEGRA_MUX_VGP2, - TEGRA_MUX_VGP3, - TEGRA_MUX_VGP4, - TEGRA_MUX_VGP5, - TEGRA_MUX_VGP6, - TEGRA_MUX_SAFE, - TEGRA_MAX_MUX, -}; - -enum tegra_pullupdown { - TEGRA_PUPD_NORMAL = 0, - TEGRA_PUPD_PULL_DOWN, - TEGRA_PUPD_PULL_UP, -}; - -enum tegra_tristate { - TEGRA_TRI_NORMAL = 0, - TEGRA_TRI_TRISTATE = 1, -}; - -enum tegra_pin_io { - TEGRA_PIN_OUTPUT = 0, - TEGRA_PIN_INPUT = 1, -}; - -enum tegra_vddio { - TEGRA_VDDIO_BB = 0, - TEGRA_VDDIO_LCD, - TEGRA_VDDIO_VI, - TEGRA_VDDIO_UART, - TEGRA_VDDIO_DDR, - TEGRA_VDDIO_NAND, - TEGRA_VDDIO_SYS, - TEGRA_VDDIO_AUDIO, - TEGRA_VDDIO_SD, - TEGRA_VDDIO_CAM, - TEGRA_VDDIO_GMI, - TEGRA_VDDIO_PEXCTL, - TEGRA_VDDIO_SDMMC1, - TEGRA_VDDIO_SDMMC3, - TEGRA_VDDIO_SDMMC4, -}; - -struct tegra_pingroup_config { - int pingroup; - enum tegra_mux_func func; - enum tegra_pullupdown pupd; - enum tegra_tristate tristate; -}; - -enum tegra_slew { - TEGRA_SLEW_FASTEST = 0, - TEGRA_SLEW_FAST, - TEGRA_SLEW_SLOW, - TEGRA_SLEW_SLOWEST, - TEGRA_MAX_SLEW, -}; - -enum tegra_pull_strength { - TEGRA_PULL_0 = 0, - TEGRA_PULL_1, - TEGRA_PULL_2, - TEGRA_PULL_3, - TEGRA_PULL_4, - TEGRA_PULL_5, - TEGRA_PULL_6, - TEGRA_PULL_7, - TEGRA_PULL_8, - TEGRA_PULL_9, - TEGRA_PULL_10, - TEGRA_PULL_11, - TEGRA_PULL_12, - TEGRA_PULL_13, - TEGRA_PULL_14, - TEGRA_PULL_15, - TEGRA_PULL_16, - TEGRA_PULL_17, - TEGRA_PULL_18, - TEGRA_PULL_19, - TEGRA_PULL_20, - TEGRA_PULL_21, - TEGRA_PULL_22, - TEGRA_PULL_23, - TEGRA_PULL_24, - TEGRA_PULL_25, - TEGRA_PULL_26, - TEGRA_PULL_27, - TEGRA_PULL_28, - TEGRA_PULL_29, - TEGRA_PULL_30, - TEGRA_PULL_31, - TEGRA_MAX_PULL, -}; - -enum tegra_drive { - TEGRA_DRIVE_DIV_8 = 0, - TEGRA_DRIVE_DIV_4, - TEGRA_DRIVE_DIV_2, - TEGRA_DRIVE_DIV_1, - TEGRA_MAX_DRIVE, -}; - -enum tegra_hsm { - TEGRA_HSM_DISABLE = 0, - TEGRA_HSM_ENABLE, -}; - -enum tegra_schmitt { - TEGRA_SCHMITT_DISABLE = 0, - TEGRA_SCHMITT_ENABLE, -}; - -struct tegra_drive_pingroup_config { - int pingroup; - enum tegra_hsm hsm; - enum tegra_schmitt schmitt; - enum tegra_drive drive; - enum tegra_pull_strength pull_down; - enum tegra_pull_strength pull_up; - enum tegra_slew slew_rising; - enum tegra_slew slew_falling; -}; - -struct tegra_drive_pingroup_desc { - const char *name; - s16 reg_bank; - s16 reg; -}; - -struct tegra_pingroup_desc { - const char *name; - int funcs[4]; - int func_safe; - int vddio; - enum tegra_pin_io io_default; - s16 tri_bank; /* Register bank the tri_reg exists within */ - s16 mux_bank; /* Register bank the mux_reg exists within */ - s16 pupd_bank; /* Register bank the pupd_reg exists within */ - s16 tri_reg; /* offset into the TRISTATE_REG_* register bank */ - s16 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */ - s16 pupd_reg; /* offset into the PULL_UPDOWN_REG_* register bank */ - s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */ - s8 mux_bit; /* offset into the PIN_MUX_CTL_* register bit */ - s8 pupd_bit; /* offset into the PULL_UPDOWN_REG_* register bit */ - s8 lock_bit; /* offset of the LOCK bit into mux register bit */ - s8 od_bit; /* offset of the OD bit into mux register bit */ - s8 ioreset_bit; /* offset of the IO_RESET bit into mux register bit */ -}; - -typedef void (*pinmux_init) (const struct tegra_pingroup_desc **pg, - int *pg_max, const struct tegra_drive_pingroup_desc **pgdrive, - int *pgdrive_max); - -void tegra20_pinmux_init(const struct tegra_pingroup_desc **pg, int *pg_max, - const struct tegra_drive_pingroup_desc **pgdrive, int *pgdrive_max); - -void tegra30_pinmux_init(const struct tegra_pingroup_desc **pg, int *pg_max, - const struct tegra_drive_pingroup_desc **pgdrive, int *pgdrive_max); - -int tegra_pinmux_set_tristate(int pg, enum tegra_tristate tristate); -int tegra_pinmux_set_pullupdown(int pg, enum tegra_pullupdown pupd); - -void tegra_pinmux_config_table(const struct tegra_pingroup_config *config, - int len); - -void tegra_drive_pinmux_config_table(struct tegra_drive_pingroup_config *config, - int len); -void tegra_pinmux_set_safe_pinmux_table(const struct tegra_pingroup_config *config, - int len); -void tegra_pinmux_config_pinmux_table(const struct tegra_pingroup_config *config, - int len); -void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *config, - int len, enum tegra_tristate tristate); -void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *config, - int len, enum tegra_pullupdown pupd); -#endif diff --git a/arch/arm/mach-tegra/include/mach/powergate.h b/arch/arm/mach-tegra/include/mach/powergate.h deleted file mode 100644 index 39c396d2ddb..00000000000 --- a/arch/arm/mach-tegra/include/mach/powergate.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * drivers/regulator/tegra-regulator.c - * - * Copyright (c) 2010 Google, Inc - * - * Author: - * Colin Cross <ccross@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef _MACH_TEGRA_POWERGATE_H_ -#define _MACH_TEGRA_POWERGATE_H_ - -#define TEGRA_POWERGATE_CPU 0 -#define TEGRA_POWERGATE_3D 1 -#define TEGRA_POWERGATE_VENC 2 -#define TEGRA_POWERGATE_PCIE 3 -#define TEGRA_POWERGATE_VDEC 4 -#define TEGRA_POWERGATE_L2 5 -#define TEGRA_POWERGATE_MPE 6 -#define TEGRA_NUM_POWERGATE 7 - -int tegra_powergate_power_on(int id); -int tegra_powergate_power_off(int id); -int tegra_powergate_remove_clamping(int id); - -/* Must be called with clk disabled, and returns with clk enabled */ -int tegra_powergate_sequence_power_up(int id, struct clk *clk); - -#endif /* _MACH_TEGRA_POWERGATE_H_ */ diff --git a/arch/arm/mach-tegra/include/mach/sdhci.h b/arch/arm/mach-tegra/include/mach/sdhci.h deleted file mode 100644 index 4231bc7b865..00000000000 --- a/arch/arm/mach-tegra/include/mach/sdhci.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * include/asm-arm/arch-tegra/include/mach/sdhci.h - * - * Copyright (C) 2009 Palm, Inc. - * Author: Yvonne Yip <y@palm.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#ifndef __ASM_ARM_ARCH_TEGRA_SDHCI_H -#define __ASM_ARM_ARCH_TEGRA_SDHCI_H - -#include <linux/mmc/host.h> - -struct tegra_sdhci_platform_data { - int cd_gpio; - int wp_gpio; - int power_gpio; - int is_8bit; - int pm_flags; -}; - -#endif diff --git a/arch/arm/mach-tegra/include/mach/suspend.h b/arch/arm/mach-tegra/include/mach/suspend.h deleted file mode 100644 index 5af8715d2e1..00000000000 --- a/arch/arm/mach-tegra/include/mach/suspend.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/suspend.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross <ccross@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - - -#ifndef _MACH_TEGRA_SUSPEND_H_ -#define _MACH_TEGRA_SUSPEND_H_ - -void tegra_pinmux_suspend(void); -void tegra_irq_suspend(void); -void tegra_gpio_suspend(void); -void tegra_clk_suspend(void); -void tegra_dma_suspend(void); -void tegra_timer_suspend(void); - -void tegra_pinmux_resume(void); -void tegra_irq_resume(void); -void tegra_gpio_resume(void); -void tegra_clk_resume(void); -void tegra_dma_resume(void); -void tegra_timer_resume(void); - -#endif /* _MACH_TEGRA_SUSPEND_H_ */ diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h deleted file mode 100644 index a312988bf6f..00000000000 --- a/arch/arm/mach-tegra/include/mach/system.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/system.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross <ccross@google.com> - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_SYSTEM_H -#define __MACH_TEGRA_SYSTEM_H - -static inline void arch_idle(void) -{ -} - -#endif diff --git a/arch/arm/mach-tegra/include/mach/tegra_wm8903_pdata.h b/arch/arm/mach-tegra/include/mach/tegra_wm8903_pdata.h deleted file mode 100644 index 9d293344a7f..00000000000 --- a/arch/arm/mach-tegra/include/mach/tegra_wm8903_pdata.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/tegra_wm8903_pdata.h - * - * Copyright 2011 NVIDIA, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -struct tegra_wm8903_platform_data { - int gpio_spkr_en; - int gpio_hp_det; - int gpio_hp_mute; - int gpio_int_mic_en; - int gpio_ext_mic_en; -}; diff --git a/arch/arm/mach-tegra/include/mach/timex.h b/arch/arm/mach-tegra/include/mach/timex.h deleted file mode 100644 index a44ccbdb7db..00000000000 --- a/arch/arm/mach-tegra/include/mach/timex.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/timex.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross <ccross@google.com> - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_TIMEX_H -#define __MACH_TEGRA_TIMEX_H - -#define CLOCK_TICK_RATE 1000000 - -#endif diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h deleted file mode 100644 index 4e8323770c7..00000000000 --- a/arch/arm/mach-tegra/include/mach/uncompress.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/uncompress.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross <ccross@google.com> - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_UNCOMPRESS_H -#define __MACH_TEGRA_UNCOMPRESS_H - -#include <linux/types.h> -#include <linux/serial_reg.h> - -#include <mach/iomap.h> - -static void putc(int c) -{ - volatile u8 *uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE; - int shift = 2; - - if (uart == NULL) - return; - - while (!(uart[UART_LSR << shift] & UART_LSR_THRE)) - barrier(); - uart[UART_TX << shift] = c; -} - -static inline void flush(void) -{ -} - -static inline void arch_decomp_setup(void) -{ - volatile u8 *uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE; - int shift = 2; - - if (uart == NULL) - return; - - uart[UART_LCR << shift] |= UART_LCR_DLAB; - uart[UART_DLL << shift] = 0x75; - uart[UART_DLM << shift] = 0x0; - uart[UART_LCR << shift] = 3; -} - -static inline void arch_decomp_wdog(void) -{ -} - -#endif diff --git a/arch/arm/mach-tegra/include/mach/usb_phy.h b/arch/arm/mach-tegra/include/mach/usb_phy.h deleted file mode 100644 index d4b8f9e298a..00000000000 --- a/arch/arm/mach-tegra/include/mach/usb_phy.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/usb_phy.h - * - * Copyright (C) 2010 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_USB_PHY_H -#define __MACH_USB_PHY_H - -#include <linux/clk.h> -#include <linux/usb/otg.h> - -struct tegra_utmip_config { - u8 hssync_start_delay; - u8 elastic_limit; - u8 idle_wait_delay; - u8 term_range_adj; - u8 xcvr_setup; - u8 xcvr_lsfslew; - u8 xcvr_lsrslew; -}; - -struct tegra_ulpi_config { - int reset_gpio; - const char *clk; -}; - -enum tegra_usb_phy_port_speed { - TEGRA_USB_PHY_PORT_SPEED_FULL = 0, - TEGRA_USB_PHY_PORT_SPEED_LOW, - TEGRA_USB_PHY_PORT_SPEED_HIGH, -}; - -enum tegra_usb_phy_mode { - TEGRA_USB_PHY_MODE_DEVICE, - TEGRA_USB_PHY_MODE_HOST, -}; - -struct tegra_xtal_freq; - -struct tegra_usb_phy { - int instance; - const struct tegra_xtal_freq *freq; - void __iomem *regs; - void __iomem *pad_regs; - struct clk *clk; - struct clk *pll_u; - struct clk *pad_clk; - enum tegra_usb_phy_mode mode; - void *config; - struct otg_transceiver *ulpi; -}; - -struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs, - void *config, enum tegra_usb_phy_mode phy_mode); - -int tegra_usb_phy_power_on(struct tegra_usb_phy *phy); - -void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy); - -void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy); - -void tegra_usb_phy_power_off(struct tegra_usb_phy *phy); - -void tegra_usb_phy_preresume(struct tegra_usb_phy *phy); - -void tegra_usb_phy_postresume(struct tegra_usb_phy *phy); - -void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, - enum tegra_usb_phy_port_speed port_speed); - -void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy); - -void tegra_usb_phy_close(struct tegra_usb_phy *phy); - -#endif /* __MACH_USB_PHY_H */ |