diff options
Diffstat (limited to 'arch/arm/mach-sunxi/sunxi.c')
| -rw-r--r-- | arch/arm/mach-sunxi/sunxi.c | 111 |
1 files changed, 69 insertions, 42 deletions
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c index 23afb732cb4..b6085084e0f 100644 --- a/arch/arm/mach-sunxi/sunxi.c +++ b/arch/arm/mach-sunxi/sunxi.c @@ -10,6 +10,8 @@ * warranty of any kind, whether express or implied. */ +#include <linux/clk-provider.h> +#include <linux/clocksource.h> #include <linux/delay.h> #include <linux/kernel.h> #include <linux/init.h> @@ -17,68 +19,66 @@ #include <linux/of_irq.h> #include <linux/of_platform.h> #include <linux/io.h> -#include <linux/sunxi_timer.h> - -#include <linux/irqchip/sunxi.h> +#include <linux/reboot.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> - -#include "sunxi.h" - -#define WATCHDOG_CTRL_REG 0x00 -#define WATCHDOG_CTRL_RESTART (1 << 0) -#define WATCHDOG_MODE_REG 0x04 -#define WATCHDOG_MODE_ENABLE (1 << 0) -#define WATCHDOG_MODE_RESET_ENABLE (1 << 1) +#include <asm/system_misc.h> + +#define SUN4I_WATCHDOG_CTRL_REG 0x00 +#define SUN4I_WATCHDOG_CTRL_RESTART BIT(0) +#define SUN4I_WATCHDOG_MODE_REG 0x04 +#define SUN4I_WATCHDOG_MODE_ENABLE BIT(0) +#define SUN4I_WATCHDOG_MODE_RESET_ENABLE BIT(1) + +#define SUN6I_WATCHDOG1_IRQ_REG 0x00 +#define SUN6I_WATCHDOG1_CTRL_REG 0x10 +#define SUN6I_WATCHDOG1_CTRL_RESTART BIT(0) +#define SUN6I_WATCHDOG1_CONFIG_REG 0x14 +#define SUN6I_WATCHDOG1_CONFIG_RESTART BIT(0) +#define SUN6I_WATCHDOG1_CONFIG_IRQ BIT(1) +#define SUN6I_WATCHDOG1_MODE_REG 0x18 +#define SUN6I_WATCHDOG1_MODE_ENABLE BIT(0) static void __iomem *wdt_base; -static void sunxi_setup_restart(void) -{ - struct device_node *np = of_find_compatible_node(NULL, NULL, - "allwinner,sunxi-wdt"); - if (WARN(!np, "unable to setup watchdog restart")) - return; - - wdt_base = of_iomap(np, 0); - WARN(!wdt_base, "failed to map watchdog base address"); -} - -static void sunxi_restart(char mode, const char *cmd) +static void sun4i_restart(enum reboot_mode mode, const char *cmd) { if (!wdt_base) return; /* Enable timer and set reset bit in the watchdog */ - writel(WATCHDOG_MODE_ENABLE | WATCHDOG_MODE_RESET_ENABLE, - wdt_base + WATCHDOG_MODE_REG); + writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE, + wdt_base + SUN4I_WATCHDOG_MODE_REG); /* * Restart the watchdog. The default (and lowest) interval * value for the watchdog is 0.5s. */ - writel(WATCHDOG_CTRL_RESTART, wdt_base + WATCHDOG_CTRL_REG); + writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG); while (1) { mdelay(5); - writel(WATCHDOG_MODE_ENABLE | WATCHDOG_MODE_RESET_ENABLE, - wdt_base + WATCHDOG_MODE_REG); + writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE, + wdt_base + SUN4I_WATCHDOG_MODE_REG); } } -static struct map_desc sunxi_io_desc[] __initdata = { - { - .virtual = (unsigned long) SUNXI_REGS_VIRT_BASE, - .pfn = __phys_to_pfn(SUNXI_REGS_PHYS_BASE), - .length = SUNXI_REGS_SIZE, - .type = MT_DEVICE, - }, +static struct of_device_id sunxi_restart_ids[] = { + { .compatible = "allwinner,sun4i-a10-wdt" }, + { /*sentinel*/ } }; -void __init sunxi_map_io(void) +static void sunxi_setup_restart(void) { - iotable_init(sunxi_io_desc, ARRAY_SIZE(sunxi_io_desc)); + struct device_node *np; + + np = of_find_matching_node(NULL, sunxi_restart_ids); + if (WARN(!np, "unable to setup watchdog restart")) + return; + + wdt_base = of_iomap(np, 0); + WARN(!wdt_base, "failed to map watchdog base address"); } static void __init sunxi_dt_init(void) @@ -90,16 +90,43 @@ static void __init sunxi_dt_init(void) static const char * const sunxi_board_dt_compat[] = { "allwinner,sun4i-a10", + "allwinner,sun5i-a10s", "allwinner,sun5i-a13", NULL, }; DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)") .init_machine = sunxi_dt_init, - .map_io = sunxi_map_io, - .init_irq = sunxi_init_irq, - .handle_irq = sunxi_handle_irq, - .restart = sunxi_restart, - .init_time = &sunxi_timer_init, .dt_compat = sunxi_board_dt_compat, + .restart = sun4i_restart, +MACHINE_END + +static const char * const sun6i_board_dt_compat[] = { + "allwinner,sun6i-a31", + NULL, +}; + +extern void __init sun6i_reset_init(void); +static void __init sun6i_timer_init(void) +{ + of_clk_init(NULL); + if (IS_ENABLED(CONFIG_RESET_CONTROLLER)) + sun6i_reset_init(); + clocksource_of_init(); +} + +DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family") + .init_time = sun6i_timer_init, + .dt_compat = sun6i_board_dt_compat, +MACHINE_END + +static const char * const sun7i_board_dt_compat[] = { + "allwinner,sun7i-a20", + NULL, +}; + +DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family") + .init_machine = sunxi_dt_init, + .dt_compat = sun7i_board_dt_compat, + .restart = sun4i_restart, MACHINE_END |