diff options
Diffstat (limited to 'arch/arm/mach-spear3xx/include')
18 files changed, 0 insertions, 1145 deletions
diff --git a/arch/arm/mach-spear3xx/include/mach/clkdev.h b/arch/arm/mach-spear3xx/include/mach/clkdev.h deleted file mode 100644 index a3d07339d9f..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/clkdev.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/clkdev.h - * - * Clock Dev framework definitions for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_CLKDEV_H -#define __MACH_CLKDEV_H - -#include <plat/clkdev.h> - -#endif /* __MACH_CLKDEV_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/debug-macro.S b/arch/arm/mach-spear3xx/include/mach/debug-macro.S deleted file mode 100644 index 590519f10d6..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/debug-macro.S +++ /dev/null @@ -1,14 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/debug-macro.S - * - * Debugging macro include header spear3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <plat/debug-macro.S> diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S deleted file mode 100644 index 947625d6b48..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S +++ /dev/null @@ -1,46 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/hardware.h> -#include <mach/spear.h> -#include <asm/hardware/vic.h> - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status - teq \irqstat, #0 - beq 1001f @ this will set/reset - @ zero register - /* - * Following code will find bit position of least significang - * bit set in irqstat, using following equation - * least significant bit set in n = (n & ~(n-1)) - */ - sub \tmp, \irqstat, #1 @ tmp = irqstat - 1 - mvn \tmp, \tmp @ tmp = ~tmp - and \irqstat, \irqstat, \tmp @ irqstat &= tmp - /* Now, irqstat is = bit no. of 1st bit set in vic irq status */ - clz \tmp, \irqstat @ tmp = leading zeros - rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1 - -1001: /* EQ will be set if no irqs pending */ - .endm diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h deleted file mode 100644 index af7e02c909a..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/generic.h +++ /dev/null @@ -1,205 +0,0 @@ -/* - * arch/arm/mach-spear3xx/generic.h - * - * SPEAr3XX machine family generic header file - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_GENERIC_H -#define __MACH_GENERIC_H - -#include <asm/mach/time.h> -#include <asm/mach/map.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/amba/bus.h> -#include <plat/padmux.h> - -/* spear3xx declarations */ -/* - * Each GPT has 2 timer channels - * Following GPT channels will be used as clock source and clockevent - */ -#define SPEAR_GPT0_BASE SPEAR3XX_ML1_TMR_BASE -#define SPEAR_GPT0_CHAN0_IRQ IRQ_CPU_GPT1_1 -#define SPEAR_GPT0_CHAN1_IRQ IRQ_CPU_GPT1_2 - -/* Add spear3xx family device structure declarations here */ -extern struct amba_device gpio_device; -extern struct amba_device uart_device; -extern struct sys_timer spear_sys_timer; - -/* Add spear3xx family function declarations here */ -void __init clk_init(void); -void __init spear3xx_map_io(void); -void __init spear3xx_init_irq(void); -void __init spear3xx_init(void); -void spear_pmx_init(struct pmx_driver *pmx_driver, uint base, uint size); - -/* pad mux declarations */ -#define PMX_FIRDA_MASK (1 << 14) -#define PMX_I2C_MASK (1 << 13) -#define PMX_SSP_CS_MASK (1 << 12) -#define PMX_SSP_MASK (1 << 11) -#define PMX_MII_MASK (1 << 10) -#define PMX_GPIO_PIN0_MASK (1 << 9) -#define PMX_GPIO_PIN1_MASK (1 << 8) -#define PMX_GPIO_PIN2_MASK (1 << 7) -#define PMX_GPIO_PIN3_MASK (1 << 6) -#define PMX_GPIO_PIN4_MASK (1 << 5) -#define PMX_GPIO_PIN5_MASK (1 << 4) -#define PMX_UART0_MODEM_MASK (1 << 3) -#define PMX_UART0_MASK (1 << 2) -#define PMX_TIMER_3_4_MASK (1 << 1) -#define PMX_TIMER_1_2_MASK (1 << 0) - -/* pad mux devices */ -extern struct pmx_dev pmx_firda; -extern struct pmx_dev pmx_i2c; -extern struct pmx_dev pmx_ssp_cs; -extern struct pmx_dev pmx_ssp; -extern struct pmx_dev pmx_mii; -extern struct pmx_dev pmx_gpio_pin0; -extern struct pmx_dev pmx_gpio_pin1; -extern struct pmx_dev pmx_gpio_pin2; -extern struct pmx_dev pmx_gpio_pin3; -extern struct pmx_dev pmx_gpio_pin4; -extern struct pmx_dev pmx_gpio_pin5; -extern struct pmx_dev pmx_uart0_modem; -extern struct pmx_dev pmx_uart0; -extern struct pmx_dev pmx_timer_3_4; -extern struct pmx_dev pmx_timer_1_2; - -#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) -/* padmux plgpio devices */ -extern struct pmx_dev pmx_plgpio_0_1; -extern struct pmx_dev pmx_plgpio_2_3; -extern struct pmx_dev pmx_plgpio_4_5; -extern struct pmx_dev pmx_plgpio_6_9; -extern struct pmx_dev pmx_plgpio_10_27; -extern struct pmx_dev pmx_plgpio_28; -extern struct pmx_dev pmx_plgpio_29; -extern struct pmx_dev pmx_plgpio_30; -extern struct pmx_dev pmx_plgpio_31; -extern struct pmx_dev pmx_plgpio_32; -extern struct pmx_dev pmx_plgpio_33; -extern struct pmx_dev pmx_plgpio_34_36; -extern struct pmx_dev pmx_plgpio_37_42; -extern struct pmx_dev pmx_plgpio_43_44_47_48; -extern struct pmx_dev pmx_plgpio_45_46_49_50; -#endif - -extern struct pmx_driver pmx_driver; - -/* spear300 declarations */ -#ifdef CONFIG_MACH_SPEAR300 -/* Add spear300 machine device structure declarations here */ -extern struct amba_device gpio1_device; - -/* pad mux modes */ -extern struct pmx_mode nand_mode; -extern struct pmx_mode nor_mode; -extern struct pmx_mode photo_frame_mode; -extern struct pmx_mode lend_ip_phone_mode; -extern struct pmx_mode hend_ip_phone_mode; -extern struct pmx_mode lend_wifi_phone_mode; -extern struct pmx_mode hend_wifi_phone_mode; -extern struct pmx_mode ata_pabx_wi2s_mode; -extern struct pmx_mode ata_pabx_i2s_mode; -extern struct pmx_mode caml_lcdw_mode; -extern struct pmx_mode camu_lcd_mode; -extern struct pmx_mode camu_wlcd_mode; -extern struct pmx_mode caml_lcd_mode; - -/* pad mux devices */ -extern struct pmx_dev pmx_fsmc_2_chips; -extern struct pmx_dev pmx_fsmc_4_chips; -extern struct pmx_dev pmx_keyboard; -extern struct pmx_dev pmx_clcd; -extern struct pmx_dev pmx_telecom_gpio; -extern struct pmx_dev pmx_telecom_tdm; -extern struct pmx_dev pmx_telecom_spi_cs_i2c_clk; -extern struct pmx_dev pmx_telecom_camera; -extern struct pmx_dev pmx_telecom_dac; -extern struct pmx_dev pmx_telecom_i2s; -extern struct pmx_dev pmx_telecom_boot_pins; -extern struct pmx_dev pmx_telecom_sdio_4bit; -extern struct pmx_dev pmx_telecom_sdio_8bit; -extern struct pmx_dev pmx_gpio1; - -void spear300_pmx_init(void); - -/* Add spear300 machine function declarations here */ -void __init spear300_init(void); - -#endif /* CONFIG_MACH_SPEAR300 */ - -/* spear310 declarations */ -#ifdef CONFIG_MACH_SPEAR310 -/* Add spear310 machine device structure declarations here */ - -/* pad mux devices */ -extern struct pmx_dev pmx_emi_cs_0_1_4_5; -extern struct pmx_dev pmx_emi_cs_2_3; -extern struct pmx_dev pmx_uart1; -extern struct pmx_dev pmx_uart2; -extern struct pmx_dev pmx_uart3_4_5; -extern struct pmx_dev pmx_fsmc; -extern struct pmx_dev pmx_rs485_0_1; -extern struct pmx_dev pmx_tdm0; - -void spear310_pmx_init(void); - -/* Add spear310 machine function declarations here */ -void __init spear310_init(void); - -#endif /* CONFIG_MACH_SPEAR310 */ - -/* spear320 declarations */ -#ifdef CONFIG_MACH_SPEAR320 -/* Add spear320 machine device structure declarations here */ - -/* pad mux modes */ -extern struct pmx_mode auto_net_smii_mode; -extern struct pmx_mode auto_net_mii_mode; -extern struct pmx_mode auto_exp_mode; -extern struct pmx_mode small_printers_mode; - -/* pad mux devices */ -extern struct pmx_dev pmx_clcd; -extern struct pmx_dev pmx_emi; -extern struct pmx_dev pmx_fsmc; -extern struct pmx_dev pmx_spp; -extern struct pmx_dev pmx_sdio; -extern struct pmx_dev pmx_i2s; -extern struct pmx_dev pmx_uart1; -extern struct pmx_dev pmx_uart1_modem; -extern struct pmx_dev pmx_uart2; -extern struct pmx_dev pmx_touchscreen; -extern struct pmx_dev pmx_can; -extern struct pmx_dev pmx_sdio_led; -extern struct pmx_dev pmx_pwm0; -extern struct pmx_dev pmx_pwm1; -extern struct pmx_dev pmx_pwm2; -extern struct pmx_dev pmx_pwm3; -extern struct pmx_dev pmx_ssp1; -extern struct pmx_dev pmx_ssp2; -extern struct pmx_dev pmx_mii1; -extern struct pmx_dev pmx_smii0; -extern struct pmx_dev pmx_smii1; -extern struct pmx_dev pmx_i2c1; - -void spear320_pmx_init(void); - -/* Add spear320 machine function declarations here */ -void __init spear320_init(void); - -#endif /* CONFIG_MACH_SPEAR320 */ - -#endif /* __MACH_GENERIC_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/gpio.h b/arch/arm/mach-spear3xx/include/mach/gpio.h deleted file mode 100644 index 451b2081bfc..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/gpio.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/gpio.h - * - * GPIO macros for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_GPIO_H -#define __MACH_GPIO_H - -#include <plat/gpio.h> - -#endif /* __MACH_GPIO_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/hardware.h b/arch/arm/mach-spear3xx/include/mach/hardware.h deleted file mode 100644 index 4a86e6a3c44..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/hardware.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/hardware.h - * - * Hardware definitions for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_HARDWARE_H -#define __MACH_HARDWARE_H - -/* Vitual to physical translation of statically mapped space */ -#define IO_ADDRESS(x) (x | 0xF0000000) - -#endif /* __MACH_HARDWARE_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/io.h b/arch/arm/mach-spear3xx/include/mach/io.h deleted file mode 100644 index 30cff8a1f6b..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/io.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/io.h - * - * IO definitions for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_IO_H -#define __MACH_IO_H - -#include <plat/io.h> - -#endif /* __MACH_IO_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h deleted file mode 100644 index 7f940b81847..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/irqs.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/irqs.h - * - * IRQ helper macros for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_IRQS_H -#define __MACH_IRQS_H - -/* SPEAr3xx IRQ definitions */ -#define IRQ_HW_ACCEL_MOD_0 0 -#define IRQ_INTRCOMM_RAS_ARM 1 -#define IRQ_CPU_GPT1_1 2 -#define IRQ_CPU_GPT1_2 3 -#define IRQ_BASIC_GPT1_1 4 -#define IRQ_BASIC_GPT1_2 5 -#define IRQ_BASIC_GPT2_1 6 -#define IRQ_BASIC_GPT2_2 7 -#define IRQ_BASIC_DMA 8 -#define IRQ_BASIC_SMI 9 -#define IRQ_BASIC_RTC 10 -#define IRQ_BASIC_GPIO 11 -#define IRQ_BASIC_WDT 12 -#define IRQ_DDR_CONTROLLER 13 -#define IRQ_SYS_ERROR 14 -#define IRQ_WAKEUP_RCV 15 -#define IRQ_JPEG 16 -#define IRQ_IRDA 17 -#define IRQ_ADC 18 -#define IRQ_UART 19 -#define IRQ_SSP 20 -#define IRQ_I2C 21 -#define IRQ_MAC_1 22 -#define IRQ_MAC_2 23 -#define IRQ_USB_DEV 24 -#define IRQ_USB_H_OHCI_0 25 -#define IRQ_USB_H_EHCI_0 26 -#define IRQ_USB_H_EHCI_1 IRQ_USB_H_EHCI_0 -#define IRQ_USB_H_OHCI_1 27 -#define IRQ_GEN_RAS_1 28 -#define IRQ_GEN_RAS_2 29 -#define IRQ_GEN_RAS_3 30 -#define IRQ_HW_ACCEL_MOD_1 31 -#define IRQ_VIC_END 32 - -#define VIRQ_START IRQ_VIC_END - -/* SPEAr300 Virtual irq definitions */ -#ifdef CONFIG_MACH_SPEAR300 -/* IRQs sharing IRQ_GEN_RAS_1 */ -#define VIRQ_IT_PERS_S (VIRQ_START + 0) -#define VIRQ_IT_CHANGE_S (VIRQ_START + 1) -#define VIRQ_I2S (VIRQ_START + 2) -#define VIRQ_TDM (VIRQ_START + 3) -#define VIRQ_CAMERA_L (VIRQ_START + 4) -#define VIRQ_CAMERA_F (VIRQ_START + 5) -#define VIRQ_CAMERA_V (VIRQ_START + 6) -#define VIRQ_KEYBOARD (VIRQ_START + 7) -#define VIRQ_GPIO1 (VIRQ_START + 8) - -/* IRQs sharing IRQ_GEN_RAS_3 */ -#define IRQ_CLCD IRQ_GEN_RAS_3 - -/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ -#define IRQ_SDIO IRQ_INTRCOMM_RAS_ARM - -/* GPIO pins virtual irqs */ -#define SPEAR_GPIO_INT_BASE (VIRQ_START + 9) -#define SPEAR_GPIO1_INT_BASE (SPEAR_GPIO_INT_BASE + 8) -#define SPEAR_GPIO_INT_END (SPEAR_GPIO1_INT_BASE + 8) - -/* SPEAr310 Virtual irq definitions */ -#elif defined(CONFIG_MACH_SPEAR310) -/* IRQs sharing IRQ_GEN_RAS_1 */ -#define VIRQ_SMII0 (VIRQ_START + 0) -#define VIRQ_SMII1 (VIRQ_START + 1) -#define VIRQ_SMII2 (VIRQ_START + 2) -#define VIRQ_SMII3 (VIRQ_START + 3) -#define VIRQ_WAKEUP_SMII0 (VIRQ_START + 4) -#define VIRQ_WAKEUP_SMII1 (VIRQ_START + 5) -#define VIRQ_WAKEUP_SMII2 (VIRQ_START + 6) -#define VIRQ_WAKEUP_SMII3 (VIRQ_START + 7) - -/* IRQs sharing IRQ_GEN_RAS_2 */ -#define VIRQ_UART1 (VIRQ_START + 8) -#define VIRQ_UART2 (VIRQ_START + 9) -#define VIRQ_UART3 (VIRQ_START + 10) -#define VIRQ_UART4 (VIRQ_START + 11) -#define VIRQ_UART5 (VIRQ_START + 12) - -/* IRQs sharing IRQ_GEN_RAS_3 */ -#define VIRQ_EMI (VIRQ_START + 13) -#define VIRQ_PLGPIO (VIRQ_START + 14) - -/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ -#define VIRQ_TDM_HDLC (VIRQ_START + 15) -#define VIRQ_RS485_0 (VIRQ_START + 16) -#define VIRQ_RS485_1 (VIRQ_START + 17) - -/* GPIO pins virtual irqs */ -#define SPEAR_GPIO_INT_BASE (VIRQ_START + 18) - -/* SPEAr320 Virtual irq definitions */ -#else -/* IRQs sharing IRQ_GEN_RAS_1 */ -#define VIRQ_EMI (VIRQ_START + 0) -#define VIRQ_CLCD (VIRQ_START + 1) -#define VIRQ_SPP (VIRQ_START + 2) - -/* IRQs sharing IRQ_GEN_RAS_2 */ -#define IRQ_SDIO IRQ_GEN_RAS_2 - -/* IRQs sharing IRQ_GEN_RAS_3 */ -#define VIRQ_PLGPIO (VIRQ_START + 3) -#define VIRQ_I2S_PLAY (VIRQ_START + 4) -#define VIRQ_I2S_REC (VIRQ_START + 5) - -/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ -#define VIRQ_CANU (VIRQ_START + 6) -#define VIRQ_CANL (VIRQ_START + 7) -#define VIRQ_UART1 (VIRQ_START + 8) -#define VIRQ_UART2 (VIRQ_START + 9) -#define VIRQ_SSP1 (VIRQ_START + 10) -#define VIRQ_SSP2 (VIRQ_START + 11) -#define VIRQ_SMII0 (VIRQ_START + 12) -#define VIRQ_MII1_SMII1 (VIRQ_START + 13) -#define VIRQ_WAKEUP_SMII0 (VIRQ_START + 14) -#define VIRQ_WAKEUP_MII1_SMII1 (VIRQ_START + 15) -#define VIRQ_I2C (VIRQ_START + 16) - -/* GPIO pins virtual irqs */ -#define SPEAR_GPIO_INT_BASE (VIRQ_START + 17) - -#endif - -/* PLGPIO Virtual IRQs */ -#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) -#define SPEAR_PLGPIO_INT_BASE (SPEAR_GPIO_INT_BASE + 8) -#define SPEAR_GPIO_INT_END (SPEAR_PLGPIO_INT_BASE + 102) -#endif - -#define VIRQ_END SPEAR_GPIO_INT_END -#define NR_IRQS VIRQ_END - -#endif /* __MACH_IRQS_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/memory.h b/arch/arm/mach-spear3xx/include/mach/memory.h deleted file mode 100644 index 51735221ea1..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/memory.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/memory.h - * - * Memory map for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_MEMORY_H -#define __MACH_MEMORY_H - -#include <plat/memory.h> - -#endif /* __MACH_MEMORY_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h deleted file mode 100644 index 38d767a1aba..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/misc_regs.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/misc_regs.h - * - * Miscellaneous registers definitions for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_MISC_REGS_H -#define __MACH_MISC_REGS_H - -#include <mach/spear.h> - -#define MISC_BASE VA_SPEAR3XX_ICM3_MISC_REG_BASE - -#define SOC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x000)) -#define DIAG_CFG_CTR ((unsigned int *)(MISC_BASE + 0x004)) -#define PLL1_CTR ((unsigned int *)(MISC_BASE + 0x008)) -#define PLL1_FRQ ((unsigned int *)(MISC_BASE + 0x00C)) -#define PLL1_MOD ((unsigned int *)(MISC_BASE + 0x010)) -#define PLL2_CTR ((unsigned int *)(MISC_BASE + 0x014)) -/* PLL_CTR register masks */ -#define PLL_ENABLE 2 -#define PLL_MODE_SHIFT 4 -#define PLL_MODE_MASK 0x3 -#define PLL_MODE_NORMAL 0 -#define PLL_MODE_FRACTION 1 -#define PLL_MODE_DITH_DSB 2 -#define PLL_MODE_DITH_SSB 3 - -#define PLL2_FRQ ((unsigned int *)(MISC_BASE + 0x018)) -/* PLL FRQ register masks */ -#define PLL_DIV_N_SHIFT 0 -#define PLL_DIV_N_MASK 0xFF -#define PLL_DIV_P_SHIFT 8 -#define PLL_DIV_P_MASK 0x7 -#define PLL_NORM_FDBK_M_SHIFT 24 -#define PLL_NORM_FDBK_M_MASK 0xFF -#define PLL_DITH_FDBK_M_SHIFT 16 -#define PLL_DITH_FDBK_M_MASK 0xFFFF - -#define PLL2_MOD ((unsigned int *)(MISC_BASE + 0x01C)) -#define PLL_CLK_CFG ((unsigned int *)(MISC_BASE + 0x020)) -#define CORE_CLK_CFG ((unsigned int *)(MISC_BASE + 0x024)) -/* CORE CLK CFG register masks */ -#define PLL_HCLK_RATIO_SHIFT 10 -#define PLL_HCLK_RATIO_MASK 0x3 -#define HCLK_PCLK_RATIO_SHIFT 8 -#define HCLK_PCLK_RATIO_MASK 0x3 - -#define PERIP_CLK_CFG ((unsigned int *)(MISC_BASE + 0x028)) -/* PERIP_CLK_CFG register masks */ -#define UART_CLK_SHIFT 4 -#define UART_CLK_MASK 0x1 -#define FIRDA_CLK_SHIFT 5 -#define FIRDA_CLK_MASK 0x3 -#define GPT0_CLK_SHIFT 8 -#define GPT1_CLK_SHIFT 11 -#define GPT2_CLK_SHIFT 12 -#define GPT_CLK_MASK 0x1 -#define AUX_CLK_PLL3_MASK 0 -#define AUX_CLK_PLL1_MASK 1 - -#define PERIP1_CLK_ENB ((unsigned int *)(MISC_BASE + 0x02C)) -/* PERIP1_CLK_ENB register masks */ -#define UART_CLK_ENB 3 -#define SSP_CLK_ENB 5 -#define I2C_CLK_ENB 7 -#define JPEG_CLK_ENB 8 -#define FIRDA_CLK_ENB 10 -#define GPT1_CLK_ENB 11 -#define GPT2_CLK_ENB 12 -#define ADC_CLK_ENB 15 -#define RTC_CLK_ENB 17 -#define GPIO_CLK_ENB 18 -#define DMA_CLK_ENB 19 -#define SMI_CLK_ENB 21 -#define GMAC_CLK_ENB 23 -#define USBD_CLK_ENB 24 -#define USBH_CLK_ENB 25 -#define C3_CLK_ENB 31 - -#define SOC_CORE_ID ((unsigned int *)(MISC_BASE + 0x030)) -#define RAS_CLK_ENB ((unsigned int *)(MISC_BASE + 0x034)) -#define PERIP1_SOF_RST ((unsigned int *)(MISC_BASE + 0x038)) -/* PERIP1_SOF_RST register masks */ -#define JPEG_SOF_RST 8 - -#define SOC_USER_ID ((unsigned int *)(MISC_BASE + 0x03C)) -#define RAS_SOF_RST ((unsigned int *)(MISC_BASE + 0x040)) -#define PRSC1_CLK_CFG ((unsigned int *)(MISC_BASE + 0x044)) -#define PRSC2_CLK_CFG ((unsigned int *)(MISC_BASE + 0x048)) -#define PRSC3_CLK_CFG ((unsigned int *)(MISC_BASE + 0x04C)) -/* gpt synthesizer register masks */ -#define GPT_MSCALE_SHIFT 0 -#define GPT_MSCALE_MASK 0xFFF -#define GPT_NSCALE_SHIFT 12 -#define GPT_NSCALE_MASK 0xF - -#define AMEM_CLK_CFG ((unsigned int *)(MISC_BASE + 0x050)) -#define EXPI_CLK_CFG ((unsigned int *)(MISC_BASE + 0x054)) -#define CLCD_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x05C)) -#define FIRDA_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x060)) -#define UART_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x064)) -#define GMAC_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x068)) -#define RAS1_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x06C)) -#define RAS2_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x070)) -#define RAS3_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x074)) -#define RAS4_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x078)) -/* aux clk synthesiser register masks for irda to ras4 */ -#define AUX_EQ_SEL_SHIFT 30 -#define AUX_EQ_SEL_MASK 1 -#define AUX_EQ1_SEL 0 -#define AUX_EQ2_SEL 1 -#define AUX_XSCALE_SHIFT 16 -#define AUX_XSCALE_MASK 0xFFF -#define AUX_YSCALE_SHIFT 0 -#define AUX_YSCALE_MASK 0xFFF - -#define ICM1_ARB_CFG ((unsigned int *)(MISC_BASE + 0x07C)) -#define ICM2_ARB_CFG ((unsigned int *)(MISC_BASE + 0x080)) -#define ICM3_ARB_CFG ((unsigned int *)(MISC_BASE + 0x084)) -#define ICM4_ARB_CFG ((unsigned int *)(MISC_BASE + 0x088)) -#define ICM5_ARB_CFG ((unsigned int *)(MISC_BASE + 0x08C)) -#define ICM6_ARB_CFG ((unsigned int *)(MISC_BASE + 0x090)) -#define ICM7_ARB_CFG ((unsigned int *)(MISC_BASE + 0x094)) -#define ICM8_ARB_CFG ((unsigned int *)(MISC_BASE + 0x098)) -#define ICM9_ARB_CFG ((unsigned int *)(MISC_BASE + 0x09C)) -#define DMA_CHN_CFG ((unsigned int *)(MISC_BASE + 0x0A0)) -#define USB2_PHY_CFG ((unsigned int *)(MISC_BASE + 0x0A4)) -#define GMAC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0A8)) -#define EXPI_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0AC)) -#define PRC1_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C0)) -#define PRC2_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C4)) -#define PRC3_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C8)) -#define PRC4_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0CC)) -#define PRC1_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D0)) -#define PRC2_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D4)) -#define PRC3_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D8)) -#define PRC4_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0DC)) -#define PWRDOWN_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0E0)) -#define COMPSSTL_1V8_CFG ((unsigned int *)(MISC_BASE + 0x0E4)) -#define COMPSSTL_2V5_CFG ((unsigned int *)(MISC_BASE + 0x0E8)) -#define COMPCOR_3V3_CFG ((unsigned int *)(MISC_BASE + 0x0EC)) -#define SSTLPAD_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F0)) -#define BIST1_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F4)) -#define BIST2_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F8)) -#define BIST3_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0FC)) -#define BIST4_CFG_CTR ((unsigned int *)(MISC_BASE + 0x100)) -#define BIST5_CFG_CTR ((unsigned int *)(MISC_BASE + 0x104)) -#define BIST1_STS_RES ((unsigned int *)(MISC_BASE + 0x108)) -#define BIST2_STS_RES ((unsigned int *)(MISC_BASE + 0x10C)) -#define BIST3_STS_RES ((unsigned int *)(MISC_BASE + 0x110)) -#define BIST4_STS_RES ((unsigned int *)(MISC_BASE + 0x114)) -#define BIST5_STS_RES ((unsigned int *)(MISC_BASE + 0x118)) -#define SYSERR_CFG_CTR ((unsigned int *)(MISC_BASE + 0x11C)) - -#endif /* __MACH_MISC_REGS_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h deleted file mode 100644 index dcca8568a48..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/spear.h +++ /dev/null @@ -1,144 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/spear.h - * - * SPEAr3xx Machine family specific definition - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_SPEAR3XX_H -#define __MACH_SPEAR3XX_H - -#include <mach/hardware.h> -#include <mach/spear300.h> -#include <mach/spear310.h> -#include <mach/spear320.h> - -#define SPEAR3XX_ML_SDRAM_BASE 0x00000000 -#define SPEAR3XX_ML_SDRAM_SIZE 0x40000000 - -#define SPEAR3XX_ICM9_BASE 0xC0000000 -#define SPEAR3XX_ICM9_SIZE 0x10000000 - -/* ICM1 - Low speed connection */ -#define SPEAR3XX_ICM1_2_BASE 0xD0000000 -#define SPEAR3XX_ICM1_2_SIZE 0x10000000 - -#define SPEAR3XX_ICM1_UART_BASE 0xD0000000 -#define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE) -#define SPEAR3XX_ICM1_UART_SIZE 0x00080000 - -#define SPEAR3XX_ICM1_ADC_BASE 0xD0080000 -#define SPEAR3XX_ICM1_ADC_SIZE 0x00080000 - -#define SPEAR3XX_ICM1_SSP_BASE 0xD0100000 -#define SPEAR3XX_ICM1_SSP_SIZE 0x00080000 - -#define SPEAR3XX_ICM1_I2C_BASE 0xD0180000 -#define SPEAR3XX_ICM1_I2C_SIZE 0x00080000 - -#define SPEAR3XX_ICM1_JPEG_BASE 0xD0800000 -#define SPEAR3XX_ICM1_JPEG_SIZE 0x00800000 - -#define SPEAR3XX_ICM1_IRDA_BASE 0xD1000000 -#define SPEAR3XX_ICM1_IRDA_SIZE 0x00080000 - -#define SPEAR3XX_ICM1_SRAM_BASE 0xD2800000 -#define SPEAR3XX_ICM1_SRAM_SIZE 0x05800000 - -/* ICM2 - Application Subsystem */ -#define SPEAR3XX_ICM2_HWACCEL0_BASE 0xD8800000 -#define SPEAR3XX_ICM2_HWACCEL0_SIZE 0x00800000 - -#define SPEAR3XX_ICM2_HWACCEL1_BASE 0xD9000000 -#define SPEAR3XX_ICM2_HWACCEL1_SIZE 0x00800000 - -/* ICM4 - High Speed Connection */ -#define SPEAR3XX_ICM4_BASE 0xE0000000 -#define SPEAR3XX_ICM4_SIZE 0x08000000 - -#define SPEAR3XX_ICM4_MII_BASE 0xE0800000 -#define SPEAR3XX_ICM4_MII_SIZE 0x00800000 - -#define SPEAR3XX_ICM4_USBD_FIFO_BASE 0xE1000000 -#define SPEAR3XX_ICM4_USBD_FIFO_SIZE 0x00100000 - -#define SPEAR3XX_ICM4_USBD_CSR_BASE 0xE1100000 -#define SPEAR3XX_ICM4_USBD_CSR_SIZE 0x00100000 - -#define SPEAR3XX_ICM4_USBD_PLDT_BASE 0xE1200000 -#define SPEAR3XX_ICM4_USBD_PLDT_SIZE 0x00100000 - -#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE 0xE1800000 -#define SPEAR3XX_ICM4_USB_EHCI0_1_SIZE 0x00100000 - -#define SPEAR3XX_ICM4_USB_OHCI0_BASE 0xE1900000 -#define SPEAR3XX_ICM4_USB_OHCI0_SIZE 0x00100000 - -#define SPEAR3XX_ICM4_USB_OHCI1_BASE 0xE2100000 -#define SPEAR3XX_ICM4_USB_OHCI1_SIZE 0x00100000 - -#define SPEAR3XX_ICM4_USB_ARB_BASE 0xE2800000 -#define SPEAR3XX_ICM4_USB_ARB_SIZE 0x00010000 - -/* ML1 - Multi Layer CPU Subsystem */ -#define SPEAR3XX_ICM3_ML1_2_BASE 0xF0000000 -#define SPEAR3XX_ICM3_ML1_2_SIZE 0x0F000000 - -#define SPEAR3XX_ML1_TMR_BASE 0xF0000000 -#define SPEAR3XX_ML1_TMR_SIZE 0x00100000 - -#define SPEAR3XX_ML1_VIC_BASE 0xF1100000 -#define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE) -#define SPEAR3XX_ML1_VIC_SIZE 0x00100000 - -/* ICM3 - Basic Subsystem */ -#define SPEAR3XX_ICM3_SMEM_BASE 0xF8000000 -#define SPEAR3XX_ICM3_SMEM_SIZE 0x04000000 - -#define SPEAR3XX_ICM3_SMI_CTRL_BASE 0xFC000000 -#define SPEAR3XX_ICM3_SMI_CTRL_SIZE 0x00200000 - -#define SPEAR3XX_ICM3_DMA_BASE 0xFC400000 -#define SPEAR3XX_ICM3_DMA_SIZE 0x00200000 - -#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE 0xFC600000 -#define SPEAR3XX_ICM3_SDRAM_CTRL_SIZE 0x00200000 - -#define SPEAR3XX_ICM3_TMR0_BASE 0xFC800000 -#define SPEAR3XX_ICM3_TMR0_SIZE 0x00080000 - -#define SPEAR3XX_ICM3_WDT_BASE 0xFC880000 -#define SPEAR3XX_ICM3_WDT_SIZE 0x00080000 - -#define SPEAR3XX_ICM3_RTC_BASE 0xFC900000 -#define SPEAR3XX_ICM3_RTC_SIZE 0x00080000 - -#define SPEAR3XX_ICM3_GPIO_BASE 0xFC980000 -#define SPEAR3XX_ICM3_GPIO_SIZE 0x00080000 - -#define SPEAR3XX_ICM3_SYS_CTRL_BASE 0xFCA00000 -#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE) -#define SPEAR3XX_ICM3_SYS_CTRL_SIZE 0x00080000 - -#define SPEAR3XX_ICM3_MISC_REG_BASE 0xFCA80000 -#define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE) -#define SPEAR3XX_ICM3_MISC_REG_SIZE 0x00080000 - -#define SPEAR3XX_ICM3_TMR1_BASE 0xFCB00000 -#define SPEAR3XX_ICM3_TMR1_SIZE 0x00080000 - -/* Debug uart for linux, will be used for debug and uncompress messages */ -#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE -#define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE - -/* Sysctl base for spear platform */ -#define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE -#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE - -#endif /* __MACH_SPEAR3XX_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h deleted file mode 100644 index ccaa76522ee..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/spear300.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/spear300.h - * - * SPEAr300 Machine specific definition - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifdef CONFIG_MACH_SPEAR300 - -#ifndef __MACH_SPEAR300_H -#define __MACH_SPEAR300_H - -/* Base address of various IPs */ -#define SPEAR300_TELECOM_BASE 0x50000000 -#define SPEAR300_TELECOM_SIZE 0x10000000 - -/* Interrupt registers offsets and masks */ -#define SPEAR300_TELECOM_REG_SIZE 0x00010000 -#define INT_ENB_MASK_REG 0x54 -#define INT_STS_MASK_REG 0x58 -#define IT_PERS_S_IRQ_MASK (1 << 0) -#define IT_CHANGE_S_IRQ_MASK (1 << 1) -#define I2S_IRQ_MASK (1 << 2) -#define TDM_IRQ_MASK (1 << 3) -#define CAMERA_L_IRQ_MASK (1 << 4) -#define CAMERA_F_IRQ_MASK (1 << 5) -#define CAMERA_V_IRQ_MASK (1 << 6) -#define KEYBOARD_IRQ_MASK (1 << 7) -#define GPIO1_IRQ_MASK (1 << 8) - -#define SHIRQ_RAS1_MASK 0x1FF - -#define SPEAR300_CLCD_BASE 0x60000000 -#define SPEAR300_CLCD_SIZE 0x10000000 - -#define SPEAR300_SDIO_BASE 0x70000000 -#define SPEAR300_SDIO_SIZE 0x10000000 - -#define SPEAR300_NAND_0_BASE 0x80000000 -#define SPEAR300_NAND_0_SIZE 0x04000000 - -#define SPEAR300_NAND_1_BASE 0x84000000 -#define SPEAR300_NAND_1_SIZE 0x04000000 - -#define SPEAR300_NAND_2_BASE 0x88000000 -#define SPEAR300_NAND_2_SIZE 0x04000000 - -#define SPEAR300_NAND_3_BASE 0x8c000000 -#define SPEAR300_NAND_3_SIZE 0x04000000 - -#define SPEAR300_NOR_0_BASE 0x90000000 -#define SPEAR300_NOR_0_SIZE 0x01000000 - -#define SPEAR300_NOR_1_BASE 0x91000000 -#define SPEAR300_NOR_1_SIZE 0x01000000 - -#define SPEAR300_NOR_2_BASE 0x92000000 -#define SPEAR300_NOR_2_SIZE 0x01000000 - -#define SPEAR300_NOR_3_BASE 0x93000000 -#define SPEAR300_NOR_3_SIZE 0x01000000 - -#define SPEAR300_FSMC_BASE 0x94000000 -#define SPEAR300_FSMC_SIZE 0x05000000 - -#define SPEAR300_SOC_CONFIG_BASE 0x99000000 -#define SPEAR300_SOC_CONFIG_SIZE 0x00000008 - -#define SPEAR300_KEYBOARD_BASE 0xA0000000 -#define SPEAR300_KEYBOARD_SIZE 0x09000000 - -#define SPEAR300_GPIO_BASE 0xA9000000 -#define SPEAR300_GPIO_SIZE 0x07000000 - -#endif /* __MACH_SPEAR300_H */ - -#endif /* CONFIG_MACH_SPEAR300 */ diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h deleted file mode 100644 index b27bb8af330..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/spear310.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/spear310.h - * - * SPEAr310 Machine specific definition - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifdef CONFIG_MACH_SPEAR310 - -#ifndef __MACH_SPEAR310_H -#define __MACH_SPEAR310_H - -#define SPEAR310_NAND_BASE 0x40000000 -#define SPEAR310_NAND_SIZE 0x04000000 - -#define SPEAR310_FSMC_BASE 0x44000000 -#define SPEAR310_FSMC_SIZE 0x01000000 - -#define SPEAR310_UART1_BASE 0xB2000000 -#define SPEAR310_UART2_BASE 0xB2080000 -#define SPEAR310_UART3_BASE 0xB2100000 -#define SPEAR310_UART4_BASE 0xB2180000 -#define SPEAR310_UART5_BASE 0xB2200000 -#define SPEAR310_UART_SIZE 0x00080000 - -#define SPEAR310_HDLC_BASE 0xB2800000 -#define SPEAR310_HDLC_SIZE 0x00800000 - -#define SPEAR310_RS485_0_BASE 0xB3000000 -#define SPEAR310_RS485_0_SIZE 0x00800000 - -#define SPEAR310_RS485_1_BASE 0xB3800000 -#define SPEAR310_RS485_1_SIZE 0x00800000 - -#define SPEAR310_SOC_CONFIG_BASE 0xB4000000 -#define SPEAR310_SOC_CONFIG_SIZE 0x00000070 -/* Interrupt registers offsets and masks */ -#define INT_STS_MASK_REG 0x04 -#define SMII0_IRQ_MASK (1 << 0) -#define SMII1_IRQ_MASK (1 << 1) -#define SMII2_IRQ_MASK (1 << 2) -#define SMII3_IRQ_MASK (1 << 3) -#define WAKEUP_SMII0_IRQ_MASK (1 << 4) -#define WAKEUP_SMII1_IRQ_MASK (1 << 5) -#define WAKEUP_SMII2_IRQ_MASK (1 << 6) -#define WAKEUP_SMII3_IRQ_MASK (1 << 7) -#define UART1_IRQ_MASK (1 << 8) -#define UART2_IRQ_MASK (1 << 9) -#define UART3_IRQ_MASK (1 << 10) -#define UART4_IRQ_MASK (1 << 11) -#define UART5_IRQ_MASK (1 << 12) -#define EMI_IRQ_MASK (1 << 13) -#define TDM_HDLC_IRQ_MASK (1 << 14) -#define RS485_0_IRQ_MASK (1 << 15) -#define RS485_1_IRQ_MASK (1 << 16) - -#define SHIRQ_RAS1_MASK 0x000FF -#define SHIRQ_RAS2_MASK 0x01F00 -#define SHIRQ_RAS3_MASK 0x02000 -#define SHIRQ_INTRCOMM_RAS_MASK 0x1C000 - -#endif /* __MACH_SPEAR310_H */ - -#endif /* CONFIG_MACH_SPEAR310 */ diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h deleted file mode 100644 index cacf17a958c..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/spear320.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/spear320.h - * - * SPEAr320 Machine specific definition - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifdef CONFIG_MACH_SPEAR320 - -#ifndef __MACH_SPEAR320_H -#define __MACH_SPEAR320_H - -#define SPEAR320_EMI_CTRL_BASE 0x40000000 -#define SPEAR320_EMI_CTRL_SIZE 0x08000000 - -#define SPEAR320_FSMC_BASE 0x4C000000 -#define SPEAR320_FSMC_SIZE 0x01000000 - -#define SPEAR320_I2S_BASE 0x60000000 -#define SPEAR320_I2S_SIZE 0x10000000 - -#define SPEAR320_SDIO_BASE 0x70000000 -#define SPEAR320_SDIO_SIZE 0x10000000 - -#define SPEAR320_CLCD_BASE 0x90000000 -#define SPEAR320_CLCD_SIZE 0x10000000 - -#define SPEAR320_PAR_PORT_BASE 0xA0000000 -#define SPEAR320_PAR_PORT_SIZE 0x01000000 - -#define SPEAR320_CAN0_BASE 0xA1000000 -#define SPEAR320_CAN0_SIZE 0x01000000 - -#define SPEAR320_CAN1_BASE 0xA2000000 -#define SPEAR320_CAN1_SIZE 0x01000000 - -#define SPEAR320_UART1_BASE 0xA3000000 -#define SPEAR320_UART2_BASE 0xA4000000 -#define SPEAR320_UART_SIZE 0x01000000 - -#define SPEAR320_SSP0_BASE 0xA5000000 -#define SPEAR320_SSP0_SIZE 0x01000000 - -#define SPEAR320_SSP1_BASE 0xA6000000 -#define SPEAR320_SSP1_SIZE 0x01000000 - -#define SPEAR320_I2C_BASE 0xA7000000 -#define SPEAR320_I2C_SIZE 0x01000000 - -#define SPEAR320_PWM_BASE 0xA8000000 -#define SPEAR320_PWM_SIZE 0x01000000 - -#define SPEAR320_SMII0_BASE 0xAA000000 -#define SPEAR320_SMII0_SIZE 0x01000000 - -#define SPEAR320_SMII1_BASE 0xAB000000 -#define SPEAR320_SMII1_SIZE 0x01000000 - -#define SPEAR320_SOC_CONFIG_BASE 0xB4000000 -#define SPEAR320_SOC_CONFIG_SIZE 0x00000070 -/* Interrupt registers offsets and masks */ -#define INT_STS_MASK_REG 0x04 -#define INT_CLR_MASK_REG 0x04 -#define INT_ENB_MASK_REG 0x08 -#define GPIO_IRQ_MASK (1 << 0) -#define I2S_PLAY_IRQ_MASK (1 << 1) -#define I2S_REC_IRQ_MASK (1 << 2) -#define EMI_IRQ_MASK (1 << 7) -#define CLCD_IRQ_MASK (1 << 8) -#define SPP_IRQ_MASK (1 << 9) -#define SDIO_IRQ_MASK (1 << 10) -#define CAN_U_IRQ_MASK (1 << 11) -#define CAN_L_IRQ_MASK (1 << 12) -#define UART1_IRQ_MASK (1 << 13) -#define UART2_IRQ_MASK (1 << 14) -#define SSP1_IRQ_MASK (1 << 15) -#define SSP2_IRQ_MASK (1 << 16) -#define SMII0_IRQ_MASK (1 << 17) -#define MII1_SMII1_IRQ_MASK (1 << 18) -#define WAKEUP_SMII0_IRQ_MASK (1 << 19) -#define WAKEUP_MII1_SMII1_IRQ_MASK (1 << 20) -#define I2C1_IRQ_MASK (1 << 21) - -#define SHIRQ_RAS1_MASK 0x000380 -#define SHIRQ_RAS3_MASK 0x000007 -#define SHIRQ_INTRCOMM_RAS_MASK 0x3FF800 - -#endif /* __MACH_SPEAR320_H */ - -#endif /* CONFIG_MACH_SPEAR320 */ diff --git a/arch/arm/mach-spear3xx/include/mach/system.h b/arch/arm/mach-spear3xx/include/mach/system.h deleted file mode 100644 index 92cee6335c9..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/system.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/system.h - * - * SPEAr3xx Machine family specific architecture functions - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_SYSTEM_H -#define __MACH_SYSTEM_H - -#include <plat/system.h> - -#endif /* __MACH_SYSTEM_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/timex.h b/arch/arm/mach-spear3xx/include/mach/timex.h deleted file mode 100644 index a38cc9de876..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/timex.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/timex.h - * - * SPEAr3XX machine family specific timex definitions - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_TIMEX_H -#define __MACH_TIMEX_H - -#include <plat/timex.h> - -#endif /* __MACH_TIMEX_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/uncompress.h b/arch/arm/mach-spear3xx/include/mach/uncompress.h deleted file mode 100644 index 53ba8bbc0df..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/uncompress.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/uncompress.h - * - * Serial port stubs for kernel decompress status messages - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_UNCOMPRESS_H -#define __MACH_UNCOMPRESS_H - -#include <plat/uncompress.h> - -#endif /* __MACH_UNCOMPRESS_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/vmalloc.h b/arch/arm/mach-spear3xx/include/mach/vmalloc.h deleted file mode 100644 index df977b3c9a6..00000000000 --- a/arch/arm/mach-spear3xx/include/mach/vmalloc.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/vmalloc.h - * - * Defining Vmalloc area for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_VMALLOC_H -#define __MACH_VMALLOC_H - -#include <plat/vmalloc.h> - -#endif /* __MACH_VMALLOC_H */ |