diff options
Diffstat (limited to 'arch/arm/mach-sa1100/time.c')
| -rw-r--r-- | arch/arm/mach-sa1100/time.c | 240 |
1 files changed, 85 insertions, 155 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 47e0420623f..1dea6cfafb3 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c @@ -2,208 +2,138 @@ * linux/arch/arm/mach-sa1100/time.c * * Copyright (C) 1998 Deborah Wallach. - * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com> - * - * 2000/03/29 (C) Nicolas Pitre <nico@cam.org> + * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com> + * + * 2000/03/29 (C) Nicolas Pitre <nico@fluxnic.net> * Rewritten: big cleanup, much simpler, better HZ accuracy. * */ #include <linux/init.h> +#include <linux/kernel.h> #include <linux/errno.h> #include <linux/interrupt.h> +#include <linux/irq.h> #include <linux/timex.h> -#include <linux/signal.h> +#include <linux/clockchips.h> +#include <linux/sched_clock.h> #include <asm/mach/time.h> -#include <asm/hardware.h> - -#define RTC_DEF_DIVIDER (32768 - 1) -#define RTC_DEF_TRIM 0 +#include <mach/hardware.h> +#include <mach/irqs.h> -static unsigned long __init sa1100_get_rtc_time(void) -{ - /* - * According to the manual we should be able to let RTTR be zero - * and then a default diviser for a 32.768KHz clock is used. - * Apparently this doesn't work, at least for my SA1110 rev 5. - * If the clock divider is uninitialized then reset it to the - * default value to get the 1Hz clock. - */ - if (RTTR == 0) { - RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); - printk(KERN_WARNING "Warning: uninitialized Real Time Clock\n"); - /* The current RTC value probably doesn't make sense either */ - RCNR = 0; - return 0; - } - return RCNR; -} +#define SA1100_CLOCK_FREQ 3686400 +#define SA1100_LATCH DIV_ROUND_CLOSEST(SA1100_CLOCK_FREQ, HZ) -static int sa1100_set_rtc(void) +static u64 notrace sa1100_read_sched_clock(void) { - unsigned long current_time = xtime.tv_sec; - - if (RTSR & RTSR_ALE) { - /* make sure not to forward the clock over an alarm */ - unsigned long alarm = RTAR; - if (current_time >= alarm && alarm >= RCNR) - return -ERESTARTSYS; - } - RCNR = current_time; - return 0; -} - -/* IRQs are disabled before entering here from do_gettimeofday() */ -static unsigned long sa1100_gettimeoffset (void) -{ - unsigned long ticks_to_match, elapsed, usec; - - /* Get ticks before next timer match */ - ticks_to_match = OSMR0 - OSCR; - - /* We need elapsed ticks since last match */ - elapsed = LATCH - ticks_to_match; - - /* Now convert them to usec */ - usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; - - return usec; + return readl_relaxed(OSCR); } -#ifdef CONFIG_NO_IDLE_HZ -static unsigned long initial_match; -static int match_posponed; -#endif +#define MIN_OSCR_DELTA 2 -static irqreturn_t -sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id) { - unsigned int next_match; + struct clock_event_device *c = dev_id; - write_seqlock(&xtime_lock); - -#ifdef CONFIG_NO_IDLE_HZ - if (match_posponed) { - match_posponed = 0; - OSMR0 = initial_match; - } -#endif - - /* - * Loop until we get ahead of the free running timer. - * This ensures an exact clock tick count and time accuracy. - * Since IRQs are disabled at this point, coherence between - * lost_ticks(updated in do_timer()) and the match reg value is - * ensured, hence we can use do_gettimeofday() from interrupt - * handlers. - */ - do { - timer_tick(regs); - OSSR = OSSR_M0; /* Clear match on timer 0 */ - next_match = (OSMR0 += LATCH); - } while ((signed long)(next_match - OSCR) <= 0); - - write_sequnlock(&xtime_lock); + /* Disarm the compare/match, signal the event. */ + writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); + writel_relaxed(OSSR_M0, OSSR); + c->event_handler(c); return IRQ_HANDLED; } -static struct irqaction sa1100_timer_irq = { - .name = "SA11xx Timer Tick", - .flags = SA_INTERRUPT | SA_TIMER, - .handler = sa1100_timer_interrupt, -}; - -static void __init sa1100_timer_init(void) +static int +sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c) { - struct timespec tv; - - set_rtc = sa1100_set_rtc; + unsigned long next, oscr; - tv.tv_nsec = 0; - tv.tv_sec = sa1100_get_rtc_time(); - do_settimeofday(&tv); + writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER); + next = readl_relaxed(OSCR) + delta; + writel_relaxed(next, OSMR0); + oscr = readl_relaxed(OSCR); - OSMR0 = 0; /* set initial match at 0 */ - OSSR = 0xf; /* clear status on all timers */ - setup_irq(IRQ_OST0, &sa1100_timer_irq); - OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */ - OSCR = 0; /* initialize free-running timer, force first match */ + return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; } -#ifdef CONFIG_NO_IDLE_HZ -static int sa1100_dyn_tick_enable_disable(void) +static void +sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c) { - /* nothing to do */ - return 0; -} - -static void sa1100_dyn_tick_reprogram(unsigned long ticks) -{ - if (ticks > 1) { - initial_match = OSMR0; - OSMR0 = initial_match + ticks * LATCH; - match_posponed = 1; + switch (mode) { + case CLOCK_EVT_MODE_ONESHOT: + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); + writel_relaxed(OSSR_M0, OSSR); + break; + + case CLOCK_EVT_MODE_RESUME: + case CLOCK_EVT_MODE_PERIODIC: + break; } } -static irqreturn_t -sa1100_dyn_tick_handler(int irq, void *dev_id, struct pt_regs *regs) -{ - if (match_posponed) { - match_posponed = 0; - OSMR0 = initial_match; - if ((signed long)(initial_match - OSCR) <= 0) - return sa1100_timer_interrupt(irq, dev_id, regs); - } - return IRQ_NONE; -} - -static struct dyn_tick_timer sa1100_dyn_tick = { - .enable = sa1100_dyn_tick_enable_disable, - .disable = sa1100_dyn_tick_enable_disable, - .reprogram = sa1100_dyn_tick_reprogram, - .handler = sa1100_dyn_tick_handler, -}; -#endif - #ifdef CONFIG_PM unsigned long osmr[4], oier; -static void sa1100_timer_suspend(void) +static void sa1100_timer_suspend(struct clock_event_device *cedev) { - osmr[0] = OSMR0; - osmr[1] = OSMR1; - osmr[2] = OSMR2; - osmr[3] = OSMR3; - oier = OIER; + osmr[0] = readl_relaxed(OSMR0); + osmr[1] = readl_relaxed(OSMR1); + osmr[2] = readl_relaxed(OSMR2); + osmr[3] = readl_relaxed(OSMR3); + oier = readl_relaxed(OIER); } -static void sa1100_timer_resume(void) +static void sa1100_timer_resume(struct clock_event_device *cedev) { - OSSR = 0x0f; - OSMR0 = osmr[0]; - OSMR1 = osmr[1]; - OSMR2 = osmr[2]; - OSMR3 = osmr[3]; - OIER = oier; + writel_relaxed(0x0f, OSSR); + writel_relaxed(osmr[0], OSMR0); + writel_relaxed(osmr[1], OSMR1); + writel_relaxed(osmr[2], OSMR2); + writel_relaxed(osmr[3], OSMR3); + writel_relaxed(oier, OIER); /* * OSMR0 is the system timer: make sure OSCR is sufficiently behind */ - OSCR = OSMR0 - LATCH; + writel_relaxed(OSMR0 - SA1100_LATCH, OSCR); } #else #define sa1100_timer_suspend NULL #define sa1100_timer_resume NULL #endif -struct sys_timer sa1100_timer = { - .init = sa1100_timer_init, +static struct clock_event_device ckevt_sa1100_osmr0 = { + .name = "osmr0", + .features = CLOCK_EVT_FEAT_ONESHOT, + .rating = 200, + .set_next_event = sa1100_osmr0_set_next_event, + .set_mode = sa1100_osmr0_set_mode, .suspend = sa1100_timer_suspend, .resume = sa1100_timer_resume, - .offset = sa1100_gettimeoffset, -#ifdef CONFIG_NO_IDLE_HZ - .dyn_tick = &sa1100_dyn_tick, -#endif }; + +static struct irqaction sa1100_timer_irq = { + .name = "ost0", + .flags = IRQF_TIMER | IRQF_IRQPOLL, + .handler = sa1100_ost0_interrupt, + .dev_id = &ckevt_sa1100_osmr0, +}; + +void __init sa1100_timer_init(void) +{ + writel_relaxed(0, OIER); + writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); + + sched_clock_register(sa1100_read_sched_clock, 32, 3686400); + + ckevt_sa1100_osmr0.cpumask = cpumask_of(0); + + setup_irq(IRQ_OST0, &sa1100_timer_irq); + + clocksource_mmio_init(OSCR, "oscr", SA1100_CLOCK_FREQ, 200, 32, + clocksource_mmio_readl_up); + clockevents_config_and_register(&ckevt_sa1100_osmr0, 3686400, + MIN_OSCR_DELTA * 2, 0x7fffffff); +} |