diff options
Diffstat (limited to 'arch/arm/mach-realview/include')
25 files changed, 762 insertions, 703 deletions
diff --git a/arch/arm/mach-realview/include/mach/barriers.h b/arch/arm/mach-realview/include/mach/barriers.h new file mode 100644 index 00000000000..9a732195aa1 --- /dev/null +++ b/arch/arm/mach-realview/include/mach/barriers.h @@ -0,0 +1,8 @@ +/* + * Barriers redefined for RealView ARM11MPCore platforms with L220 cache + * controller to work around hardware errata causing the outer_sync() + * operation to deadlock the system. + */ +#define mb() dsb() +#define rmb() dsb() +#define wmb() mb() diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h index 268d7701fa9..a301e61a555 100644 --- a/arch/arm/mach-realview/include/mach/board-eb.h +++ b/arch/arm/mach-realview/include/mach/board-eb.h @@ -47,125 +47,22 @@ #define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */ #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB -#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ -#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ -#define REALVIEW_EB11MP_TWD_BASE 0x10100600 -#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ +#define REALVIEW_EB11MP_PRIV_MEM_BASE 0x10100000 #define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ #else -#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ -#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */ -#define REALVIEW_EB11MP_TWD_BASE 0x1F000600 -#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */ +#define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000 #define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ #endif -#define IRQ_EB_GIC_START 32 +#define REALVIEW_EB11MP_PRIV_MEM_SIZE SZ_8K +#define REALVIEW_EB11MP_PRIV_MEM_OFF(x) (REALVIEW_EB11MP_PRIV_MEM_BASE + (x)) -/* - * RealView EB interrupt sources - */ -#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */ -#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */ -#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */ -#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */ -#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */ -#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */ -#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */ - /* 9 reserved */ -#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */ -#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */ -#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */ -#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */ -#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */ -#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */ -#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */ -#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */ -#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */ -#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */ -#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */ -#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */ -#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */ -#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */ -#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */ -#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */ -#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */ -#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */ -#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */ -#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */ -#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */ -#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */ - -/* - * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile) - */ -#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0) -#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1) -#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2) -#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3) -#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4) -#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5) -#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6) -#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7) -#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8) -#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9) -#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */ -#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */ -#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */ -#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */ -#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14) -#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15) - -#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17) -#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18) -#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19) -#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20) -#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21) -#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22) -#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23) -#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24) -#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25) -#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26) -#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27) -#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28) - -#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29) -#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30) -#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31) - -#define IRQ_EB11MP_UART2 -1 -#define IRQ_EB11MP_UART3 -1 -#define IRQ_EB11MP_CLCD -1 -#define IRQ_EB11MP_DMA -1 -#define IRQ_EB11MP_WDOG -1 -#define IRQ_EB11MP_GPIO0 -1 -#define IRQ_EB11MP_GPIO1 -1 -#define IRQ_EB11MP_GPIO2 -1 -#define IRQ_EB11MP_SCI -1 -#define IRQ_EB11MP_SSP -1 - -#define NR_GIC_EB11MP 2 - -/* - * Only define NR_IRQS if less than NR_IRQS_EB - */ -#define NR_IRQS_EB (IRQ_EB_GIC_START + 96) - -#if defined(CONFIG_MACH_REALVIEW_EB) \ - && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB)) -#undef NR_IRQS -#define NR_IRQS NR_IRQS_EB -#endif - -#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \ - && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP)) -#undef MAX_GIC_NR -#define MAX_GIC_NR NR_GIC_EB11MP -#endif +#define REALVIEW_EB11MP_SCU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0) /* SCU registers */ +#define REALVIEW_EB11MP_GIC_CPU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0100) /* Generic interrupt controller CPU interface */ +#define REALVIEW_EB11MP_TWD_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0600) +#define REALVIEW_EB11MP_GIC_DIST_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x1000) /* Generic interrupt controller distributor */ /* * Core tile identification (REALVIEW_SYS_PROCID) diff --git a/arch/arm/mach-realview/include/mach/board-pb1176.h b/arch/arm/mach-realview/include/mach/board-pb1176.h index 858eea7b1ad..2a15fef9473 100644 --- a/arch/arm/mach-realview/include/mach/board-pb1176.h +++ b/arch/arm/mach-realview/include/mach/board-pb1176.h @@ -26,12 +26,15 @@ /* * Peripheral addresses */ +#define REALVIEW_PB1176_UART4_BASE 0x10009000 /* UART 4 */ #define REALVIEW_PB1176_SCTL_BASE 0x10100000 /* System controller */ #define REALVIEW_PB1176_SMC_BASE 0x10111000 /* SMC */ #define REALVIEW_PB1176_DMC_BASE 0x10109000 /* DMC configuration */ #define REALVIEW_PB1176_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ #define REALVIEW_PB1176_FLASH_BASE 0x30000000 #define REALVIEW_PB1176_FLASH_SIZE SZ_64M +#define REALVIEW_PB1176_SEC_FLASH_BASE 0x3C000000 /* Secure flash */ +#define REALVIEW_PB1176_SEC_FLASH_SIZE SZ_64M #define REALVIEW_PB1176_TIMER0_1_BASE 0x10104000 /* Timer 0 and 1 */ #define REALVIEW_PB1176_TIMER2_3_BASE 0x10105000 /* Timer 2 and 3 */ @@ -67,86 +70,14 @@ #define REALVIEW_DC1176_GIC_CPU_BASE 0x10120000 /* GIC CPU interface, on devchip */ #define REALVIEW_DC1176_GIC_DIST_BASE 0x10121000 /* GIC distributor, on devchip */ +#define REALVIEW_DC1176_ROM_BASE 0x10200000 /* 16KiB NRAM preudo-ROM, on devchip */ #define REALVIEW_PB1176_GIC_CPU_BASE 0x10040000 /* GIC CPU interface, on FPGA */ #define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ #define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ /* - * Irqs + * Control register SYS_RESETCTL Bit 8 is set to 1 to force a soft reset */ -#define IRQ_DC1176_GIC_START 32 -#define IRQ_PB1176_GIC_START 64 - -/* - * ARM1176 DevChip interrupt sources (primary GIC) - */ -#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */ -#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */ -#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */ -#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */ -#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */ -#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11) -#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12) -#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) -#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) -#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ -#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ -#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ -#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */ -#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */ - -#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */ -#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */ - -/* - * RealView PB1176 interrupt sources (secondary GIC) - */ -#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */ -#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */ -#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */ -#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */ -#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5) -#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */ -#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */ -#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8) -#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9) -#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */ -#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */ - -#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16) - -#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */ - -#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22) -#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23) -#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ -#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ - -#define IRQ_PB1176_GPIO0 -1 -#define IRQ_PB1176_SSP -1 -#define IRQ_PB1176_SCTL -1 - -#define NR_GIC_PB1176 2 - -/* - * Only define NR_IRQS if less than NR_IRQS_PB1176 - */ -#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96) - -#if defined(CONFIG_MACH_REALVIEW_PB1176) - -#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176) -#undef NR_IRQS -#define NR_IRQS NR_IRQS_PB1176 -#endif - -#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176) -#undef MAX_GIC_NR -#define MAX_GIC_NR NR_GIC_PB1176 -#endif - -#endif /* CONFIG_MACH_REALVIEW_PB1176 */ +#define REALVIEW_PB1176_SYS_SOFT_RESET 0x0100 #endif /* __ASM_ARCH_BOARD_PB1176_H */ diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h index 53ea0e7a126..aa2d4e02ea2 100644 --- a/arch/arm/mach-realview/include/mach/board-pb11mp.h +++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h @@ -75,111 +75,24 @@ /* * Testchip peripheral and fpga gic regions */ +#define REALVIEW_TC11MP_PRIV_MEM_BASE 0x1F000000 +#define REALVIEW_TC11MP_PRIV_MEM_SIZE SZ_8K #define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ #define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ #define REALVIEW_TC11MP_TWD_BASE 0x1F000600 #define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ #define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ -/* - * Irqs - */ -#define IRQ_TC11MP_GIC_START 32 -#define IRQ_PB11MP_GIC_START 64 - -/* - * ARM11MPCore test chip interrupt sources (primary GIC on the test chip) - */ -#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0) -#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1) -#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2) -#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3) -#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4) -#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5) -#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6) -#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7) -#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8) -#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9) -#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */ -#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */ -#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */ -#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */ -#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14) -#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15) - -#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17) -#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18) -#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19) -#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20) -#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21) -#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22) -#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23) -#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24) -#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25) -#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26) -#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27) -#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28) - -#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29) -#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30) -#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31) - -/* - * RealView PB11MPCore GIC interrupt sources (secondary GIC on the board) + /* + * Values for REALVIEW_SYS_RESET_CTRL */ -#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */ -#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */ -#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */ -#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */ -#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */ - /* 9 reserved */ -#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */ -#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */ -#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */ -#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */ -#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */ -#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */ -#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */ -#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */ -#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */ -#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */ -#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */ -#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */ -#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */ -#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */ -#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */ -#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */ -#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */ -#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */ -#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */ -#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */ -#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */ -#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */ - -#define IRQ_PB11MP_SMC -1 -#define IRQ_PB11MP_SCTL -1 - -#define NR_GIC_PB11MP 2 - -/* - * Only define NR_IRQS if less than NR_IRQS_PB11MP - */ -#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96) - -#if defined(CONFIG_MACH_REALVIEW_PB11MP) - -#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP) -#undef NR_IRQS -#define NR_IRQS NR_IRQS_PB11MP -#endif - -#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP) -#undef MAX_GIC_NR -#define MAX_GIC_NR NR_GIC_PB11MP -#endif - -#endif /* CONFIG_MACH_REALVIEW_PB11MP */ +#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR 0x01 +#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGINIT 0x02 +#define REALVIEW_PB11MP_SYS_CTRL_RESET_DLLRESET 0x03 +#define REALVIEW_PB11MP_SYS_CTRL_RESET_PLLRESET 0x04 +#define REALVIEW_PB11MP_SYS_CTRL_RESET_POR 0x05 +#define REALVIEW_PB11MP_SYS_CTRL_RESET_DoC 0x06 + +#define REALVIEW_PB11MP_SYS_CTRL_LED (1 << 0) #endif /* __ASM_ARCH_BOARD_PB11MP_H */ diff --git a/arch/arm/mach-realview/include/mach/board-pba8.h b/arch/arm/mach-realview/include/mach/board-pba8.h index c8bed8f58ba..4dfc67a4f45 100644 --- a/arch/arm/mach-realview/include/mach/board-pba8.h +++ b/arch/arm/mach-realview/include/mach/board-pba8.h @@ -45,8 +45,6 @@ #define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */ #define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */ #define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */ -#define REALVIEW_PBA8_CF_BASE 0x18000000 /* Compact flash */ -#define REALVIEW_PBA8_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */ #define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */ #define REALVIEW_PBA8_FLASH0_BASE 0x40000000 #define REALVIEW_PBA8_FLASH0_SIZE SZ_64M @@ -72,81 +70,4 @@ #define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */ #define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */ -/* - * Irqs - */ -#define IRQ_PBA8_GIC_START 32 - -/* L220 -#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29) -#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30) -#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31) -*/ - -/* - * PB-A8 on-board gic irq sources - */ -#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */ -#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */ -#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */ -#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */ -#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */ -#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */ -#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */ - /* 9 reserved */ -#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */ -#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */ -#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */ -#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */ -#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */ -#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */ -#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */ -#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */ -#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */ -#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */ -#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */ -#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */ -#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */ -#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */ -#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */ -#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */ -#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */ -#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */ -#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */ -#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */ -#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */ -#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */ - -/* ... */ -#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50) -#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51) -#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52) -#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53) - -#define IRQ_PBA8_SMC -1 -#define IRQ_PBA8_SCTL -1 - -#define NR_GIC_PBA8 1 - -/* - * Only define NR_IRQS if less than NR_IRQS_PBA8 - */ -#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64) - -#if defined(CONFIG_MACH_REALVIEW_PBA8) - -#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8) -#undef NR_IRQS -#define NR_IRQS NR_IRQS_PBA8 -#endif - -#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8) -#undef MAX_GIC_NR -#define MAX_GIC_NR NR_GIC_PBA8 -#endif - -#endif /* CONFIG_MACH_REALVIEW_PBA8 */ - #endif /* __ASM_ARCH_BOARD_PBA8_H */ diff --git a/arch/arm/mach-realview/include/mach/board-pbx.h b/arch/arm/mach-realview/include/mach/board-pbx.h new file mode 100644 index 00000000000..848bfff6d8f --- /dev/null +++ b/arch/arm/mach-realview/include/mach/board-pbx.h @@ -0,0 +1,108 @@ +/* + * arch/arm/mach-realview/include/mach/board-pbx.h + * + * Copyright (C) 2009 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_BOARD_PBX_H +#define __ASM_ARCH_BOARD_PBX_H + +#include <mach/platform.h> + +/* + * Peripheral addresses + */ +#define REALVIEW_PBX_UART0_BASE 0x10009000 /* UART 0 */ +#define REALVIEW_PBX_UART1_BASE 0x1000A000 /* UART 1 */ +#define REALVIEW_PBX_UART2_BASE 0x1000B000 /* UART 2 */ +#define REALVIEW_PBX_UART3_BASE 0x1000C000 /* UART 3 */ +#define REALVIEW_PBX_SSP_BASE 0x1000D000 /* Synchronous Serial Port */ +#define REALVIEW_PBX_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */ +#define REALVIEW_PBX_WATCHDOG_BASE 0x10010000 /* watchdog interface */ +#define REALVIEW_PBX_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */ +#define REALVIEW_PBX_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */ +#define REALVIEW_PBX_GPIO0_BASE 0x10013000 /* GPIO port 0 */ +#define REALVIEW_PBX_RTC_BASE 0x10017000 /* Real Time Clock */ +#define REALVIEW_PBX_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */ +#define REALVIEW_PBX_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */ +#define REALVIEW_PBX_SCTL_BASE 0x1001A000 /* System Controller */ +#define REALVIEW_PBX_CLCD_BASE 0x10020000 /* CLCD */ +#define REALVIEW_PBX_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */ +#define REALVIEW_PBX_DMC_BASE 0x100E0000 /* DMC configuration */ +#define REALVIEW_PBX_SMC_BASE 0x100E1000 /* SMC configuration */ +#define REALVIEW_PBX_CAN_BASE 0x100E2000 /* CAN bus */ +#define REALVIEW_PBX_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */ +#define REALVIEW_PBX_FLASH0_BASE 0x40000000 +#define REALVIEW_PBX_FLASH0_SIZE SZ_64M +#define REALVIEW_PBX_FLASH1_BASE 0x44000000 +#define REALVIEW_PBX_FLASH1_SIZE SZ_64M +#define REALVIEW_PBX_ETH_BASE 0x4E000000 /* Ethernet */ +#define REALVIEW_PBX_USB_BASE 0x4F000000 /* USB */ +#define REALVIEW_PBX_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */ +#define REALVIEW_PBX_LT_BASE 0xC0000000 /* Logic Tile expansion */ +#define REALVIEW_PBX_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */ +#define REALVIEW_PBX_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */ + +/* + * Tile-specific addresses + */ +#define REALVIEW_PBX_TILE_SCU_BASE 0x1F000000 /* SCU registers */ +#define REALVIEW_PBX_TILE_GIC_CPU_BASE 0x1F000100 /* Private Generic interrupt controller CPU interface */ +#define REALVIEW_PBX_TILE_TWD_BASE 0x1F000600 +#define REALVIEW_PBX_TILE_TWD_PERCPU_BASE 0x1F000700 +#define REALVIEW_PBX_TILE_TWD_SIZE 0x00000100 +#define REALVIEW_PBX_TILE_GIC_DIST_BASE 0x1F001000 /* Private Generic interrupt controller distributor */ +#define REALVIEW_PBX_TILE_L220_BASE 0x1F002000 /* L220 registers */ + +#define REALVIEW_PBX_SYS_PLD_CTRL1 0x74 + +/* + * PBX PCI regions + */ +#define REALVIEW_PBX_PCI_BASE 0x90040000 /* PCI-X Unit base */ +#define REALVIEW_PBX_PCI_IO_BASE 0x90050000 /* IO Region on AHB */ +#define REALVIEW_PBX_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */ + +#define REALVIEW_PBX_PCI_BASE_SIZE 0x10000 /* 16 Kb */ +#define REALVIEW_PBX_PCI_IO_SIZE 0x1000 /* 4 Kb */ +#define REALVIEW_PBX_PCI_MEM_SIZE 0x20000000 /* 512 MB */ + +/* + * Core tile identification (REALVIEW_SYS_PROCID) + */ +#define REALVIEW_PBX_PROC_MASK 0xFF000000 +#define REALVIEW_PBX_PROC_ARM7TDMI 0x00000000 +#define REALVIEW_PBX_PROC_ARM9 0x02000000 +#define REALVIEW_PBX_PROC_ARM11 0x04000000 +#define REALVIEW_PBX_PROC_ARM11MP 0x06000000 +#define REALVIEW_PBX_PROC_A9MP 0x0C000000 +#define REALVIEW_PBX_PROC_A8 0x0E000000 + +#define check_pbx_proc(proc_type) \ + ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_PBX_PROC_MASK) \ + == proc_type) + +#ifdef CONFIG_MACH_REALVIEW_PBX +#define core_tile_pbx11mp() check_pbx_proc(REALVIEW_PBX_PROC_ARM11MP) +#define core_tile_pbxa9mp() check_pbx_proc(REALVIEW_PBX_PROC_A9MP) +#define core_tile_pbxa8() check_pbx_proc(REALVIEW_PBX_PROC_A8) +#else +#define core_tile_pbx11mp() 0 +#define core_tile_pbxa9mp() 0 +#define core_tile_pbxa8() 0 +#endif + +#endif /* __ASM_ARCH_BOARD_PBX_H */ diff --git a/arch/arm/mach-realview/include/mach/clkdev.h b/arch/arm/mach-realview/include/mach/clkdev.h deleted file mode 100644 index 04b37a89801..00000000000 --- a/arch/arm/mach-realview/include/mach/clkdev.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_MACH_CLKDEV_H -#define __ASM_MACH_CLKDEV_H - -#define __clk_get(clk) ({ 1; }) -#define __clk_put(clk) do { } while (0) - -#endif diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S deleted file mode 100644 index 92dbcb9e179..00000000000 --- a/arch/arm/mach-realview/include/mach/debug-macro.S +++ /dev/null @@ -1,43 +0,0 @@ -/* arch/arm/mach-realview/include/mach/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#if defined(CONFIG_MACH_REALVIEW_EB) || \ - defined(CONFIG_MACH_REALVIEW_PB11MP) || \ - defined(CONFIG_MACH_REALVIEW_PBA8) -#ifndef DEBUG_LL_UART_OFFSET -#define DEBUG_LL_UART_OFFSET 0x00009000 -#elif DEBUG_LL_UART_OFFSET != 0x00009000 -#warning "DEBUG_LL_UART_OFFSET already defined to a different value" -#endif -#endif - -#ifdef CONFIG_MACH_REALVIEW_PB1176 -#ifndef DEBUG_LL_UART_OFFSET -#define DEBUG_LL_UART_OFFSET 0x0010c000 -#elif DEBUG_LL_UART_OFFSET != 0x0010c000 -#warning "DEBUG_LL_UART_OFFSET already defined to a different value" -#endif -#endif - -#ifndef DEBUG_LL_UART_OFFSET -#error "Unknown RealView platform" -#endif - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x10000000 - movne \rx, #0xfb000000 @ virtual base - orr \rx, \rx, #DEBUG_LL_UART_OFFSET - .endm - -#include <asm/hardware/debug-pl01x.S> diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S deleted file mode 100644 index 340a5c27694..00000000000 --- a/arch/arm/mach-realview/include/mach/entry-macro.S +++ /dev/null @@ -1,81 +0,0 @@ -/* - * arch/arm/mach-realview/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for RealView platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include <mach/hardware.h> -#include <asm/hardware/gic.h> - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - /* - * The interrupt numbering scheme is defined in the - * interrupt controller spec. To wit: - * - * Interrupts 0-15 are IPI - * 16-28 are reserved - * 29-31 are local. We allow 30 to be used for the watchdog. - * 32-1020 are global - * 1021-1022 are reserved - * 1023 is "spurious" (no interrupt) - * - * For now, we ignore all local interrupts so only return an interrupt if it's - * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. - * - * A simple read from the controller will tell us the number of the highest - * priority enabled interrupt. We then just need to check whether it is in the - * valid range for an IRQ (30-1020 inclusive). - */ - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ - - ldr \tmp, =1021 - - bic \irqnr, \irqstat, #0x1c00 - - cmp \irqnr, #29 - cmpcc \irqnr, \irqnr - cmpne \irqnr, \tmp - cmpcs \irqnr, \irqnr - - .endm - - /* We assume that irqstat (the raw value of the IRQ acknowledge - * register) is preserved from the macro above. - * If there is an IPI, we immediately signal end of interrupt on the - * controller, since this requires the original irqstat value which - * we won't easily be able to recreate later. - */ - - .macro test_for_ipi, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #16 - strcc \irqstat, [\base, #GIC_CPU_EOI] - cmpcs \irqnr, \irqnr - .endm - - /* As above, this assumes that irqstat and base are preserved.. */ - - .macro test_for_ltirq, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - mov \tmp, #0 - cmp \irqnr, #29 - moveq \tmp, #1 - streq \irqstat, [\base, #GIC_CPU_EOI] - cmp \tmp, #0 - .endm diff --git a/arch/arm/mach-realview/include/mach/hardware.h b/arch/arm/mach-realview/include/mach/hardware.h index b42c14f89ac..281e71c9752 100644 --- a/arch/arm/mach-realview/include/mach/hardware.h +++ b/arch/arm/mach-realview/include/mach/hardware.h @@ -25,6 +25,7 @@ #include <asm/sizes.h> /* macro to get at IO space when running virtually */ +#ifdef CONFIG_MMU /* * Statically mapped addresses: * @@ -33,6 +34,9 @@ * 1fxx xxxx -> fexx xxxx */ #define IO_ADDRESS(x) (((x) & 0x03ffffff) + 0xfb000000) -#define __io_address(n) __io(IO_ADDRESS(n)) +#else +#define IO_ADDRESS(x) (x) +#endif +#define __io_address(n) IOMEM(IO_ADDRESS(n)) #endif diff --git a/arch/arm/mach-realview/include/mach/io.h b/arch/arm/mach-realview/include/mach/io.h deleted file mode 100644 index f05bcdf605d..00000000000 --- a/arch/arm/mach-realview/include/mach/io.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-realview/include/mach/io.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-realview/include/mach/irqs-eb.h b/arch/arm/mach-realview/include/mach/irqs-eb.h new file mode 100644 index 00000000000..44754230fdc --- /dev/null +++ b/arch/arm/mach-realview/include/mach/irqs-eb.h @@ -0,0 +1,132 @@ +/* + * arch/arm/mach-realview/include/mach/irqs-eb.h + * + * Copyright (C) 2007 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __MACH_IRQS_EB_H +#define __MACH_IRQS_EB_H + +#define IRQ_EB_GIC_START 32 + +/* + * RealView EB interrupt sources + */ +#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */ +#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */ +#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */ +#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */ +#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */ +#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */ +#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */ +#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */ +#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */ + /* 9 reserved */ +#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */ +#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */ +#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */ +#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */ +#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */ +#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */ +#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */ +#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */ +#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */ +#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */ +#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */ +#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */ +#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */ +#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */ +#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */ +#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */ +#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */ +#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */ +#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */ +#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */ +#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */ +#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */ + +/* + * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile) + */ +#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0) +#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1) +#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2) +#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3) +#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4) +#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5) +#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6) +#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7) +#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8) +#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9) +#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */ +#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */ +#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */ +#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */ +#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14) +#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15) + +#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17) +#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18) +#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19) +#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20) +#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21) +#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22) +#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23) +#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24) +#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25) +#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26) +#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27) +#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28) + +#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29) +#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30) +#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31) + +/* + * The 11MPcore tile leaves the following unconnected. + */ +#define IRQ_EB11MP_UART2 0 +#define IRQ_EB11MP_UART3 0 +#define IRQ_EB11MP_CLCD 0 +#define IRQ_EB11MP_DMA 0 +#define IRQ_EB11MP_WDOG 0 +#define IRQ_EB11MP_GPIO0 0 +#define IRQ_EB11MP_GPIO1 0 +#define IRQ_EB11MP_GPIO2 0 +#define IRQ_EB11MP_SCI 0 +#define IRQ_EB11MP_SSP 0 + +#define NR_GIC_EB11MP 2 + +/* + * Only define NR_IRQS if less than NR_IRQS_EB + */ +#define NR_IRQS_EB (IRQ_EB_GIC_START + 128) + +#if defined(CONFIG_MACH_REALVIEW_EB) \ + && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB)) +#undef NR_IRQS +#define NR_IRQS NR_IRQS_EB +#endif + +#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \ + && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP)) +#undef MAX_GIC_NR +#define MAX_GIC_NR NR_GIC_EB11MP +#endif + +#endif /* __MACH_IRQS_EB_H */ diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h new file mode 100644 index 00000000000..708f84156f2 --- /dev/null +++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h @@ -0,0 +1,100 @@ +/* + * arch/arm/mach-realview/include/mach/irqs-pb1176.h + * + * Copyright (C) 2008 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __MACH_IRQS_PB1176_H +#define __MACH_IRQS_PB1176_H + +#define IRQ_DC1176_GIC_START 32 +#define IRQ_PB1176_GIC_START 64 + +/* + * ARM1176 DevChip interrupt sources (primary GIC) + */ +#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */ +#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */ +#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */ +#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */ +#define IRQ_DC1176_CORE_PMU (IRQ_DC1176_GIC_START + 7) /* Core PMU interrupt */ +#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */ +#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */ +#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */ +#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11) +#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12) +#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) +#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) +#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ +#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16) +#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ +#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ +#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ +#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */ +#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */ + +#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */ +#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */ + +/* + * RealView PB1176 interrupt sources (secondary GIC) + */ +#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */ +#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */ +#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */ +#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */ +#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5) +#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */ +#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */ +#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8) +#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9) +#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */ +#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */ + +#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16) + +#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */ + +#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22) +#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23) +#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ +#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ + +#define IRQ_PB1176_SCTL -1 + +#define NR_GIC_PB1176 2 + +/* + * Only define NR_IRQS if less than NR_IRQS_PB1176 + */ +#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96) + +#if defined(CONFIG_MACH_REALVIEW_PB1176) + +#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176) +#undef NR_IRQS +#define NR_IRQS NR_IRQS_PB1176 +#endif + +#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176) +#undef MAX_GIC_NR +#define MAX_GIC_NR NR_GIC_PB1176 +#endif + +#endif /* CONFIG_MACH_REALVIEW_PB1176 */ + +#endif /* __MACH_IRQS_PB1176_H */ diff --git a/arch/arm/mach-realview/include/mach/irqs-pb11mp.h b/arch/arm/mach-realview/include/mach/irqs-pb11mp.h new file mode 100644 index 00000000000..34e255add21 --- /dev/null +++ b/arch/arm/mach-realview/include/mach/irqs-pb11mp.h @@ -0,0 +1,122 @@ +/* + * arch/arm/mach-realview/include/mach/irqs-pb11mp.h + * + * Copyright (C) 2008 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __MACH_IRQS_PB11MP_H +#define __MACH_IRQS_PB11MP_H + +#define IRQ_TC11MP_GIC_START 32 +#define IRQ_PB11MP_GIC_START 64 + +/* + * ARM11MPCore test chip interrupt sources (primary GIC on the test chip) + */ +#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0) +#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1) +#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2) +#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3) +#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4) +#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5) +#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6) +#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7) +#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8) +#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9) +#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */ +#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */ +#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */ +#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */ +#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14) +#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15) + +#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17) +#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18) +#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19) +#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20) +#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21) +#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22) +#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23) +#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24) +#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25) +#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26) +#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27) +#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28) + +#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29) +#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30) +#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31) + +/* + * RealView PB11MPCore GIC interrupt sources (secondary GIC on the board) + */ +#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */ +#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */ +#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */ +#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */ +#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */ +#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */ +#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */ + /* 9 reserved */ +#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */ +#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */ +#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */ +#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */ +#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */ +#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */ +#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */ +#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */ +#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */ +#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */ +#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */ +#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */ +#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */ +#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */ +#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */ +#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */ +#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */ +#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */ +#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */ +#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */ +#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */ +#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */ + +#define IRQ_PB11MP_SMC -1 +#define IRQ_PB11MP_SCTL -1 + +#define NR_GIC_PB11MP 2 + +/* + * Only define NR_IRQS if less than NR_IRQS_PB11MP + */ +#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96) + +#if defined(CONFIG_MACH_REALVIEW_PB11MP) + +#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP) +#undef NR_IRQS +#define NR_IRQS NR_IRQS_PB11MP +#endif + +#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP) +#undef MAX_GIC_NR +#define MAX_GIC_NR NR_GIC_PB11MP +#endif + +#endif /* CONFIG_MACH_REALVIEW_PB11MP */ + +#endif /* __MACH_IRQS_PB11MP_H */ diff --git a/arch/arm/mach-realview/include/mach/irqs-pba8.h b/arch/arm/mach-realview/include/mach/irqs-pba8.h new file mode 100644 index 00000000000..4a88a4edb65 --- /dev/null +++ b/arch/arm/mach-realview/include/mach/irqs-pba8.h @@ -0,0 +1,94 @@ +/* + * arch/arm/mach-realview/include/mach/irqs-pba8.h + * + * Copyright (C) 2008 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __MACH_IRQS_PBA8_H +#define __MACH_IRQS_PBA8_H + +#define IRQ_PBA8_GIC_START 32 + +/* + * PB-A8 on-board gic irq sources + */ +#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */ +#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */ +#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */ +#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */ +#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */ +#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */ +#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */ +#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */ +#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */ + /* 9 reserved */ +#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */ +#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */ +#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */ +#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */ +#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */ +#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */ +#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */ +#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */ +#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */ +#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */ +#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */ +#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */ +#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */ +#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */ +#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */ +#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */ +#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */ +#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */ +#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */ +#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */ +#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */ +#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */ + +#define IRQ_PBA8_PMU (IRQ_PBA8_GIC_START + 47) /* Cortex-A8 PMU */ + +/* ... */ +#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50) +#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51) +#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52) +#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53) + +#define IRQ_PBA8_SMC -1 +#define IRQ_PBA8_SCTL -1 + +#define NR_GIC_PBA8 1 + +/* + * Only define NR_IRQS if less than NR_IRQS_PBA8 + */ +#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64) + +#if defined(CONFIG_MACH_REALVIEW_PBA8) + +#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8) +#undef NR_IRQS +#define NR_IRQS NR_IRQS_PBA8 +#endif + +#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8) +#undef MAX_GIC_NR +#define MAX_GIC_NR NR_GIC_PBA8 +#endif + +#endif /* CONFIG_MACH_REALVIEW_PBA8 */ + +#endif /* __MACH_IRQS_PBA8_H */ diff --git a/arch/arm/mach-realview/include/mach/irqs-pbx.h b/arch/arm/mach-realview/include/mach/irqs-pbx.h new file mode 100644 index 00000000000..206a3001f46 --- /dev/null +++ b/arch/arm/mach-realview/include/mach/irqs-pbx.h @@ -0,0 +1,109 @@ +/* + * arch/arm/mach-realview/include/mach/irqs-pbx.h + * + * Copyright (C) 2009 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __MACH_IRQS_PBX_H +#define __MACH_IRQS_PBX_H + +#define IRQ_PBX_GIC_START 32 + +/* + * PBX on-board gic irq sources + */ +#define IRQ_PBX_WATCHDOG (IRQ_PBX_GIC_START + 0) /* Watchdog timer */ +#define IRQ_PBX_SOFT (IRQ_PBX_GIC_START + 1) /* Software interrupt */ +#define IRQ_PBX_COMMRx (IRQ_PBX_GIC_START + 2) /* Debug Comm Rx interrupt */ +#define IRQ_PBX_COMMTx (IRQ_PBX_GIC_START + 3) /* Debug Comm Tx interrupt */ +#define IRQ_PBX_TIMER0_1 (IRQ_PBX_GIC_START + 4) /* Timer 0/1 (default timer) */ +#define IRQ_PBX_TIMER2_3 (IRQ_PBX_GIC_START + 5) /* Timer 2/3 */ +#define IRQ_PBX_GPIO0 (IRQ_PBX_GIC_START + 6) /* GPIO 0 */ +#define IRQ_PBX_GPIO1 (IRQ_PBX_GIC_START + 7) /* GPIO 1 */ +#define IRQ_PBX_GPIO2 (IRQ_PBX_GIC_START + 8) /* GPIO 2 */ + /* 9 reserved */ +#define IRQ_PBX_RTC (IRQ_PBX_GIC_START + 10) /* Real Time Clock */ +#define IRQ_PBX_SSP (IRQ_PBX_GIC_START + 11) /* Synchronous Serial Port */ +#define IRQ_PBX_UART0 (IRQ_PBX_GIC_START + 12) /* UART 0 on development chip */ +#define IRQ_PBX_UART1 (IRQ_PBX_GIC_START + 13) /* UART 1 on development chip */ +#define IRQ_PBX_UART2 (IRQ_PBX_GIC_START + 14) /* UART 2 on development chip */ +#define IRQ_PBX_UART3 (IRQ_PBX_GIC_START + 15) /* UART 3 on development chip */ +#define IRQ_PBX_SCI (IRQ_PBX_GIC_START + 16) /* Smart Card Interface */ +#define IRQ_PBX_MMCI0A (IRQ_PBX_GIC_START + 17) /* Multimedia Card 0A */ +#define IRQ_PBX_MMCI0B (IRQ_PBX_GIC_START + 18) /* Multimedia Card 0B */ +#define IRQ_PBX_AACI (IRQ_PBX_GIC_START + 19) /* Audio Codec */ +#define IRQ_PBX_KMI0 (IRQ_PBX_GIC_START + 20) /* Keyboard/Mouse port 0 */ +#define IRQ_PBX_KMI1 (IRQ_PBX_GIC_START + 21) /* Keyboard/Mouse port 1 */ +#define IRQ_PBX_CHARLCD (IRQ_PBX_GIC_START + 22) /* Character LCD */ +#define IRQ_PBX_CLCD (IRQ_PBX_GIC_START + 23) /* CLCD controller */ +#define IRQ_PBX_DMAC (IRQ_PBX_GIC_START + 24) /* DMA controller */ +#define IRQ_PBX_PWRFAIL (IRQ_PBX_GIC_START + 25) /* Power failure */ +#define IRQ_PBX_PISMO (IRQ_PBX_GIC_START + 26) /* PISMO interface */ +#define IRQ_PBX_DoC (IRQ_PBX_GIC_START + 27) /* Disk on Chip memory controller */ +#define IRQ_PBX_ETH (IRQ_PBX_GIC_START + 28) /* Ethernet controller */ +#define IRQ_PBX_USB (IRQ_PBX_GIC_START + 29) /* USB controller */ +#define IRQ_PBX_TSPEN (IRQ_PBX_GIC_START + 30) /* Touchscreen pen */ +#define IRQ_PBX_TSKPAD (IRQ_PBX_GIC_START + 31) /* Touchscreen keypad */ + +#define IRQ_PBX_PMU_SCU0 (IRQ_PBX_GIC_START + 32) /* SCU PMU Interrupts (11mp) */ +#define IRQ_PBX_PMU_SCU1 (IRQ_PBX_GIC_START + 33) +#define IRQ_PBX_PMU_SCU2 (IRQ_PBX_GIC_START + 34) +#define IRQ_PBX_PMU_SCU3 (IRQ_PBX_GIC_START + 35) +#define IRQ_PBX_PMU_SCU4 (IRQ_PBX_GIC_START + 36) +#define IRQ_PBX_PMU_SCU5 (IRQ_PBX_GIC_START + 37) +#define IRQ_PBX_PMU_SCU6 (IRQ_PBX_GIC_START + 38) +#define IRQ_PBX_PMU_SCU7 (IRQ_PBX_GIC_START + 39) + +#define IRQ_PBX_WATCHDOG1 (IRQ_PBX_GIC_START + 40) /* Watchdog1 timer */ +#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */ +#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */ +/* ... */ +#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */ +#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 45) +#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 46) +#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 47) + +/* ... */ +#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50) +#define IRQ_PBX_PCI1 (IRQ_PBX_GIC_START + 51) +#define IRQ_PBX_PCI2 (IRQ_PBX_GIC_START + 52) +#define IRQ_PBX_PCI3 (IRQ_PBX_GIC_START + 53) + +#define IRQ_PBX_SMC -1 +#define IRQ_PBX_SCTL -1 + +#define NR_GIC_PBX 1 + +/* + * Only define NR_IRQS if less than NR_IRQS_PBX + */ +#define NR_IRQS_PBX (IRQ_PBX_GIC_START + 96) + +#if defined(CONFIG_MACH_REALVIEW_PBX) + +#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBX) +#undef NR_IRQS +#define NR_IRQS NR_IRQS_PBX +#endif + +#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBX) +#undef MAX_GIC_NR +#define MAX_GIC_NR NR_GIC_PBX +#endif + +#endif /* CONFIG_MACH_REALVIEW_PBX */ + +#endif /* __MACH_IRQS_PBX_H */ diff --git a/arch/arm/mach-realview/include/mach/irqs.h b/arch/arm/mach-realview/include/mach/irqs.h index fe5cb987aa2..78854f2fa32 100644 --- a/arch/arm/mach-realview/include/mach/irqs.h +++ b/arch/arm/mach-realview/include/mach/irqs.h @@ -22,10 +22,11 @@ #ifndef __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H -#include <mach/board-eb.h> -#include <mach/board-pb11mp.h> -#include <mach/board-pb1176.h> -#include <mach/board-pba8.h> +#include <mach/irqs-eb.h> +#include <mach/irqs-pb11mp.h> +#include <mach/irqs-pb1176.h> +#include <mach/irqs-pba8.h> +#include <mach/irqs-pbx.h> #define IRQ_LOCALTIMER 29 #define IRQ_LOCALWDOG 30 diff --git a/arch/arm/mach-realview/include/mach/memory.h b/arch/arm/mach-realview/include/mach/memory.h index 293c30025e7..db09170e383 100644 --- a/arch/arm/mach-realview/include/mach/memory.h +++ b/arch/arm/mach-realview/include/mach/memory.h @@ -24,9 +24,50 @@ * Physical DRAM offset. */ #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET -#define PHYS_OFFSET UL(0x70000000) +#define PLAT_PHYS_OFFSET UL(0x70000000) #else -#define PHYS_OFFSET UL(0x00000000) +#define PLAT_PHYS_OFFSET UL(0x00000000) #endif +#ifdef CONFIG_SPARSEMEM + +/* + * Sparsemem definitions for RealView PBX. + * + * The RealView PBX board has another block of 512MB of RAM at 0x20000000, + * however only the block at 0x70000000 (or the 256MB mirror at 0x00000000) + * may be used for DMA. + * + * The macros below define a section size of 256MB and a non-linear virtual to + * physical mapping: + * + * 256MB @ 0x00000000 -> PAGE_OFFSET + * 512MB @ 0x20000000 -> PAGE_OFFSET + 0x10000000 + * 256MB @ 0x80000000 -> PAGE_OFFSET + 0x30000000 + */ +#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET +#error "SPARSEMEM not available with REALVIEW_HIGH_PHYS_OFFSET" +#endif + +#define MAX_PHYSMEM_BITS 32 +#define SECTION_SIZE_BITS 28 + +/* bank page offsets */ +#define PAGE_OFFSET1 (PAGE_OFFSET + 0x10000000) +#define PAGE_OFFSET2 (PAGE_OFFSET + 0x30000000) + +#define PHYS_OFFSET PLAT_PHYS_OFFSET + +#define __phys_to_virt(phys) \ + ((phys) >= 0x80000000 ? (phys) - 0x80000000 + PAGE_OFFSET2 : \ + (phys) >= 0x20000000 ? (phys) - 0x20000000 + PAGE_OFFSET1 : \ + (phys) + PAGE_OFFSET) + +#define __virt_to_phys(virt) \ + ((virt) >= PAGE_OFFSET2 ? (virt) - PAGE_OFFSET2 + 0x80000000 : \ + (virt) >= PAGE_OFFSET1 ? (virt) - PAGE_OFFSET1 + 0x20000000 : \ + (virt) - PAGE_OFFSET) + +#endif /* CONFIG_SPARSEMEM */ + #endif diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h index 793a3a33271..1b77a27bada 100644 --- a/arch/arm/mach-realview/include/mach/platform.h +++ b/arch/arm/mach-realview/include/mach/platform.h @@ -119,19 +119,6 @@ #define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET) #define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET) -/* - * Values for REALVIEW_SYS_RESET_CTRL - */ -#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01 -#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02 -#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03 -#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04 -#define REALVIEW_SYS_CTRL_RESET_POR 0x05 -#define REALVIEW_SYS_CTRL_RESET_DoC 0x06 - -#define REALVIEW_SYS_CTRL_LED (1 << 0) - - /* ------------------------------------------------------------------------ * RealView control registers * ------------------------------------------------------------------------ @@ -153,7 +140,7 @@ * SYS_CLD, SYS_BOOTCS */ #define REALVIEW_SYS_LOCK_LOCKED (1 << 16) -#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */ +#define REALVIEW_SYS_LOCK_VAL 0xA05F /* Enable write access */ /* * REALVIEW_SYS_FLASH @@ -204,6 +191,12 @@ #define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */ /* + * CompactFlash + */ +#define REALVIEW_CF_BASE 0x18000000 /* CompactFlash */ +#define REALVIEW_CF_MEM_BASE 0x18003000 /* SMC for CompactFlash */ + +/* * Disk on Chip */ #define REALVIEW_DOC_BASE 0x2C000000 @@ -238,12 +231,6 @@ #define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */ #define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */ -/* - * Clean base - dummy - * - */ -#define CLEAN_BASE REALVIEW_BOOT_ROM_HI - /* * System controller bit assignment */ @@ -256,20 +243,6 @@ #define REALVIEW_TIMER4_EnSel 21 -#define MAX_TIMER 2 -#define MAX_PERIOD 699050 -#define TICKS_PER_uSEC 1 - -/* - * These are useconds NOT ticks. - * - */ -#define mSEC_1 1000 -#define mSEC_5 (mSEC_1 * 5) -#define mSEC_10 (mSEC_1 * 10) -#define mSEC_25 (mSEC_1 * 25) -#define SEC_1 (mSEC_1 * 1000) - #define REALVIEW_CSR_BASE 0x10000000 #define REALVIEW_CSR_SIZE 0x10000000 diff --git a/arch/arm/mach-realview/include/mach/scu.h b/arch/arm/mach-realview/include/mach/scu.h deleted file mode 100644 index d55802d645a..00000000000 --- a/arch/arm/mach-realview/include/mach/scu.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ASMARM_ARCH_SCU_H -#define __ASMARM_ARCH_SCU_H - -/* - * SCU registers - */ -#define SCU_CTRL 0x00 -#define SCU_CONFIG 0x04 -#define SCU_CPU_STATUS 0x08 -#define SCU_INVALIDATE 0x0c -#define SCU_FPGA_REVISION 0x10 - -#endif diff --git a/arch/arm/mach-realview/include/mach/smp.h b/arch/arm/mach-realview/include/mach/smp.h deleted file mode 100644 index 515819efd04..00000000000 --- a/arch/arm/mach-realview/include/mach/smp.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef ASMARM_ARCH_SMP_H -#define ASMARM_ARCH_SMP_H - - -#include <asm/hardware/gic.h> - -#define hard_smp_processor_id() \ - ({ \ - unsigned int cpunum; \ - __asm__("mrc p15, 0, %0, c0, c0, 5" \ - : "=r" (cpunum)); \ - cpunum &= 0x0F; \ - }) - -/* - * We use IRQ1 as the IPI - */ -static inline void smp_cross_call(cpumask_t callmap) -{ - gic_raise_softirq(callmap, 1); -} - -/* - * Do nothing on MPcore. - */ -static inline void smp_cross_call_done(cpumask_t callmap) -{ -} - -#endif diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h deleted file mode 100644 index a2f61c78adb..00000000000 --- a/arch/arm/mach-realview/include/mach/system.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * arch/arm/mach-realview/include/mach/system.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include <linux/io.h> -#include <mach/hardware.h> -#include <mach/platform.h> - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET; - unsigned int val; - - /* - * To reset, we hit the on-board reset register - * in the system FPGA - */ - val = __raw_readl(hdr_ctrl); - val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR; - __raw_writel(val, hdr_ctrl); -} - -#endif diff --git a/arch/arm/mach-realview/include/mach/timex.h b/arch/arm/mach-realview/include/mach/timex.h deleted file mode 100644 index 4eeb069373c..00000000000 --- a/arch/arm/mach-realview/include/mach/timex.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * arch/arm/mach-realview/include/mach/timex.h - * - * RealView architecture timex specifications - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/arch/arm/mach-realview/include/mach/uncompress.h b/arch/arm/mach-realview/include/mach/uncompress.h index 415d634d52a..cfa30d21783 100644 --- a/arch/arm/mach-realview/include/mach/uncompress.h +++ b/arch/arm/mach-realview/include/mach/uncompress.h @@ -24,6 +24,7 @@ #include <mach/board-pb11mp.h> #include <mach/board-pb1176.h> #include <mach/board-pba8.h> +#include <mach/board-pbx.h> #define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) #define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c)) @@ -43,6 +44,8 @@ static inline unsigned long get_uart_base(void) return REALVIEW_PB1176_UART0_BASE; else if (machine_is_realview_pba8()) return REALVIEW_PBA8_UART0_BASE; + else if (machine_is_realview_pbx()) + return REALVIEW_PBX_UART0_BASE; else return 0; } @@ -72,4 +75,3 @@ static inline void flush(void) * nothing to do */ #define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h deleted file mode 100644 index fe0de1b507a..00000000000 --- a/arch/arm/mach-realview/include/mach/vmalloc.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * arch/arm/mach-realview/include/mach/vmalloc.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xf8000000 |