aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-realview/core.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-realview/core.c')
-rw-r--r--arch/arm/mach-realview/core.c450
1 files changed, 66 insertions, 384 deletions
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 07c08151dfe..8c1b39a0caa 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -21,7 +21,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
@@ -30,75 +30,32 @@
#include <linux/ata_platform.h>
#include <linux/amba/mmci.h>
#include <linux/gfp.h>
+#include <linux/mtd/physmap.h>
+#include <linux/memblock.h>
-#include <asm/clkdev.h>
-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/icst.h>
#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
-#include <asm/hardware/gic.h>
-#include <mach/clkdev.h>
#include <mach/platform.h>
#include <mach/irqs.h>
-#include <plat/timer-sp.h>
+#include <asm/hardware/timer-sp.h>
-#include "core.h"
-
-/* used by entry-macro.S and platsmp.c */
-void __iomem *gic_cpu_base_addr;
-
-#ifdef CONFIG_ZONE_DMA
-/*
- * Adjust the zones if there are restrictions for DMA access.
- */
-void __init realview_adjust_zones(unsigned long *size, unsigned long *hole)
-{
- unsigned long dma_size = SZ_256M >> PAGE_SHIFT;
-
- if (!machine_is_realview_pbx() || size[0] <= dma_size)
- return;
-
- size[ZONE_NORMAL] = size[0] - dma_size;
- size[ZONE_DMA] = dma_size;
- hole[ZONE_NORMAL] = hole[0];
- hole[ZONE_DMA] = 0;
-}
-#endif
+#include <plat/clcd.h>
+#include <plat/sched_clock.h>
+#include "core.h"
#define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
-static int realview_flash_init(void)
-{
- u32 val;
-
- val = __raw_readl(REALVIEW_FLASHCTRL);
- val &= ~REALVIEW_FLASHPROG_FLVPPEN;
- __raw_writel(val, REALVIEW_FLASHCTRL);
-
- return 0;
-}
-
-static void realview_flash_exit(void)
-{
- u32 val;
-
- val = __raw_readl(REALVIEW_FLASHCTRL);
- val &= ~REALVIEW_FLASHPROG_FLVPPEN;
- __raw_writel(val, REALVIEW_FLASHCTRL);
-}
-
-static void realview_flash_set_vpp(int on)
+static void realview_flash_set_vpp(struct platform_device *pdev, int on)
{
u32 val;
@@ -110,16 +67,13 @@ static void realview_flash_set_vpp(int on)
__raw_writel(val, REALVIEW_FLASHCTRL);
}
-static struct flash_platform_data realview_flash_data = {
- .map_name = "cfi_probe",
+static struct physmap_flash_data realview_flash_data = {
.width = 4,
- .init = realview_flash_init,
- .exit = realview_flash_exit,
.set_vpp = realview_flash_set_vpp,
};
struct platform_device realview_flash_device = {
- .name = "armflash",
+ .name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &realview_flash_data,
@@ -195,6 +149,21 @@ struct platform_device realview_cf_device = {
},
};
+static struct resource realview_leds_resources[] = {
+ {
+ .start = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET,
+ .end = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+struct platform_device realview_leds_device = {
+ .name = "versatile-leds",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(realview_leds_resources),
+ .resource = realview_leds_resources,
+};
+
static struct resource realview_i2c_resource = {
.start = REALVIEW_I2C_BASE,
.end = REALVIEW_I2C_BASE + SZ_4K - 1,
@@ -270,109 +239,12 @@ struct mmci_platform_data realview_mmc1_plat_data = {
.cd_invert = true,
};
-/*
- * Clock handling
- */
-static const struct icst_params realview_oscvco_params = {
- .ref = 24000000,
- .vco_max = ICST307_VCO_MAX,
- .vco_min = ICST307_VCO_MIN,
- .vd_min = 4 + 8,
- .vd_max = 511 + 8,
- .rd_min = 1 + 2,
- .rd_max = 127 + 2,
- .s2div = icst307_s2div,
- .idx2s = icst307_idx2s,
-};
-
-static void realview_oscvco_set(struct clk *clk, struct icst_vco vco)
-{
- void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
- u32 val;
-
- val = readl(clk->vcoreg) & ~0x7ffff;
- val |= vco.v | (vco.r << 9) | (vco.s << 16);
-
- writel(0xa05f, sys_lock);
- writel(val, clk->vcoreg);
- writel(0, sys_lock);
-}
-
-static const struct clk_ops oscvco_clk_ops = {
- .round = icst_clk_round,
- .set = icst_clk_set,
- .setvco = realview_oscvco_set,
-};
-
-static struct clk oscvco_clk = {
- .ops = &oscvco_clk_ops,
- .params = &realview_oscvco_params,
-};
-
-/*
- * These are fixed clocks.
- */
-static struct clk ref24_clk = {
- .rate = 24000000,
-};
-
-static struct clk dummy_apb_pclk;
-
-static struct clk_lookup lookups[] = {
- { /* Bus clock */
- .con_id = "apb_pclk",
- .clk = &dummy_apb_pclk,
- }, { /* UART0 */
- .dev_id = "dev:uart0",
- .clk = &ref24_clk,
- }, { /* UART1 */
- .dev_id = "dev:uart1",
- .clk = &ref24_clk,
- }, { /* UART2 */
- .dev_id = "dev:uart2",
- .clk = &ref24_clk,
- }, { /* UART3 */
- .dev_id = "fpga:uart3",
- .clk = &ref24_clk,
- }, { /* UART3 is on the dev chip in PB1176 */
- .dev_id = "dev:uart3",
- .clk = &ref24_clk,
- }, { /* UART4 only exists in PB1176 */
- .dev_id = "fpga:uart4",
- .clk = &ref24_clk,
- }, { /* KMI0 */
- .dev_id = "fpga:kmi0",
- .clk = &ref24_clk,
- }, { /* KMI1 */
- .dev_id = "fpga:kmi1",
- .clk = &ref24_clk,
- }, { /* MMC0 */
- .dev_id = "fpga:mmc0",
- .clk = &ref24_clk,
- }, { /* CLCD is in the PB1176 and EB DevChip */
- .dev_id = "dev:clcd",
- .clk = &oscvco_clk,
- }, { /* PB:CLCD */
- .dev_id = "issp:clcd",
- .clk = &oscvco_clk,
- }, { /* SSP */
- .dev_id = "dev:ssp0",
- .clk = &ref24_clk,
- }
-};
-
-static int __init clk_init(void)
+void __init realview_init_early(void)
{
- if (machine_is_realview_pb1176())
- oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
- else
- oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
+ void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
- return 0;
+ versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
}
-core_initcall(clk_init);
/*
* CLCD support.
@@ -387,157 +259,6 @@ core_initcall(clk_init);
#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
#define SYS_CLCD_ID_VGA (0x1f << 8)
-static struct clcd_panel vga = {
- .mode = {
- .name = "VGA",
- .refresh = 60,
- .xres = 640,
- .yres = 480,
- .pixclock = 39721,
- .left_margin = 40,
- .right_margin = 24,
- .upper_margin = 32,
- .lower_margin = 11,
- .hsync_len = 96,
- .vsync_len = 2,
- .sync = 0,
- .vmode = FB_VMODE_NONINTERLACED,
- },
- .width = -1,
- .height = -1,
- .tim2 = TIM2_BCD | TIM2_IPC,
- .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
- .bpp = 16,
-};
-
-static struct clcd_panel xvga = {
- .mode = {
- .name = "XVGA",
- .refresh = 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15748,
- .left_margin = 152,
- .right_margin = 48,
- .upper_margin = 23,
- .lower_margin = 3,
- .hsync_len = 104,
- .vsync_len = 4,
- .sync = 0,
- .vmode = FB_VMODE_NONINTERLACED,
- },
- .width = -1,
- .height = -1,
- .tim2 = TIM2_BCD | TIM2_IPC,
- .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
- .bpp = 16,
-};
-
-static struct clcd_panel sanyo_3_8_in = {
- .mode = {
- .name = "Sanyo QVGA",
- .refresh = 116,
- .xres = 320,
- .yres = 240,
- .pixclock = 100000,
- .left_margin = 6,
- .right_margin = 6,
- .upper_margin = 5,
- .lower_margin = 5,
- .hsync_len = 6,
- .vsync_len = 6,
- .sync = 0,
- .vmode = FB_VMODE_NONINTERLACED,
- },
- .width = -1,
- .height = -1,
- .tim2 = TIM2_BCD,
- .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
- .bpp = 16,
-};
-
-static struct clcd_panel sanyo_2_5_in = {
- .mode = {
- .name = "Sanyo QVGA Portrait",
- .refresh = 116,
- .xres = 240,
- .yres = 320,
- .pixclock = 100000,
- .left_margin = 20,
- .right_margin = 10,
- .upper_margin = 2,
- .lower_margin = 2,
- .hsync_len = 10,
- .vsync_len = 2,
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
- .vmode = FB_VMODE_NONINTERLACED,
- },
- .width = -1,
- .height = -1,
- .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
- .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
- .bpp = 16,
-};
-
-static struct clcd_panel epson_2_2_in = {
- .mode = {
- .name = "Epson QCIF",
- .refresh = 390,
- .xres = 176,
- .yres = 220,
- .pixclock = 62500,
- .left_margin = 3,
- .right_margin = 2,
- .upper_margin = 1,
- .lower_margin = 0,
- .hsync_len = 3,
- .vsync_len = 2,
- .sync = 0,
- .vmode = FB_VMODE_NONINTERLACED,
- },
- .width = -1,
- .height = -1,
- .tim2 = TIM2_BCD | TIM2_IPC,
- .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
- .bpp = 16,
-};
-
-/*
- * Detect which LCD panel is connected, and return the appropriate
- * clcd_panel structure. Note: we do not have any information on
- * the required timings for the 8.4in panel, so we presently assume
- * VGA timings.
- */
-static struct clcd_panel *realview_clcd_panel(void)
-{
- void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
- struct clcd_panel *vga_panel;
- struct clcd_panel *panel;
- u32 val;
-
- if (machine_is_realview_eb())
- vga_panel = &vga;
- else
- vga_panel = &xvga;
-
- val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
- if (val == SYS_CLCD_ID_SANYO_3_8)
- panel = &sanyo_3_8_in;
- else if (val == SYS_CLCD_ID_SANYO_2_5)
- panel = &sanyo_2_5_in;
- else if (val == SYS_CLCD_ID_EPSON_2_2)
- panel = &epson_2_2_in;
- else if (val == SYS_CLCD_ID_VGA)
- panel = vga_panel;
- else {
- printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
- val);
- panel = vga_panel;
- }
-
- return panel;
-}
-
/*
* Disable all display connectors on the interface module.
*/
@@ -567,96 +288,62 @@ static void realview_clcd_enable(struct clcd_fb *fb)
writel(val, sys_clcd);
}
+/*
+ * Detect which LCD panel is connected, and return the appropriate
+ * clcd_panel structure. Note: we do not have any information on
+ * the required timings for the 8.4in panel, so we presently assume
+ * VGA timings.
+ */
static int realview_clcd_setup(struct clcd_fb *fb)
{
+ void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
+ const char *panel_name, *vga_panel_name;
unsigned long framesize;
- dma_addr_t dma;
+ u32 val;
- if (machine_is_realview_eb())
+ if (machine_is_realview_eb()) {
/* VGA, 16bpp */
framesize = 640 * 480 * 2;
- else
+ vga_panel_name = "VGA";
+ } else {
/* XVGA, 16bpp */
framesize = 1024 * 768 * 2;
-
- fb->panel = realview_clcd_panel();
-
- fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
- &dma, GFP_KERNEL | GFP_DMA);
- if (!fb->fb.screen_base) {
- printk(KERN_ERR "CLCD: unable to map framebuffer\n");
- return -ENOMEM;
+ vga_panel_name = "XVGA";
}
- fb->fb.fix.smem_start = dma;
- fb->fb.fix.smem_len = framesize;
-
- return 0;
-}
+ val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
+ if (val == SYS_CLCD_ID_SANYO_3_8)
+ panel_name = "Sanyo TM38QV67A02A";
+ else if (val == SYS_CLCD_ID_SANYO_2_5)
+ panel_name = "Sanyo QVGA Portrait";
+ else if (val == SYS_CLCD_ID_EPSON_2_2)
+ panel_name = "Epson L2F50113T00";
+ else if (val == SYS_CLCD_ID_VGA)
+ panel_name = vga_panel_name;
+ else {
+ pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
+ panel_name = vga_panel_name;
+ }
-static int realview_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
-{
- return dma_mmap_writecombine(&fb->dev->dev, vma,
- fb->fb.screen_base,
- fb->fb.fix.smem_start,
- fb->fb.fix.smem_len);
-}
+ fb->panel = versatile_clcd_get_panel(panel_name);
+ if (!fb->panel)
+ return -EINVAL;
-static void realview_clcd_remove(struct clcd_fb *fb)
-{
- dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
- fb->fb.screen_base, fb->fb.fix.smem_start);
+ return versatile_clcd_setup_dma(fb, framesize);
}
struct clcd_board clcd_plat_data = {
.name = "RealView",
+ .caps = CLCD_CAP_ALL,
.check = clcdfb_check,
.decode = clcdfb_decode,
.disable = realview_clcd_disable,
.enable = realview_clcd_enable,
.setup = realview_clcd_setup,
- .mmap = realview_clcd_mmap,
- .remove = realview_clcd_remove,
+ .mmap = versatile_clcd_mmap_dma,
+ .remove = versatile_clcd_remove_dma,
};
-#ifdef CONFIG_LEDS
-#define VA_LEDS_BASE (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LED_OFFSET)
-
-void realview_leds_event(led_event_t ledevt)
-{
- unsigned long flags;
- u32 val;
- u32 led = 1 << smp_processor_id();
-
- local_irq_save(flags);
- val = readl(VA_LEDS_BASE);
-
- switch (ledevt) {
- case led_idle_start:
- val = val & ~led;
- break;
-
- case led_idle_end:
- val = val | led;
- break;
-
- case led_timer:
- val = val ^ REALVIEW_SYS_LED7;
- break;
-
- case led_halted:
- val = 0;
- break;
-
- default:
- break;
- }
-
- writel(val, VA_LEDS_BASE);
- local_irq_restore(flags);
-}
-#endif /* CONFIG_LEDS */
-
/*
* Where is the timer (VA)?
*/
@@ -692,27 +379,22 @@ void __init realview_timer_init(unsigned int timer_irq)
writel(0, timer2_va_base + TIMER_CTRL);
writel(0, timer3_va_base + TIMER_CTRL);
- sp804_clocksource_init(timer3_va_base);
- sp804_clockevents_init(timer0_va_base, timer_irq);
+ sp804_clocksource_init(timer3_va_base, "timer3");
+ sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");
}
/*
* Setup the memory banks.
*/
-void realview_fixup(struct machine_desc *mdesc, struct tag *tags, char **from,
- struct meminfo *meminfo)
+void realview_fixup(struct tag *tags, char **from)
{
/*
* Most RealView platforms have 512MB contiguous RAM at 0x70000000.
* Half of this is mirrored at 0.
*/
#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
- meminfo->bank[0].start = 0x70000000;
- meminfo->bank[0].size = SZ_512M;
- meminfo->nr_banks = 1;
+ memblock_add(0x70000000, SZ_512M);
#else
- meminfo->bank[0].start = 0;
- meminfo->bank[0].size = SZ_256M;
- meminfo->nr_banks = 1;
+ memblock_add(0, SZ_256M);
#endif
}
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-11-05 08:36:23 +0000