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Diffstat (limited to 'arch/arm/mach-pxa/include/mach/pxa3xx-regs.h')
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx-regs.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index bcf3fb2c4b3..f4d48d20754 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -13,6 +13,8 @@
#ifndef __ASM_ARCH_PXA3XX_REGS_H
#define __ASM_ARCH_PXA3XX_REGS_H
+#include <mach/hardware.h>
+
/*
* Oscillator Configuration Register (OSCC)
*/
@@ -36,7 +38,7 @@
#define PCMD(x) __REG(0x40F50110 + ((x) << 2))
/*
- * Slave Power Managment Unit
+ * Slave Power Management Unit
*/
#define ASCR __REG(0x40f40000) /* Application Subsystem Power Status/Configuration */
#define ARSR __REG(0x40f40004) /* Application Subsystem Reset Status */
@@ -129,6 +131,7 @@
#define AICSR __REG(0x41340008) /* Application Subsystem Interrupt Control/Status Register */
#define CKENA __REG(0x4134000C) /* A Clock Enable Register */
#define CKENB __REG(0x41340010) /* B Clock Enable Register */
+#define CKENC __REG(0x41340024) /* C Clock Enable Register */
#define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */
#define ACCR_XPDIS (1 << 31) /* Core PLL Output Disable */
@@ -197,7 +200,7 @@
#define CKEN_MVED 43 /* < MVED clock enable */
/* Note: GCU clock enable bit differs on PXA300/PXA310 and PXA320 */
-#define PXA300_CKEN_GRAPHICS 42 /* Graphics controller clock enable */
-#define PXA320_CKEN_GRAPHICS 7 /* Graphics controller clock enable */
+#define CKEN_PXA300_GCU 42 /* Graphics controller clock enable */
+#define CKEN_PXA320_GCU 7 /* Graphics controller clock enable */
#endif /* __ASM_ARCH_PXA3XX_REGS_H */