diff options
Diffstat (limited to 'arch/arm/mach-pxa/generic.c')
| -rw-r--r-- | arch/arm/mach-pxa/generic.c | 169 |
1 files changed, 37 insertions, 132 deletions
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 80721c610d4..42254175fcf 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -16,25 +16,46 @@ * initialization stuff for PXA machines which can be overridden later if * need be. */ +#include <linux/gpio.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/delay.h> -#include <linux/ioport.h> -#include <linux/pm.h> -#include <linux/string.h> -#include <linux/sysdev.h> -#include <asm/hardware.h> -#include <asm/irq.h> -#include <asm/system.h> -#include <asm/pgtable.h> +#include <mach/hardware.h> #include <asm/mach/map.h> +#include <asm/mach-types.h> -#include <asm/arch/pxa-regs.h> +#include <mach/reset.h> +#include <mach/smemc.h> +#include <mach/pxa3xx-regs.h> #include "generic.h" +void clear_reset_status(unsigned int mask) +{ + if (cpu_is_pxa2xx()) + pxa2xx_clear_reset_status(mask); + else { + /* RESET_STATUS_* has a 1:1 mapping with ARSR */ + ARSR = mask; + } +} + +unsigned long get_clock_tick_rate(void) +{ + unsigned long clock_tick_rate; + + if (cpu_is_pxa25x()) + clock_tick_rate = 3686400; + else if (machine_is_mainstone()) + clock_tick_rate = 3249600; + else + clock_tick_rate = 3250000; + + return clock_tick_rate; +} +EXPORT_SYMBOL(get_clock_tick_rate); + /* * Get the clock frequency as reflected by CCCR and the turbo flag. * We assume these values have been applied via a fcs. @@ -42,85 +63,26 @@ */ unsigned int get_clk_frequency_khz(int info) { - if (cpu_is_pxa21x() || cpu_is_pxa25x()) + if (cpu_is_pxa25x()) return pxa25x_get_clk_frequency_khz(info); else if (cpu_is_pxa27x()) return pxa27x_get_clk_frequency_khz(info); - else - return pxa3xx_get_clk_frequency_khz(info); + return 0; } EXPORT_SYMBOL(get_clk_frequency_khz); /* - * Return the current memory clock frequency in units of 10kHz - */ -unsigned int get_memclk_frequency_10khz(void) -{ - if (cpu_is_pxa21x() || cpu_is_pxa25x()) - return pxa25x_get_memclk_frequency_10khz(); - else if (cpu_is_pxa27x()) - return pxa27x_get_memclk_frequency_10khz(); - else - return pxa3xx_get_memclk_frequency_10khz(); -} -EXPORT_SYMBOL(get_memclk_frequency_10khz); - -/* - * Routine to safely enable or disable a clock in the CKEN - */ -void __pxa_set_cken(int clock, int enable) -{ - unsigned long flags; - local_irq_save(flags); - - if (enable) - CKEN |= (1 << clock); - else - CKEN &= ~(1 << clock); - - local_irq_restore(flags); -} -EXPORT_SYMBOL(__pxa_set_cken); - -/* * Intel PXA2xx internal register mapping. * - * Note 1: not all PXA2xx variants implement all those addresses. - * - * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table - * and cache flush area. + * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table + * and cache flush area. */ -static struct map_desc standard_io_desc[] __initdata = { +static struct map_desc common_io_desc[] __initdata = { { /* Devs */ .virtual = 0xf2000000, .pfn = __phys_to_pfn(0x40000000), .length = 0x02000000, .type = MT_DEVICE - }, { /* LCD */ - .virtual = 0xf4000000, - .pfn = __phys_to_pfn(0x44000000), - .length = 0x00100000, - .type = MT_DEVICE - }, { /* Mem Ctl */ - .virtual = 0xf6000000, - .pfn = __phys_to_pfn(0x48000000), - .length = 0x00200000, - .type = MT_DEVICE - }, { /* USB host */ - .virtual = 0xf8000000, - .pfn = __phys_to_pfn(0x4c000000), - .length = 0x00100000, - .type = MT_DEVICE - }, { /* Camera */ - .virtual = 0xfa000000, - .pfn = __phys_to_pfn(0x50000000), - .length = 0x00100000, - .type = MT_DEVICE - }, { /* IMem ctl */ - .virtual = 0xfe000000, - .pfn = __phys_to_pfn(0x58000000), - .length = 0x00100000, - .type = MT_DEVICE }, { /* UNCACHED_PHYS_0 */ .virtual = 0xff000000, .pfn = __phys_to_pfn(0x00000000), @@ -131,62 +93,5 @@ static struct map_desc standard_io_desc[] __initdata = { void __init pxa_map_io(void) { - iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); - get_clk_frequency_khz(1); + iotable_init(ARRAY_AND_SIZE(common_io_desc)); } - -#ifdef CONFIG_PM - -static unsigned long saved_gplr[4]; -static unsigned long saved_gpdr[4]; -static unsigned long saved_grer[4]; -static unsigned long saved_gfer[4]; - -static int pxa_gpio_suspend(struct sys_device *dev, pm_message_t state) -{ - int i, gpio; - - for (gpio = 0, i = 0; gpio < pxa_last_gpio; gpio += 32, i++) { - saved_gplr[i] = GPLR(gpio); - saved_gpdr[i] = GPDR(gpio); - saved_grer[i] = GRER(gpio); - saved_gfer[i] = GFER(gpio); - - /* Clear GPIO transition detect bits */ - GEDR(gpio) = GEDR(gpio); - } - return 0; -} - -static int pxa_gpio_resume(struct sys_device *dev) -{ - int i, gpio; - - for (gpio = 0, i = 0; gpio < pxa_last_gpio; gpio += 32, i++) { - /* restore level with set/clear */ - GPSR(gpio) = saved_gplr[i]; - GPCR(gpio) = ~saved_gplr[i]; - - GRER(gpio) = saved_grer[i]; - GFER(gpio) = saved_gfer[i]; - GPDR(gpio) = saved_gpdr[i]; - } - return 0; -} -#else -#define pxa_gpio_suspend NULL -#define pxa_gpio_resume NULL -#endif - -struct sysdev_class pxa_gpio_sysclass = { - .name = "gpio", - .suspend = pxa_gpio_suspend, - .resume = pxa_gpio_resume, -}; - -static int __init pxa_gpio_init(void) -{ - return sysdev_class_register(&pxa_gpio_sysclass); -} - -core_initcall(pxa_gpio_init); |