diff options
Diffstat (limited to 'arch/arm/mach-orion5x/common.c')
| -rw-r--r-- | arch/arm/mach-orion5x/common.c | 123 |
1 files changed, 87 insertions, 36 deletions
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 5dad38ec00e..6bbb7b55c6d 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -18,21 +18,22 @@ #include <linux/mv643xx_i2c.h> #include <linux/ata_platform.h> #include <linux/delay.h> +#include <linux/clk-provider.h> +#include <linux/cpu.h> #include <net/dsa.h> #include <asm/page.h> #include <asm/setup.h> -#include <asm/timex.h> +#include <asm/system_misc.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h> #include <mach/bridge-regs.h> #include <mach/hardware.h> #include <mach/orion5x.h> -#include <plat/orion_nand.h> -#include <plat/ehci-orion.h> +#include <linux/platform_data/mtd-orion_nand.h> +#include <linux/platform_data/usb-ehci-orion.h> #include <plat/time.h> #include <plat/common.h> -#include <plat/addr-map.h> #include "common.h" /***************************************************************************** @@ -40,22 +41,12 @@ ****************************************************************************/ static struct map_desc orion5x_io_desc[] __initdata = { { - .virtual = ORION5X_REGS_VIRT_BASE, + .virtual = (unsigned long) ORION5X_REGS_VIRT_BASE, .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE), .length = ORION5X_REGS_SIZE, .type = MT_DEVICE, }, { - .virtual = ORION5X_PCIE_IO_VIRT_BASE, - .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE), - .length = ORION5X_PCIE_IO_SIZE, - .type = MT_DEVICE, - }, { - .virtual = ORION5X_PCI_IO_VIRT_BASE, - .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE), - .length = ORION5X_PCI_IO_SIZE, - .type = MT_DEVICE, - }, { - .virtual = ORION5X_PCIE_WA_VIRT_BASE, + .virtual = (unsigned long) ORION5X_PCIE_WA_VIRT_BASE, .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE), .length = ORION5X_PCIE_WA_SIZE, .type = MT_DEVICE, @@ -69,6 +60,19 @@ void __init orion5x_map_io(void) /***************************************************************************** + * CLK tree + ****************************************************************************/ +static struct clk *tclk; + +void __init clk_init(void) +{ + tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT, + orion5x_tclk); + + orion_clkdev_init(tclk); +} + +/***************************************************************************** * EHCI0 ****************************************************************************/ void __init orion5x_ehci0_init(void) @@ -94,7 +98,8 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) { orion_ge00_init(eth_data, ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM, - IRQ_ORION5X_ETH_ERR, orion5x_tclk); + IRQ_ORION5X_ETH_ERR, + MV643XX_TX_CSUM_DEFAULT_LIMIT); } @@ -129,9 +134,9 @@ void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data) /***************************************************************************** * SPI ****************************************************************************/ -void __init orion5x_spi_init() +void __init orion5x_spi_init(void) { - orion_spi_init(SPI_PHYS_BASE, orion5x_tclk); + orion_spi_init(SPI_PHYS_BASE); } @@ -141,7 +146,7 @@ void __init orion5x_spi_init() void __init orion5x_uart0_init(void) { orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE, - IRQ_ORION5X_UART0, orion5x_tclk); + IRQ_ORION5X_UART0, tclk); } /***************************************************************************** @@ -150,7 +155,7 @@ void __init orion5x_uart0_init(void) void __init orion5x_uart1_init(void) { orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE, - IRQ_ORION5X_UART1, orion5x_tclk); + IRQ_ORION5X_UART1, tclk); } /***************************************************************************** @@ -168,7 +173,10 @@ void __init orion5x_xor_init(void) ****************************************************************************/ static void __init orion5x_crypto_init(void) { - orion5x_setup_sram_win(); + mvebu_mbus_add_window_by_id(ORION_MBUS_SRAM_TARGET, + ORION_MBUS_SRAM_ATTR, + ORION5X_SRAM_PHYS_BASE, + ORION5X_SRAM_SIZE); orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE, SZ_8K, IRQ_ORION5X_CESA); } @@ -176,9 +184,9 @@ static void __init orion5x_crypto_init(void) /***************************************************************************** * Watchdog ****************************************************************************/ -void __init orion5x_wdt_init(void) +static void __init orion5x_wdt_init(void) { - orion_wdt_init(orion5x_tclk); + orion_wdt_init(); } @@ -187,12 +195,57 @@ void __init orion5x_wdt_init(void) ****************************************************************************/ void __init orion5x_init_early(void) { + u32 rev, dev; + const char *mbus_soc_name; + orion_time_set_base(TIMER_VIRT_BASE); + + /* Initialize the MBUS driver */ + orion5x_pcie_id(&dev, &rev); + if (dev == MV88F5281_DEV_ID) + mbus_soc_name = "marvell,orion5x-88f5281-mbus"; + else if (dev == MV88F5182_DEV_ID) + mbus_soc_name = "marvell,orion5x-88f5182-mbus"; + else if (dev == MV88F5181_DEV_ID) + mbus_soc_name = "marvell,orion5x-88f5181-mbus"; + else if (dev == MV88F6183_DEV_ID) + mbus_soc_name = "marvell,orion5x-88f6183-mbus"; + else + mbus_soc_name = NULL; + mvebu_mbus_init(mbus_soc_name, ORION5X_BRIDGE_WINS_BASE, + ORION5X_BRIDGE_WINS_SZ, + ORION5X_DDR_WINS_BASE, ORION5X_DDR_WINS_SZ); +} + +void orion5x_setup_wins(void) +{ + /* + * The PCIe windows will no longer be statically allocated + * here once Orion5x is migrated to the pci-mvebu driver. + */ + mvebu_mbus_add_window_remap_by_id(ORION_MBUS_PCIE_IO_TARGET, + ORION_MBUS_PCIE_IO_ATTR, + ORION5X_PCIE_IO_PHYS_BASE, + ORION5X_PCIE_IO_SIZE, + ORION5X_PCIE_IO_BUS_BASE); + mvebu_mbus_add_window_by_id(ORION_MBUS_PCIE_MEM_TARGET, + ORION_MBUS_PCIE_MEM_ATTR, + ORION5X_PCIE_MEM_PHYS_BASE, + ORION5X_PCIE_MEM_SIZE); + mvebu_mbus_add_window_remap_by_id(ORION_MBUS_PCI_IO_TARGET, + ORION_MBUS_PCI_IO_ATTR, + ORION5X_PCI_IO_PHYS_BASE, + ORION5X_PCI_IO_SIZE, + ORION5X_PCI_IO_BUS_BASE); + mvebu_mbus_add_window_by_id(ORION_MBUS_PCI_MEM_TARGET, + ORION_MBUS_PCI_MEM_ATTR, + ORION5X_PCI_MEM_PHYS_BASE, + ORION5X_PCI_MEM_SIZE); } int orion5x_tclk; -int __init orion5x_find_tclk(void) +static int __init orion5x_find_tclk(void) { u32 dev, rev; @@ -204,7 +257,7 @@ int __init orion5x_find_tclk(void) return 166666667; } -static void orion5x_timer_init(void) +void __init orion5x_timer_init(void) { orion5x_tclk = orion5x_find_tclk(); @@ -212,10 +265,6 @@ static void orion5x_timer_init(void) IRQ_ORION5X_BRIDGE, orion5x_tclk); } -struct sys_timer orion5x_timer = { - .init = orion5x_timer_init, -}; - /***************************************************************************** * General @@ -223,7 +272,7 @@ struct sys_timer orion5x_timer = { /* * Identify device ID and rev from PCIe configuration header space '0'. */ -static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) +void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) { orion5x_pcie_id(dev, rev); @@ -273,7 +322,10 @@ void __init orion5x_init(void) /* * Setup Orion address map */ - orion5x_setup_cpu_mbus_bridge(); + orion5x_setup_wins(); + + /* Setup root of clk tree */ + clk_init(); /* * Don't issue "Wait for Interrupt" instruction if we are @@ -281,7 +333,7 @@ void __init orion5x_init(void) */ if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) { printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n"); - disable_hlt(); + cpu_idle_poll_ctrl(true); } /* @@ -298,7 +350,7 @@ void __init orion5x_init(void) orion5x_wdt_init(); } -void orion5x_restart(char mode, const char *cmd) +void orion5x_restart(enum reboot_mode mode, const char *cmd) { /* * Enable and issue soft reset @@ -313,8 +365,7 @@ void orion5x_restart(char mode, const char *cmd) * Many orion-based systems have buggy bootloader implementations. * This is a common fixup for bogus memory tags. */ -void __init tag_fixup_mem32(struct tag *t, char **from, - struct meminfo *meminfo) +void __init tag_fixup_mem32(struct tag *t, char **from) { for (; t->hdr.size; t = tag_next(t)) if (t->hdr.tag == ATAG_MEM && |