diff options
Diffstat (limited to 'arch/arm/mach-omap1/serial.c')
| -rw-r--r-- | arch/arm/mach-omap1/serial.c | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 6e5207c81cf..d1ac08016f0 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -7,7 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - +#include <linux/gpio.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -22,10 +22,9 @@ #include <asm/mach-types.h> -#include <plat/board.h> -#include <plat/mux.h> -#include <mach/gpio.h> -#include <plat/fpga.h> +#include <mach/mux.h> + +#include "pm.h" static struct clk * uart1_ck; static struct clk * uart2_ck; @@ -52,9 +51,11 @@ static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset, */ static void __init omap_serial_reset(struct plat_serial8250_port *p) { - omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */ + omap_serial_outp(p, UART_OMAP_MDR1, + UART_OMAP_MDR1_DISABLE); /* disable UART */ omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ - omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ + omap_serial_outp(p, UART_OMAP_MDR1, + UART_OMAP_MDR1_16X_MODE); /* enable UART */ if (!cpu_is_omap15xx()) { omap_serial_outp(p, UART_OMAP_SYSC, 0x01); @@ -64,7 +65,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) static struct plat_serial8250_port serial_platform_data[] = { { - .mapbase = OMAP_UART1_BASE, + .mapbase = OMAP1_UART1_BASE, .irq = INT_UART1, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -72,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .mapbase = OMAP_UART2_BASE, + .mapbase = OMAP1_UART2_BASE, .irq = INT_UART2, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -80,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .mapbase = OMAP_UART3_BASE, + .mapbase = OMAP1_UART3_BASE, .irq = INT_UART3, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -122,6 +123,13 @@ void __init omap_serial_init(void) for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) { + /* Don't look at UARTs higher than 2 for omap7xx */ + if (cpu_is_omap7xx() && i > 1) { + serial_platform_data[i].membase = NULL; + serial_platform_data[i].mapbase = 0; + continue; + } + /* Static mapping, never released */ serial_platform_data[i].membase = ioremap(serial_platform_data[i].mapbase, SZ_2K); @@ -227,7 +235,7 @@ static void __init omap_serial_set_port_wakeup(int gpio_nr) enable_irq_wake(gpio_to_irq(gpio_nr)); } -static int __init omap_serial_wakeup_init(void) +int __init omap_serial_wakeup_init(void) { if (!cpu_is_omap16xx()) return 0; @@ -241,12 +249,14 @@ static int __init omap_serial_wakeup_init(void) return 0; } -late_initcall(omap_serial_wakeup_init); #endif /* CONFIG_OMAP_SERIAL_WAKE */ static int __init omap_init(void) { + if (!cpu_class_is_omap1()) + return -ENODEV; + return platform_device_register(&serial_device); } arch_initcall(omap_init); |