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Diffstat (limited to 'arch/arm/mach-mvebu/headsmp.S')
-rw-r--r--arch/arm/mach-mvebu/headsmp.S17
1 files changed, 4 insertions, 13 deletions
diff --git a/arch/arm/mach-mvebu/headsmp.S b/arch/arm/mach-mvebu/headsmp.S
index a06e0ede8c0..2c4032e368b 100644
--- a/arch/arm/mach-mvebu/headsmp.S
+++ b/arch/arm/mach-mvebu/headsmp.S
@@ -21,13 +21,7 @@
#include <linux/linkage.h>
#include <linux/init.h>
-/*
- * At this stage the secondary CPUs don't have acces yet to the MMU, so
- * we have to provide physical addresses
- */
-#define ARMADA_XP_CFB_BASE 0xD0020200
-
- __CPUINIT
+#include <asm/assembler.h>
/*
* Armada XP specific entry point for secondary CPUs.
@@ -35,15 +29,12 @@
* startup
*/
ENTRY(armada_xp_secondary_startup)
+ ARM_BE8(setend be ) @ go BE8 if entered LE
- /* Read CPU id */
- mrc p15, 0, r1, c0, c0, 5
- and r1, r1, #0xF
+ bl ll_add_cpu_to_smp_group
- /* Add CPU to coherency fabric */
- ldr r0, =ARMADA_XP_CFB_BASE
+ bl ll_enable_coherency
- bl ll_set_cpu_coherent
b secondary_startup
ENDPROC(armada_xp_secondary_startup)