diff options
Diffstat (limited to 'arch/arm/mach-mmp/pxa910.c')
| -rw-r--r-- | arch/arm/mach-mmp/pxa910.c | 119 | 
1 files changed, 65 insertions, 54 deletions
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c index 46f2d69bef3..eb57ee19684 100644 --- a/arch/arm/mach-mmp/pxa910.c +++ b/arch/arm/mach-mmp/pxa910.c @@ -7,26 +7,28 @@   * it under the terms of the GNU General Public License version 2 as   * published by the Free Software Foundation.   */ -  #include <linux/module.h>  #include <linux/kernel.h>  #include <linux/init.h>  #include <linux/list.h>  #include <linux/io.h> +#include <linux/irq.h> +#include <linux/irqchip/mmp.h> +#include <linux/platform_device.h> +#include <asm/hardware/cache-tauros2.h>  #include <asm/mach/time.h>  #include <mach/addr-map.h>  #include <mach/regs-apbc.h> -#include <mach/regs-apmu.h>  #include <mach/cputype.h>  #include <mach/irqs.h> -#include <mach/gpio.h>  #include <mach/dma.h>  #include <mach/mfp.h>  #include <mach/devices.h> +#include <mach/pm-pxa910.h> +#include <mach/pxa910.h>  #include "common.h" -#include "clock.h"  #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000) @@ -78,60 +80,24 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =  	MFP_ADDR_END,  }; -#define APMASK(i)	(GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c) - -static void __init pxa910_init_gpio(void) -{ -	int i; - -	/* enable GPIO clock */ -	__raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO); - -	/* unmask GPIO edge detection for all 4 banks - APMASKx */ -	for (i = 0; i < 4; i++) -		__raw_writel(0xffffffff, APMASK(i)); - -	pxa_init_gpio(IRQ_PXA910_AP_GPIO, 0, 127, NULL); -} -  void __init pxa910_init_irq(void)  {  	icu_init_irq(); -	pxa910_init_gpio(); +#ifdef CONFIG_PM +	icu_irq_chip.irq_set_wake = pxa910_set_wake; +#endif  } -/* APB peripheral clocks */ -static APBC_CLK(uart1, PXA910_UART0, 1, 14745600); -static APBC_CLK(uart2, PXA910_UART1, 1, 14745600); -static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000); -static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000); -static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000); -static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); -static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); -static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); - -static APMU_CLK(nand, NAND, 0x01db, 208000000); - -/* device and clock bindings */ -static struct clk_lookup pxa910_clkregs[] = { -	INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), -	INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), -	INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), -	INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), -	INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL), -	INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL), -	INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), -	INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), -	INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), -}; -  static int __init pxa910_init(void)  {  	if (cpu_is_pxa910()) { +#ifdef CONFIG_CACHE_TAUROS2 +		tauros2_init(0); +#endif  		mfp_init_base(MFPR_VIRT_BASE);  		mfp_init_addr(pxa910_mfp_addr_map);  		pxa_init_dma(IRQ_PXA910_DMA_INT0, 32); -		clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs)); +		pxa910_clk_init();  	}  	return 0; @@ -140,20 +106,17 @@ postcore_initcall(pxa910_init);  /* system timer - clock enabled, 3.25MHz */  #define TIMER_CLK_RST	(APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) +#define APBC_TIMERS	APBC_REG(0x34) -static void __init pxa910_timer_init(void) +void __init pxa910_timer_init(void)  {  	/* reset and configure */ -	__raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA910_TIMERS); -	__raw_writel(TIMER_CLK_RST, APBC_PXA910_TIMERS); +	__raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); +	__raw_writel(TIMER_CLK_RST, APBC_TIMERS);  	timer_init(IRQ_PXA910_AP1_TIMER1);  } -struct sys_timer pxa910_timer = { -	.init	= pxa910_timer_init, -}; -  /* on-chip devices */  /* NOTE: there are totally 3 UARTs on PXA910: @@ -178,3 +141,51 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);  PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);  PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);  PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); +PXA910_DEVICE(disp, "mmp-disp", 0, LCD, 0xd420b000, 0x1ec); +PXA910_DEVICE(fb, "mmp-fb", -1, NONE, 0, 0); +PXA910_DEVICE(panel, "tpo-hvga", -1, NONE, 0, 0); + +struct resource pxa910_resource_gpio[] = { +	{ +		.start	= 0xd4019000, +		.end	= 0xd4019fff, +		.flags	= IORESOURCE_MEM, +	}, { +		.start	= IRQ_PXA910_AP_GPIO, +		.end	= IRQ_PXA910_AP_GPIO, +		.name	= "gpio_mux", +		.flags	= IORESOURCE_IRQ, +	}, +}; + +struct platform_device pxa910_device_gpio = { +	.name		= "mmp-gpio", +	.id		= -1, +	.num_resources	= ARRAY_SIZE(pxa910_resource_gpio), +	.resource	= pxa910_resource_gpio, +}; + +static struct resource pxa910_resource_rtc[] = { +	{ +		.start	= 0xd4010000, +		.end	= 0xd401003f, +		.flags	= IORESOURCE_MEM, +	}, { +		.start	= IRQ_PXA910_RTC_INT, +		.end	= IRQ_PXA910_RTC_INT, +		.name	= "rtc 1Hz", +		.flags	= IORESOURCE_IRQ, +	}, { +		.start	= IRQ_PXA910_RTC_ALARM, +		.end	= IRQ_PXA910_RTC_ALARM, +		.name	= "rtc alarm", +		.flags	= IORESOURCE_IRQ, +	}, +}; + +struct platform_device pxa910_device_rtc = { +	.name		= "sa1100-rtc", +	.id		= -1, +	.num_resources	= ARRAY_SIZE(pxa910_resource_rtc), +	.resource	= pxa910_resource_rtc, +};  | 
