diff options
Diffstat (limited to 'arch/arm/mach-mmp/include')
26 files changed, 761 insertions, 498 deletions
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h index 3254089a644..f88a44c0ef9 100644 --- a/arch/arm/mach-mmp/include/mach/addr-map.h +++ b/arch/arm/mach-mmp/include/mach/addr-map.h @@ -18,11 +18,11 @@ * peripherals on APB, let's count it into the ABP mapping area. */ #define APB_PHYS_BASE 0xd4000000 -#define APB_VIRT_BASE 0xfe000000 +#define APB_VIRT_BASE IOMEM(0xfe000000) #define APB_PHYS_SIZE 0x00200000 #define AXI_PHYS_BASE 0xd4200000 -#define AXI_VIRT_BASE 0xfe200000 +#define AXI_VIRT_BASE IOMEM(0xfe200000) #define AXI_PHYS_SIZE 0x00200000 /* Static Memory Controller - Chip Select 0 and 1 */ @@ -31,4 +31,16 @@ #define SMC_CS1_PHYS_BASE 0x90000000 #define SMC_CS1_PHYS_SIZE 0x10000000 +#define APMU_VIRT_BASE (AXI_VIRT_BASE + 0x82800) +#define APMU_REG(x) (APMU_VIRT_BASE + (x)) + +#define APBC_VIRT_BASE (APB_VIRT_BASE + 0x015000) +#define APBC_REG(x) (APBC_VIRT_BASE + (x)) + +#define MPMU_VIRT_BASE (APB_VIRT_BASE + 0x50000) +#define MPMU_REG(x) (MPMU_VIRT_BASE + (x)) + +#define CIU_VIRT_BASE (AXI_VIRT_BASE + 0x82c00) +#define CIU_REG(x) (CIU_VIRT_BASE + (x)) + #endif /* __ASM_MACH_ADDR_MAP_H */ diff --git a/arch/arm/mach-mmp/include/mach/clkdev.h b/arch/arm/mach-mmp/include/mach/clkdev.h deleted file mode 100644 index 2fb354e54e0..00000000000 --- a/arch/arm/mach-mmp/include/mach/clkdev.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_MACH_CLKDEV_H -#define __ASM_MACH_CLKDEV_H - -#define __clk_get(clk) ({ 1; }) -#define __clk_put(clk) do { } while (0) - -#endif /* __ASM_MACH_CLKDEV_H */ diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h index f43a68b213f..8a3b56dfd35 100644 --- a/arch/arm/mach-mmp/include/mach/cputype.h +++ b/arch/arm/mach-mmp/include/mach/cputype.h @@ -46,7 +46,8 @@ static inline int cpu_is_pxa910(void) #ifdef CONFIG_CPU_MMP2 static inline int cpu_is_mmp2(void) { - return (((cpu_readid_id() >> 8) & 0xff) == 0x58); + return (((read_cpuid_id() >> 8) & 0xff) == 0x58); +} #else #define cpu_is_mmp2() (0) #endif diff --git a/arch/arm/mach-mmp/include/mach/debug-macro.S b/arch/arm/mach-mmp/include/mach/debug-macro.S deleted file mode 100644 index 7e2ebd3efc7..00000000000 --- a/arch/arm/mach-mmp/include/mach/debug-macro.S +++ /dev/null @@ -1,22 +0,0 @@ -/* arch/arm/mach-mmp/include/mach/debug-macro.S - * - * Debugging macro include header - * - * Copied from arch/arm/mach-pxa/include/mach/debug.S - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <mach/addr-map.h> - - .macro addruart, rp, rv - ldr \rp, =APB_PHYS_BASE @ physical - ldr \rv, =APB_VIRT_BASE @ virtual - orr \rp, \rp, #0x00017000 - orr \rv, \rv, #0x00017000 - .endm - -#define UART_SHIFT 2 -#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h index d0ec7dae88e..21217ef11b6 100644 --- a/arch/arm/mach-mmp/include/mach/devices.h +++ b/arch/arm/mach-mmp/include/mach/devices.h @@ -50,4 +50,7 @@ struct pxa_device_desc mmp2_device_##_name __initdata = { \ } extern int pxa_register_device(struct pxa_device_desc *, void *, size_t); +extern int pxa_usb_phy_init(void __iomem *phy_reg); +extern void pxa_usb_phy_deinit(void __iomem *phy_reg); + #endif /* __MACH_DEVICE_H */ diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S deleted file mode 100644 index c42d9d4e892..00000000000 --- a/arch/arm/mach-mmp/include/mach/entry-macro.S +++ /dev/null @@ -1,30 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/entry-macro.S - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <mach/regs-icu.h> - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_preamble, base, tmp - mrc p15, 0, \tmp, c0, c0, 0 @ CPUID - and \tmp, \tmp, #0xff00 - cmp \tmp, #0x5800 - ldr \base, =ICU_VIRT_BASE - addne \base, \base, #0x10c @ PJ1 AP INT SEL register - addeq \base, \base, #0x104 @ PJ4 IRQ SEL register - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \tmp, [\base, #0] - and \irqnr, \tmp, #0x3f - tst \tmp, #(1 << 6) - .endm diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h deleted file mode 100644 index ee8b02ed801..00000000000 --- a/arch/arm/mach-mmp/include/mach/gpio.h +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef __ASM_MACH_GPIO_H -#define __ASM_MACH_GPIO_H - -#include <mach/addr-map.h> -#include <mach/irqs.h> -#include <asm-generic/gpio.h> - -#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) - -#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) -#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x)))) - -#define NR_BUILTIN_GPIO (192) - -#define gpio_to_bank(gpio) ((gpio) >> 5) -#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) -#define irq_to_gpio(irq) ((irq) - IRQ_GPIO_START) - - -#define __gpio_is_inverted(gpio) (0) -#define __gpio_is_occupied(gpio) (0) - -/* NOTE: these macros are defined here to make optimization of - * gpio_{get,set}_value() to work when 'gpio' is a constant. - * Usage of these macros otherwise is no longer recommended, - * use generic GPIO API whenever possible. - */ -#define GPIO_bit(gpio) (1 << ((gpio) & 0x1f)) - -#define GPLR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00) -#define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c) -#define GPSR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18) -#define GPCR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24) - -#include <plat/gpio.h> -#endif /* __ASM_MACH_GPIO_H */ diff --git a/arch/arm/mach-mmp/include/mach/io.h b/arch/arm/mach-mmp/include/mach/io.h deleted file mode 100644 index e7adf3d012c..00000000000 --- a/arch/arm/mach-mmp/include/mach/io.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/io.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_IO_H -#define __ASM_MACH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif /* __ASM_MACH_IO_H */ diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h index a09d328e2dd..fb492a50a81 100644 --- a/arch/arm/mach-mmp/include/mach/irqs.h +++ b/arch/arm/mach-mmp/include/mach/irqs.h @@ -125,7 +125,7 @@ #define IRQ_MMP2_RTC_MUX 5 #define IRQ_MMP2_TWSI1 7 #define IRQ_MMP2_GPU 8 -#define IRQ_MMP2_KEYPAD 9 +#define IRQ_MMP2_KEYPAD_MUX 9 #define IRQ_MMP2_ROTARY 10 #define IRQ_MMP2_TRACKBALL 11 #define IRQ_MMP2_ONEWIRE 12 @@ -163,11 +163,11 @@ #define IRQ_MMP2_DMA_FIQ 47 #define IRQ_MMP2_DMA_RIQ 48 #define IRQ_MMP2_GPIO 49 -#define IRQ_MMP2_SSP_MUX 51 +#define IRQ_MMP2_MIPI_HSI1_MUX 51 #define IRQ_MMP2_MMC2 52 #define IRQ_MMP2_MMC3 53 #define IRQ_MMP2_MMC4 54 -#define IRQ_MMP2_MIPI_HSI 55 +#define IRQ_MMP2_MIPI_HSI0_MUX 55 #define IRQ_MMP2_MSP 58 #define IRQ_MMP2_MIPI_SLIM_DMA 59 #define IRQ_MMP2_PJ4_FREQ_CHG 60 @@ -186,8 +186,14 @@ #define IRQ_MMP2_RTC_ALARM (IRQ_MMP2_RTC_BASE + 0) #define IRQ_MMP2_RTC (IRQ_MMP2_RTC_BASE + 1) +/* secondary interrupt of INT #9 */ +#define IRQ_MMP2_KEYPAD_BASE (IRQ_MMP2_RTC_BASE + 2) +#define IRQ_MMP2_KPC (IRQ_MMP2_KEYPAD_BASE + 0) +#define IRQ_MMP2_ROTORY (IRQ_MMP2_KEYPAD_BASE + 1) +#define IRQ_MMP2_TBALL (IRQ_MMP2_KEYPAD_BASE + 2) + /* secondary interrupt of INT #17 */ -#define IRQ_MMP2_TWSI_BASE (IRQ_MMP2_RTC_BASE + 2) +#define IRQ_MMP2_TWSI_BASE (IRQ_MMP2_KEYPAD_BASE + 3) #define IRQ_MMP2_TWSI2 (IRQ_MMP2_TWSI_BASE + 0) #define IRQ_MMP2_TWSI3 (IRQ_MMP2_TWSI_BASE + 1) #define IRQ_MMP2_TWSI4 (IRQ_MMP2_TWSI_BASE + 2) @@ -212,18 +218,22 @@ #define IRQ_MMP2_COMMRX (IRQ_MMP2_MISC_BASE + 14) /* secondary interrupt of INT #51 */ -#define IRQ_MMP2_SSP_BASE (IRQ_MMP2_MISC_BASE + 15) -#define IRQ_MMP2_SSP1_SRDY (IRQ_MMP2_SSP_BASE + 0) -#define IRQ_MMP2_SSP3_SRDY (IRQ_MMP2_SSP_BASE + 1) +#define IRQ_MMP2_MIPI_HSI1_BASE (IRQ_MMP2_MISC_BASE + 15) +#define IRQ_MMP2_HSI1_CAWAKE (IRQ_MMP2_MIPI_HSI1_BASE + 0) +#define IRQ_MMP2_MIPI_HSI_INT1 (IRQ_MMP2_MIPI_HSI1_BASE + 1) -#define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2) +/* secondary interrupt of INT #55 */ +#define IRQ_MMP2_MIPI_HSI0_BASE (IRQ_MMP2_MIPI_HSI1_BASE + 2) +#define IRQ_MMP2_HSI0_CAWAKE (IRQ_MMP2_MIPI_HSI0_BASE + 0) +#define IRQ_MMP2_MIPI_HSI_INT0 (IRQ_MMP2_MIPI_HSI0_BASE + 1) -#define IRQ_GPIO_START 128 -#define IRQ_GPIO_NUM 192 -#define IRQ_GPIO(x) (IRQ_GPIO_START + (x)) +#define IRQ_MMP2_MUX_END (IRQ_MMP2_MIPI_HSI0_BASE + 2) -#define IRQ_BOARD_START (IRQ_GPIO_START + IRQ_GPIO_NUM) +#define IRQ_GPIO_START 128 +#define MMP_NR_BUILTIN_GPIO 192 +#define MMP_GPIO_TO_IRQ(gpio) (IRQ_GPIO_START + (gpio)) -#define NR_IRQS (IRQ_BOARD_START) +#define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO) +#define MMP_NR_IRQS IRQ_BOARD_START #endif /* __ASM_MACH_IRQS_H */ diff --git a/arch/arm/mach-mmp/include/mach/memory.h b/arch/arm/mach-mmp/include/mach/memory.h deleted file mode 100644 index bdb21d70714..00000000000 --- a/arch/arm/mach-mmp/include/mach/memory.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/memory.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_MEMORY_H -#define __ASM_MACH_MEMORY_H - -#define PHYS_OFFSET UL(0x00000000) - -#endif /* __ASM_MACH_MEMORY_H */ diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h index 761c2dacc07..4ad38629c3f 100644 --- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h +++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h @@ -6,178 +6,178 @@ #define MFP_DRIVE_VERY_SLOW (0x0 << 13) #define MFP_DRIVE_SLOW (0x2 << 13) #define MFP_DRIVE_MEDIUM (0x4 << 13) -#define MFP_DRIVE_FAST (0x8 << 13) +#define MFP_DRIVE_FAST (0x6 << 13) /* GPIO */ -#define GPIO0_GPIO0 MFP_CFG(GPIO0, AF0) -#define GPIO1_GPIO1 MFP_CFG(GPIO1, AF0) -#define GPIO2_GPIO2 MFP_CFG(GPIO2, AF0) -#define GPIO3_GPIO3 MFP_CFG(GPIO3, AF0) -#define GPIO4_GPIO4 MFP_CFG(GPIO4, AF0) -#define GPIO5_GPIO5 MFP_CFG(GPIO5, AF0) -#define GPIO6_GPIO6 MFP_CFG(GPIO6, AF0) -#define GPIO7_GPIO7 MFP_CFG(GPIO7, AF0) -#define GPIO8_GPIO8 MFP_CFG(GPIO8, AF0) -#define GPIO9_GPIO9 MFP_CFG(GPIO9, AF0) -#define GPIO10_GPIO10 MFP_CFG(GPIO10, AF0) -#define GPIO11_GPIO11 MFP_CFG(GPIO11, AF0) -#define GPIO12_GPIO12 MFP_CFG(GPIO12, AF0) -#define GPIO13_GPIO13 MFP_CFG(GPIO13, AF0) -#define GPIO14_GPIO14 MFP_CFG(GPIO14, AF0) -#define GPIO15_GPIO15 MFP_CFG(GPIO15, AF0) -#define GPIO16_GPIO16 MFP_CFG(GPIO16, AF0) -#define GPIO17_GPIO17 MFP_CFG(GPIO17, AF0) -#define GPIO18_GPIO18 MFP_CFG(GPIO18, AF0) -#define GPIO19_GPIO19 MFP_CFG(GPIO19, AF0) -#define GPIO20_GPIO20 MFP_CFG(GPIO20, AF0) -#define GPIO21_GPIO21 MFP_CFG(GPIO21, AF0) -#define GPIO22_GPIO22 MFP_CFG(GPIO22, AF0) -#define GPIO23_GPIO23 MFP_CFG(GPIO23, AF0) -#define GPIO24_GPIO24 MFP_CFG(GPIO24, AF0) -#define GPIO25_GPIO25 MFP_CFG(GPIO25, AF0) -#define GPIO26_GPIO26 MFP_CFG(GPIO26, AF0) -#define GPIO27_GPIO27 MFP_CFG(GPIO27, AF0) -#define GPIO28_GPIO28 MFP_CFG(GPIO28, AF0) -#define GPIO29_GPIO29 MFP_CFG(GPIO29, AF0) -#define GPIO30_GPIO30 MFP_CFG(GPIO30, AF0) -#define GPIO31_GPIO31 MFP_CFG(GPIO31, AF0) -#define GPIO32_GPIO32 MFP_CFG(GPIO32, AF0) -#define GPIO33_GPIO33 MFP_CFG(GPIO33, AF0) -#define GPIO34_GPIO34 MFP_CFG(GPIO34, AF0) -#define GPIO35_GPIO35 MFP_CFG(GPIO35, AF0) -#define GPIO36_GPIO36 MFP_CFG(GPIO36, AF0) -#define GPIO37_GPIO37 MFP_CFG(GPIO37, AF0) -#define GPIO38_GPIO38 MFP_CFG(GPIO38, AF0) -#define GPIO39_GPIO39 MFP_CFG(GPIO39, AF0) -#define GPIO40_GPIO40 MFP_CFG(GPIO40, AF0) -#define GPIO41_GPIO41 MFP_CFG(GPIO41, AF0) -#define GPIO42_GPIO42 MFP_CFG(GPIO42, AF0) -#define GPIO43_GPIO43 MFP_CFG(GPIO43, AF0) -#define GPIO44_GPIO44 MFP_CFG(GPIO44, AF0) -#define GPIO45_GPIO45 MFP_CFG(GPIO45, AF0) -#define GPIO46_GPIO46 MFP_CFG(GPIO46, AF0) -#define GPIO47_GPIO47 MFP_CFG(GPIO47, AF0) -#define GPIO48_GPIO48 MFP_CFG(GPIO48, AF0) -#define GPIO49_GPIO49 MFP_CFG(GPIO49, AF0) -#define GPIO50_GPIO50 MFP_CFG(GPIO50, AF0) -#define GPIO51_GPIO51 MFP_CFG(GPIO51, AF0) -#define GPIO52_GPIO52 MFP_CFG(GPIO52, AF0) -#define GPIO53_GPIO53 MFP_CFG(GPIO53, AF0) -#define GPIO54_GPIO54 MFP_CFG(GPIO54, AF0) -#define GPIO55_GPIO55 MFP_CFG(GPIO55, AF0) -#define GPIO56_GPIO56 MFP_CFG(GPIO56, AF0) -#define GPIO57_GPIO57 MFP_CFG(GPIO57, AF0) -#define GPIO58_GPIO58 MFP_CFG(GPIO58, AF0) -#define GPIO59_GPIO59 MFP_CFG(GPIO59, AF0) -#define GPIO60_GPIO60 MFP_CFG(GPIO60, AF0) -#define GPIO61_GPIO61 MFP_CFG(GPIO61, AF0) -#define GPIO62_GPIO62 MFP_CFG(GPIO62, AF0) -#define GPIO63_GPIO63 MFP_CFG(GPIO63, AF0) -#define GPIO64_GPIO64 MFP_CFG(GPIO64, AF0) -#define GPIO65_GPIO65 MFP_CFG(GPIO65, AF0) -#define GPIO66_GPIO66 MFP_CFG(GPIO66, AF0) -#define GPIO67_GPIO67 MFP_CFG(GPIO67, AF0) -#define GPIO68_GPIO68 MFP_CFG(GPIO68, AF0) -#define GPIO69_GPIO69 MFP_CFG(GPIO69, AF0) -#define GPIO70_GPIO70 MFP_CFG(GPIO70, AF0) -#define GPIO71_GPIO71 MFP_CFG(GPIO71, AF0) -#define GPIO72_GPIO72 MFP_CFG(GPIO72, AF0) -#define GPIO73_GPIO73 MFP_CFG(GPIO73, AF0) -#define GPIO74_GPIO74 MFP_CFG(GPIO74, AF0) -#define GPIO75_GPIO75 MFP_CFG(GPIO75, AF0) -#define GPIO76_GPIO76 MFP_CFG(GPIO76, AF0) -#define GPIO77_GPIO77 MFP_CFG(GPIO77, AF0) -#define GPIO78_GPIO78 MFP_CFG(GPIO78, AF0) -#define GPIO79_GPIO79 MFP_CFG(GPIO79, AF0) -#define GPIO80_GPIO80 MFP_CFG(GPIO80, AF0) -#define GPIO81_GPIO81 MFP_CFG(GPIO81, AF0) -#define GPIO82_GPIO82 MFP_CFG(GPIO82, AF0) -#define GPIO83_GPIO83 MFP_CFG(GPIO83, AF0) -#define GPIO84_GPIO84 MFP_CFG(GPIO84, AF0) -#define GPIO85_GPIO85 MFP_CFG(GPIO85, AF0) -#define GPIO86_GPIO86 MFP_CFG(GPIO86, AF0) -#define GPIO87_GPIO87 MFP_CFG(GPIO87, AF0) -#define GPIO88_GPIO88 MFP_CFG(GPIO88, AF0) -#define GPIO89_GPIO89 MFP_CFG(GPIO89, AF0) -#define GPIO90_GPIO90 MFP_CFG(GPIO90, AF0) -#define GPIO91_GPIO91 MFP_CFG(GPIO91, AF0) -#define GPIO92_GPIO92 MFP_CFG(GPIO92, AF0) -#define GPIO93_GPIO93 MFP_CFG(GPIO93, AF0) -#define GPIO94_GPIO94 MFP_CFG(GPIO94, AF0) -#define GPIO95_GPIO95 MFP_CFG(GPIO95, AF0) -#define GPIO96_GPIO96 MFP_CFG(GPIO96, AF0) -#define GPIO97_GPIO97 MFP_CFG(GPIO97, AF0) -#define GPIO98_GPIO98 MFP_CFG(GPIO98, AF0) -#define GPIO99_GPIO99 MFP_CFG(GPIO99, AF0) -#define GPIO100_GPIO100 MFP_CFG(GPIO100, AF0) -#define GPIO101_GPIO101 MFP_CFG(GPIO101, AF0) -#define GPIO102_GPIO102 MFP_CFG(GPIO102, AF1) -#define GPIO103_GPIO103 MFP_CFG(GPIO103, AF1) -#define GPIO104_GPIO104 MFP_CFG(GPIO104, AF1) -#define GPIO105_GPIO105 MFP_CFG(GPIO105, AF1) -#define GPIO106_GPIO106 MFP_CFG(GPIO106, AF1) -#define GPIO107_GPIO107 MFP_CFG(GPIO107, AF1) -#define GPIO108_GPIO108 MFP_CFG(GPIO108, AF1) -#define GPIO109_GPIO109 MFP_CFG(GPIO109, AF1) -#define GPIO110_GPIO110 MFP_CFG(GPIO110, AF1) -#define GPIO111_GPIO111 MFP_CFG(GPIO111, AF1) -#define GPIO112_GPIO112 MFP_CFG(GPIO112, AF1) -#define GPIO113_GPIO113 MFP_CFG(GPIO113, AF1) -#define GPIO114_GPIO114 MFP_CFG(GPIO114, AF0) -#define GPIO115_GPIO115 MFP_CFG(GPIO115, AF0) -#define GPIO116_GPIO116 MFP_CFG(GPIO116, AF0) -#define GPIO117_GPIO117 MFP_CFG(GPIO117, AF0) -#define GPIO118_GPIO118 MFP_CFG(GPIO118, AF0) -#define GPIO119_GPIO119 MFP_CFG(GPIO119, AF0) -#define GPIO120_GPIO120 MFP_CFG(GPIO120, AF0) -#define GPIO121_GPIO121 MFP_CFG(GPIO121, AF0) -#define GPIO122_GPIO122 MFP_CFG(GPIO122, AF0) -#define GPIO123_GPIO123 MFP_CFG(GPIO123, AF0) -#define GPIO124_GPIO124 MFP_CFG(GPIO124, AF0) -#define GPIO125_GPIO125 MFP_CFG(GPIO125, AF0) -#define GPIO126_GPIO126 MFP_CFG(GPIO126, AF0) -#define GPIO127_GPIO127 MFP_CFG(GPIO127, AF0) -#define GPIO128_GPIO128 MFP_CFG(GPIO128, AF0) -#define GPIO129_GPIO129 MFP_CFG(GPIO129, AF0) -#define GPIO130_GPIO130 MFP_CFG(GPIO130, AF0) -#define GPIO131_GPIO131 MFP_CFG(GPIO131, AF0) -#define GPIO132_GPIO132 MFP_CFG(GPIO132, AF0) -#define GPIO133_GPIO133 MFP_CFG(GPIO133, AF0) -#define GPIO134_GPIO134 MFP_CFG(GPIO134, AF0) -#define GPIO135_GPIO135 MFP_CFG(GPIO135, AF0) -#define GPIO136_GPIO136 MFP_CFG(GPIO136, AF0) -#define GPIO137_GPIO137 MFP_CFG(GPIO137, AF0) -#define GPIO138_GPIO138 MFP_CFG(GPIO138, AF0) -#define GPIO139_GPIO139 MFP_CFG(GPIO139, AF0) -#define GPIO140_GPIO140 MFP_CFG(GPIO140, AF0) -#define GPIO141_GPIO141 MFP_CFG(GPIO141, AF0) -#define GPIO142_GPIO142 MFP_CFG(GPIO142, AF1) -#define GPIO143_GPIO143 MFP_CFG(GPIO143, AF1) -#define GPIO144_GPIO144 MFP_CFG(GPIO144, AF1) -#define GPIO145_GPIO145 MFP_CFG(GPIO145, AF1) -#define GPIO146_GPIO146 MFP_CFG(GPIO146, AF1) -#define GPIO147_GPIO147 MFP_CFG(GPIO147, AF1) -#define GPIO148_GPIO148 MFP_CFG(GPIO148, AF1) -#define GPIO149_GPIO149 MFP_CFG(GPIO149, AF1) -#define GPIO150_GPIO150 MFP_CFG(GPIO150, AF1) -#define GPIO151_GPIO151 MFP_CFG(GPIO151, AF1) -#define GPIO152_GPIO152 MFP_CFG(GPIO152, AF1) -#define GPIO153_GPIO153 MFP_CFG(GPIO153, AF1) -#define GPIO154_GPIO154 MFP_CFG(GPIO154, AF1) -#define GPIO155_GPIO155 MFP_CFG(GPIO155, AF1) -#define GPIO156_GPIO156 MFP_CFG(GPIO156, AF1) -#define GPIO157_GPIO157 MFP_CFG(GPIO157, AF1) -#define GPIO158_GPIO158 MFP_CFG(GPIO158, AF1) -#define GPIO159_GPIO159 MFP_CFG(GPIO159, AF1) -#define GPIO160_GPIO160 MFP_CFG(GPIO160, AF1) -#define GPIO161_GPIO161 MFP_CFG(GPIO161, AF1) -#define GPIO162_GPIO162 MFP_CFG(GPIO162, AF1) -#define GPIO163_GPIO163 MFP_CFG(GPIO163, AF1) -#define GPIO164_GPIO164 MFP_CFG(GPIO164, AF1) -#define GPIO165_GPIO165 MFP_CFG(GPIO165, AF1) -#define GPIO166_GPIO166 MFP_CFG(GPIO166, AF1) -#define GPIO167_GPIO167 MFP_CFG(GPIO167, AF1) -#define GPIO168_GPIO168 MFP_CFG(GPIO168, AF1) +#define GPIO0_GPIO MFP_CFG(GPIO0, AF0) +#define GPIO1_GPIO MFP_CFG(GPIO1, AF0) +#define GPIO2_GPIO MFP_CFG(GPIO2, AF0) +#define GPIO3_GPIO MFP_CFG(GPIO3, AF0) +#define GPIO4_GPIO MFP_CFG(GPIO4, AF0) +#define GPIO5_GPIO MFP_CFG(GPIO5, AF0) +#define GPIO6_GPIO MFP_CFG(GPIO6, AF0) +#define GPIO7_GPIO MFP_CFG(GPIO7, AF0) +#define GPIO8_GPIO MFP_CFG(GPIO8, AF0) +#define GPIO9_GPIO MFP_CFG(GPIO9, AF0) +#define GPIO10_GPIO MFP_CFG(GPIO10, AF0) +#define GPIO11_GPIO MFP_CFG(GPIO11, AF0) +#define GPIO12_GPIO MFP_CFG(GPIO12, AF0) +#define GPIO13_GPIO MFP_CFG(GPIO13, AF0) +#define GPIO14_GPIO MFP_CFG(GPIO14, AF0) +#define GPIO15_GPIO MFP_CFG(GPIO15, AF0) +#define GPIO16_GPIO MFP_CFG(GPIO16, AF0) +#define GPIO17_GPIO MFP_CFG(GPIO17, AF0) +#define GPIO18_GPIO MFP_CFG(GPIO18, AF0) +#define GPIO19_GPIO MFP_CFG(GPIO19, AF0) +#define GPIO20_GPIO MFP_CFG(GPIO20, AF0) +#define GPIO21_GPIO MFP_CFG(GPIO21, AF0) +#define GPIO22_GPIO MFP_CFG(GPIO22, AF0) +#define GPIO23_GPIO MFP_CFG(GPIO23, AF0) +#define GPIO24_GPIO MFP_CFG(GPIO24, AF0) +#define GPIO25_GPIO MFP_CFG(GPIO25, AF0) +#define GPIO26_GPIO MFP_CFG(GPIO26, AF0) +#define GPIO27_GPIO MFP_CFG(GPIO27, AF0) +#define GPIO28_GPIO MFP_CFG(GPIO28, AF0) +#define GPIO29_GPIO MFP_CFG(GPIO29, AF0) +#define GPIO30_GPIO MFP_CFG(GPIO30, AF0) +#define GPIO31_GPIO MFP_CFG(GPIO31, AF0) +#define GPIO32_GPIO MFP_CFG(GPIO32, AF0) +#define GPIO33_GPIO MFP_CFG(GPIO33, AF0) +#define GPIO34_GPIO MFP_CFG(GPIO34, AF0) +#define GPIO35_GPIO MFP_CFG(GPIO35, AF0) +#define GPIO36_GPIO MFP_CFG(GPIO36, AF0) +#define GPIO37_GPIO MFP_CFG(GPIO37, AF0) +#define GPIO38_GPIO MFP_CFG(GPIO38, AF0) +#define GPIO39_GPIO MFP_CFG(GPIO39, AF0) +#define GPIO40_GPIO MFP_CFG(GPIO40, AF0) +#define GPIO41_GPIO MFP_CFG(GPIO41, AF0) +#define GPIO42_GPIO MFP_CFG(GPIO42, AF0) +#define GPIO43_GPIO MFP_CFG(GPIO43, AF0) +#define GPIO44_GPIO MFP_CFG(GPIO44, AF0) +#define GPIO45_GPIO MFP_CFG(GPIO45, AF0) +#define GPIO46_GPIO MFP_CFG(GPIO46, AF0) +#define GPIO47_GPIO MFP_CFG(GPIO47, AF0) +#define GPIO48_GPIO MFP_CFG(GPIO48, AF0) +#define GPIO49_GPIO MFP_CFG(GPIO49, AF0) +#define GPIO50_GPIO MFP_CFG(GPIO50, AF0) +#define GPIO51_GPIO MFP_CFG(GPIO51, AF0) +#define GPIO52_GPIO MFP_CFG(GPIO52, AF0) +#define GPIO53_GPIO MFP_CFG(GPIO53, AF0) +#define GPIO54_GPIO MFP_CFG(GPIO54, AF0) +#define GPIO55_GPIO MFP_CFG(GPIO55, AF0) +#define GPIO56_GPIO MFP_CFG(GPIO56, AF0) +#define GPIO57_GPIO MFP_CFG(GPIO57, AF0) +#define GPIO58_GPIO MFP_CFG(GPIO58, AF0) +#define GPIO59_GPIO MFP_CFG(GPIO59, AF0) +#define GPIO60_GPIO MFP_CFG(GPIO60, AF0) +#define GPIO61_GPIO MFP_CFG(GPIO61, AF0) +#define GPIO62_GPIO MFP_CFG(GPIO62, AF0) +#define GPIO63_GPIO MFP_CFG(GPIO63, AF0) +#define GPIO64_GPIO MFP_CFG(GPIO64, AF0) +#define GPIO65_GPIO MFP_CFG(GPIO65, AF0) +#define GPIO66_GPIO MFP_CFG(GPIO66, AF0) +#define GPIO67_GPIO MFP_CFG(GPIO67, AF0) +#define GPIO68_GPIO MFP_CFG(GPIO68, AF0) +#define GPIO69_GPIO MFP_CFG(GPIO69, AF0) +#define GPIO70_GPIO MFP_CFG(GPIO70, AF0) +#define GPIO71_GPIO MFP_CFG(GPIO71, AF0) +#define GPIO72_GPIO MFP_CFG(GPIO72, AF0) +#define GPIO73_GPIO MFP_CFG(GPIO73, AF0) +#define GPIO74_GPIO MFP_CFG(GPIO74, AF0) +#define GPIO75_GPIO MFP_CFG(GPIO75, AF0) +#define GPIO76_GPIO MFP_CFG(GPIO76, AF0) +#define GPIO77_GPIO MFP_CFG(GPIO77, AF0) +#define GPIO78_GPIO MFP_CFG(GPIO78, AF0) +#define GPIO79_GPIO MFP_CFG(GPIO79, AF0) +#define GPIO80_GPIO MFP_CFG(GPIO80, AF0) +#define GPIO81_GPIO MFP_CFG(GPIO81, AF0) +#define GPIO82_GPIO MFP_CFG(GPIO82, AF0) +#define GPIO83_GPIO MFP_CFG(GPIO83, AF0) +#define GPIO84_GPIO MFP_CFG(GPIO84, AF0) +#define GPIO85_GPIO MFP_CFG(GPIO85, AF0) +#define GPIO86_GPIO MFP_CFG(GPIO86, AF0) +#define GPIO87_GPIO MFP_CFG(GPIO87, AF0) +#define GPIO88_GPIO MFP_CFG(GPIO88, AF0) +#define GPIO89_GPIO MFP_CFG(GPIO89, AF0) +#define GPIO90_GPIO MFP_CFG(GPIO90, AF0) +#define GPIO91_GPIO MFP_CFG(GPIO91, AF0) +#define GPIO92_GPIO MFP_CFG(GPIO92, AF0) +#define GPIO93_GPIO MFP_CFG(GPIO93, AF0) +#define GPIO94_GPIO MFP_CFG(GPIO94, AF0) +#define GPIO95_GPIO MFP_CFG(GPIO95, AF0) +#define GPIO96_GPIO MFP_CFG(GPIO96, AF0) +#define GPIO97_GPIO MFP_CFG(GPIO97, AF0) +#define GPIO98_GPIO MFP_CFG(GPIO98, AF0) +#define GPIO99_GPIO MFP_CFG(GPIO99, AF0) +#define GPIO100_GPIO MFP_CFG(GPIO100, AF0) +#define GPIO101_GPIO MFP_CFG(GPIO101, AF0) +#define GPIO102_GPIO MFP_CFG(GPIO102, AF1) +#define GPIO103_GPIO MFP_CFG(GPIO103, AF1) +#define GPIO104_GPIO MFP_CFG(GPIO104, AF1) +#define GPIO105_GPIO MFP_CFG(GPIO105, AF1) +#define GPIO106_GPIO MFP_CFG(GPIO106, AF1) +#define GPIO107_GPIO MFP_CFG(GPIO107, AF1) +#define GPIO108_GPIO MFP_CFG(GPIO108, AF1) +#define GPIO109_GPIO MFP_CFG(GPIO109, AF1) +#define GPIO110_GPIO MFP_CFG(GPIO110, AF1) +#define GPIO111_GPIO MFP_CFG(GPIO111, AF1) +#define GPIO112_GPIO MFP_CFG(GPIO112, AF1) +#define GPIO113_GPIO MFP_CFG(GPIO113, AF1) +#define GPIO114_GPIO MFP_CFG(GPIO114, AF0) +#define GPIO115_GPIO MFP_CFG(GPIO115, AF0) +#define GPIO116_GPIO MFP_CFG(GPIO116, AF0) +#define GPIO117_GPIO MFP_CFG(GPIO117, AF0) +#define GPIO118_GPIO MFP_CFG(GPIO118, AF0) +#define GPIO119_GPIO MFP_CFG(GPIO119, AF0) +#define GPIO120_GPIO MFP_CFG(GPIO120, AF0) +#define GPIO121_GPIO MFP_CFG(GPIO121, AF0) +#define GPIO122_GPIO MFP_CFG(GPIO122, AF0) +#define GPIO123_GPIO MFP_CFG(GPIO123, AF0) +#define GPIO124_GPIO MFP_CFG(GPIO124, AF0) +#define GPIO125_GPIO MFP_CFG(GPIO125, AF0) +#define GPIO126_GPIO MFP_CFG(GPIO126, AF0) +#define GPIO127_GPIO MFP_CFG(GPIO127, AF0) +#define GPIO128_GPIO MFP_CFG(GPIO128, AF0) +#define GPIO129_GPIO MFP_CFG(GPIO129, AF0) +#define GPIO130_GPIO MFP_CFG(GPIO130, AF0) +#define GPIO131_GPIO MFP_CFG(GPIO131, AF0) +#define GPIO132_GPIO MFP_CFG(GPIO132, AF0) +#define GPIO133_GPIO MFP_CFG(GPIO133, AF0) +#define GPIO134_GPIO MFP_CFG(GPIO134, AF0) +#define GPIO135_GPIO MFP_CFG(GPIO135, AF0) +#define GPIO136_GPIO MFP_CFG(GPIO136, AF0) +#define GPIO137_GPIO MFP_CFG(GPIO137, AF0) +#define GPIO138_GPIO MFP_CFG(GPIO138, AF0) +#define GPIO139_GPIO MFP_CFG(GPIO139, AF0) +#define GPIO140_GPIO MFP_CFG(GPIO140, AF0) +#define GPIO141_GPIO MFP_CFG(GPIO141, AF0) +#define GPIO142_GPIO MFP_CFG(GPIO142, AF1) +#define GPIO143_GPIO MFP_CFG(GPIO143, AF1) +#define GPIO144_GPIO MFP_CFG(GPIO144, AF1) +#define GPIO145_GPIO MFP_CFG(GPIO145, AF1) +#define GPIO146_GPIO MFP_CFG(GPIO146, AF1) +#define GPIO147_GPIO MFP_CFG(GPIO147, AF1) +#define GPIO148_GPIO MFP_CFG(GPIO148, AF1) +#define GPIO149_GPIO MFP_CFG(GPIO149, AF1) +#define GPIO150_GPIO MFP_CFG(GPIO150, AF1) +#define GPIO151_GPIO MFP_CFG(GPIO151, AF1) +#define GPIO152_GPIO MFP_CFG(GPIO152, AF1) +#define GPIO153_GPIO MFP_CFG(GPIO153, AF1) +#define GPIO154_GPIO MFP_CFG(GPIO154, AF1) +#define GPIO155_GPIO MFP_CFG(GPIO155, AF1) +#define GPIO156_GPIO MFP_CFG(GPIO156, AF1) +#define GPIO157_GPIO MFP_CFG(GPIO157, AF1) +#define GPIO158_GPIO MFP_CFG(GPIO158, AF1) +#define GPIO159_GPIO MFP_CFG(GPIO159, AF1) +#define GPIO160_GPIO MFP_CFG(GPIO160, AF1) +#define GPIO161_GPIO MFP_CFG(GPIO161, AF1) +#define GPIO162_GPIO MFP_CFG(GPIO162, AF1) +#define GPIO163_GPIO MFP_CFG(GPIO163, AF1) +#define GPIO164_GPIO MFP_CFG(GPIO164, AF1) +#define GPIO165_GPIO MFP_CFG(GPIO165, AF1) +#define GPIO166_GPIO MFP_CFG(GPIO166, AF1) +#define GPIO167_GPIO MFP_CFG(GPIO167, AF1) +#define GPIO168_GPIO MFP_CFG(GPIO168, AF1) /* DFI */ #define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0) diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h index 4621067c772..92aaa3c19d6 100644 --- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h +++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h @@ -8,6 +8,15 @@ #define MFP_DRIVE_MEDIUM (0x2 << 13) #define MFP_DRIVE_FAST (0x3 << 13) +#undef MFP_CFG +#undef MFP_CFG_DRV + +#define MFP_CFG(pin, af) \ + (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM) + +#define MFP_CFG_DRV(pin, af, drv) \ + (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv) + /* GPIO */ #define GPIO0_GPIO MFP_CFG(GPIO0, AF5) #define GPIO1_GPIO MFP_CFG(GPIO1, AF5) @@ -194,6 +203,10 @@ #define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3) /* UART */ +#define GPIO8_UART3_TXD MFP_CFG(GPIO8, AF2) +#define GPIO9_UART3_RXD MFP_CFG(GPIO9, AF2) +#define GPIO1O_UART3_CTS MFP_CFG(GPIO10, AF2) +#define GPIO11_UART3_RTS MFP_CFG(GPIO11, AF2) #define GPIO88_UART2_TXD MFP_CFG(GPIO88, AF2) #define GPIO89_UART2_RXD MFP_CFG(GPIO89, AF2) #define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST) @@ -223,6 +236,22 @@ #define GPIO53_MMC1_CD MFP_CFG(GPIO53, AF1) #define GPIO46_MMC1_WP MFP_CFG(GPIO46, AF1) +/* MMC2 */ +#define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST) +#define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST) +#define GPIO30_MMC2_DAT0 MFP_CFG_DRV(GPIO30, AF6, FAST) +#define GPIO31_MMC2_DAT1 MFP_CFG_DRV(GPIO31, AF6, FAST) +#define GPIO32_MMC2_DAT2 MFP_CFG_DRV(GPIO32, AF6, FAST) +#define GPIO33_MMC2_DAT3 MFP_CFG_DRV(GPIO33, AF6, FAST) + +/* MMC4 */ +#define GPIO125_MMC4_DAT3 MFP_CFG_DRV(GPIO125, AF7, FAST) +#define GPIO126_MMC4_DAT2 MFP_CFG_DRV(GPIO126, AF7, FAST) +#define GPIO127_MMC4_DAT1 MFP_CFG_DRV(GPIO127, AF7, FAST) +#define GPIO0_2_MMC4_DAT0 MFP_CFG_DRV(GPIO0_2, AF7, FAST) +#define GPIO1_2_MMC4_CMD MFP_CFG_DRV(GPIO1_2, AF7, FAST) +#define GPIO2_2_MMC4_CLK MFP_CFG_DRV(GPIO2_2, AF7, FAST) + /* LCD */ #define GPIO84_LCD_CS MFP_CFG(GPIO84, AF1) #define GPIO60_LCD_DD0 MFP_CFG(GPIO60, AF1) @@ -260,11 +289,12 @@ #define GPIO106_CI2C_SCL MFP_CFG(GPIO106, AF1) /* I2S */ -#define GPIO113_I2S_MCLK MFP_CFG(GPIO113,AF6) -#define GPIO114_I2S_FRM MFP_CFG(GPIO114,AF1) -#define GPIO115_I2S_BCLK MFP_CFG(GPIO115,AF1) -#define GPIO116_I2S_RXD MFP_CFG(GPIO116,AF2) -#define GPIO117_I2S_TXD MFP_CFG(GPIO117,AF2) +#define GPIO113_I2S_MCLK MFP_CFG(GPIO113, AF6) +#define GPIO114_I2S_FRM MFP_CFG(GPIO114, AF1) +#define GPIO115_I2S_BCLK MFP_CFG(GPIO115, AF1) +#define GPIO116_I2S_RXD MFP_CFG(GPIO116, AF2) +#define GPIO116_I2S_TXD MFP_CFG(GPIO116, AF1) +#define GPIO117_I2S_TXD MFP_CFG(GPIO117, AF2) /* PWM */ #define GPIO96_PWM3_OUT MFP_CFG(GPIO96, AF1) @@ -296,4 +326,29 @@ #define GPIO112_KP_MKOUT6 MFP_CFG(GPIO112, AF7) #define GPIO121_KP_MKIN4 MFP_CFG(GPIO121, AF7) +/* Fast Ethernet */ +#define GPIO86_TX_CLK MFP_CFG(GPIO86, AF5) +#define GPIO87_TX_EN MFP_CFG(GPIO87, AF5) +#define GPIO88_TX_DQ3 MFP_CFG(GPIO88, AF5) +#define GPIO89_TX_DQ2 MFP_CFG(GPIO89, AF5) +#define GPIO90_TX_DQ1 MFP_CFG(GPIO90, AF5) +#define GPIO91_TX_DQ0 MFP_CFG(GPIO91, AF5) +#define GPIO92_MII_CRS MFP_CFG(GPIO92, AF5) +#define GPIO93_MII_COL MFP_CFG(GPIO93, AF5) +#define GPIO94_RX_CLK MFP_CFG(GPIO94, AF5) +#define GPIO95_RX_ER MFP_CFG(GPIO95, AF5) +#define GPIO96_RX_DQ3 MFP_CFG(GPIO96, AF5) +#define GPIO97_RX_DQ2 MFP_CFG(GPIO97, AF5) +#define GPIO98_RX_DQ1 MFP_CFG(GPIO98, AF5) +#define GPIO99_RX_DQ0 MFP_CFG(GPIO99, AF5) +#define GPIO100_MII_MDC MFP_CFG(GPIO100, AF5) +#define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5) +#define GPIO103_RX_DV MFP_CFG(GPIO103, AF5) + +/* SSP2 */ +#define GPIO107_SSP2_RXD MFP_CFG(GPIO107, AF4) +#define GPIO108_SSP2_TXD MFP_CFG(GPIO108, AF4) +#define GPIO111_SSP2_CLK MFP_CFG(GPIO111, AF4) +#define GPIO112_SSP2_FRM MFP_CFG(GPIO112, AF4) + #endif /* __ASM_MACH_MFP_PXA168_H */ diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h index 7e8a80f25dd..fbd7ee8e489 100644 --- a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h +++ b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h @@ -6,7 +6,7 @@ #define MFP_DRIVE_VERY_SLOW (0x0 << 13) #define MFP_DRIVE_SLOW (0x2 << 13) #define MFP_DRIVE_MEDIUM (0x4 << 13) -#define MFP_DRIVE_FAST (0x8 << 13) +#define MFP_DRIVE_FAST (0x6 << 13) /* UART2 */ #define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6) diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h index dbba6e8a60c..0764f4ecec8 100644 --- a/arch/arm/mach-mmp/include/mach/mmp2.h +++ b/arch/arm/mach-mmp/include/mach/mmp2.h @@ -1,16 +1,17 @@ #ifndef __ASM_MACH_MMP2_H #define __ASM_MACH_MMP2_H -struct sys_timer; +#include <linux/platform_data/pxa_sdhci.h> -extern struct sys_timer mmp2_timer; +extern void mmp2_timer_init(void); extern void __init mmp2_init_icu(void); extern void __init mmp2_init_irq(void); extern void mmp2_clear_pmic_int(void); #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <mach/devices.h> -#include <plat/i2c.h> +#include <linux/platform_data/dma-mmp_tdma.h> extern struct pxa_device_desc mmp2_device_uart1; extern struct pxa_device_desc mmp2_device_uart2; @@ -22,6 +23,14 @@ extern struct pxa_device_desc mmp2_device_twsi3; extern struct pxa_device_desc mmp2_device_twsi4; extern struct pxa_device_desc mmp2_device_twsi5; extern struct pxa_device_desc mmp2_device_twsi6; +extern struct pxa_device_desc mmp2_device_sdh0; +extern struct pxa_device_desc mmp2_device_sdh1; +extern struct pxa_device_desc mmp2_device_sdh2; +extern struct pxa_device_desc mmp2_device_sdh3; +extern struct pxa_device_desc mmp2_device_asram; +extern struct pxa_device_desc mmp2_device_isram; + +extern struct platform_device mmp2_device_gpio; static inline int mmp2_add_uart(int id) { @@ -63,5 +72,31 @@ static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data, return pxa_register_device(d, data, sizeof(*data)); } +static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data) +{ + struct pxa_device_desc *d = NULL; + + switch (id) { + case 0: d = &mmp2_device_sdh0; break; + case 1: d = &mmp2_device_sdh1; break; + case 2: d = &mmp2_device_sdh2; break; + case 3: d = &mmp2_device_sdh3; break; + default: + return -EINVAL; + } + + return pxa_register_device(d, data, sizeof(*data)); +} + +static inline int mmp2_add_asram(struct sram_platdata *data) +{ + return pxa_register_device(&mmp2_device_asram, data, sizeof(*data)); +} + +static inline int mmp2_add_isram(struct sram_platdata *data) +{ + return pxa_register_device(&mmp2_device_isram, data, sizeof(*data)); +} + #endif /* __ASM_MACH_MMP2_H */ diff --git a/arch/arm/mach-mmp/include/mach/pm-mmp2.h b/arch/arm/mach-mmp/include/mach/pm-mmp2.h new file mode 100644 index 00000000000..98bd66ce800 --- /dev/null +++ b/arch/arm/mach-mmp/include/mach/pm-mmp2.h @@ -0,0 +1,61 @@ +/* + * MMP2 Power Management Routines + * + * This software program is licensed subject to the GNU General Public License + * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html + * + * (C) Copyright 2010 Marvell International Ltd. + * All Rights Reserved + */ + +#ifndef __MMP2_PM_H__ +#define __MMP2_PM_H__ + +#include <mach/addr-map.h> + +#define APMU_PJ_IDLE_CFG APMU_REG(0x018) +#define APMU_PJ_IDLE_CFG_PJ_IDLE (1 << 1) +#define APMU_PJ_IDLE_CFG_PJ_PWRDWN (1 << 5) +#define APMU_PJ_IDLE_CFG_PWR_SW(x) ((x) << 16) +#define APMU_PJ_IDLE_CFG_L2_PWR_SW (1 << 19) +#define APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK (3 << 28) + +#define APMU_SRAM_PWR_DWN APMU_REG(0x08c) + +#define MPMU_SCCR MPMU_REG(0x038) +#define MPMU_PCR_PJ MPMU_REG(0x1000) +#define MPMU_PCR_PJ_AXISD (1 << 31) +#define MPMU_PCR_PJ_SLPEN (1 << 29) +#define MPMU_PCR_PJ_SPSD (1 << 28) +#define MPMU_PCR_PJ_DDRCORSD (1 << 27) +#define MPMU_PCR_PJ_APBSD (1 << 26) +#define MPMU_PCR_PJ_INTCLR (1 << 24) +#define MPMU_PCR_PJ_SLPWP0 (1 << 23) +#define MPMU_PCR_PJ_SLPWP1 (1 << 22) +#define MPMU_PCR_PJ_SLPWP2 (1 << 21) +#define MPMU_PCR_PJ_SLPWP3 (1 << 20) +#define MPMU_PCR_PJ_VCTCXOSD (1 << 19) +#define MPMU_PCR_PJ_SLPWP4 (1 << 18) +#define MPMU_PCR_PJ_SLPWP5 (1 << 17) +#define MPMU_PCR_PJ_SLPWP6 (1 << 16) +#define MPMU_PCR_PJ_SLPWP7 (1 << 15) + +#define MPMU_PLL2_CTRL1 MPMU_REG(0x0414) +#define MPMU_CGR_PJ MPMU_REG(0x1024) +#define MPMU_WUCRM_PJ MPMU_REG(0x104c) +#define MPMU_WUCRM_PJ_WAKEUP(x) (1 << (x)) +#define MPMU_WUCRM_PJ_RTC_ALARM (1 << 17) + +enum { + POWER_MODE_ACTIVE = 0, + POWER_MODE_CORE_INTIDLE, + POWER_MODE_CORE_EXTIDLE, + POWER_MODE_APPS_IDLE, + POWER_MODE_APPS_SLEEP, + POWER_MODE_CHIP_SLEEP, + POWER_MODE_SYS_SLEEP, +}; + +extern void mmp2_pm_enter_lowpower_mode(int state); +extern int mmp2_set_wake(struct irq_data *d, unsigned int on); +#endif diff --git a/arch/arm/mach-mmp/include/mach/pm-pxa910.h b/arch/arm/mach-mmp/include/mach/pm-pxa910.h new file mode 100644 index 00000000000..8cac8ab5253 --- /dev/null +++ b/arch/arm/mach-mmp/include/mach/pm-pxa910.h @@ -0,0 +1,77 @@ +/* + * PXA910 Power Management Routines + * + * This software program is licensed subject to the GNU General Public License + * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html + * + * (C) Copyright 2009 Marvell International Ltd. + * All Rights Reserved + */ + +#ifndef __PXA910_PM_H__ +#define __PXA910_PM_H__ + +#define APMU_MOH_IDLE_CFG APMU_REG(0x0018) +#define APMU_MOH_IDLE_CFG_MOH_IDLE (1 << 1) +#define APMU_MOH_IDLE_CFG_MOH_PWRDWN (1 << 5) +#define APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN (1 << 6) +#define APMU_MOH_IDLE_CFG_MOH_PWR_SW(x) (((x) & 0x3) << 16) +#define APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(x) (((x) & 0x3) << 18) +#define APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ (1 << 21) +#define APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN (1 << 20) + +#define APMU_SQU_CLK_GATE_CTRL APMU_REG(0x001c) +#define APMU_MC_HW_SLP_TYPE APMU_REG(0x00b0) + +#define MPMU_FCCR MPMU_REG(0x0008) +#define MPMU_APCR MPMU_REG(0x1000) +#define MPMU_APCR_AXISD (1 << 31) +#define MPMU_APCR_DSPSD (1 << 30) +#define MPMU_APCR_SLPEN (1 << 29) +#define MPMU_APCR_DTCMSD (1 << 28) +#define MPMU_APCR_DDRCORSD (1 << 27) +#define MPMU_APCR_APBSD (1 << 26) +#define MPMU_APCR_BBSD (1 << 25) +#define MPMU_APCR_SLPWP0 (1 << 23) +#define MPMU_APCR_SLPWP1 (1 << 22) +#define MPMU_APCR_SLPWP2 (1 << 21) +#define MPMU_APCR_SLPWP3 (1 << 20) +#define MPMU_APCR_VCTCXOSD (1 << 19) +#define MPMU_APCR_SLPWP4 (1 << 18) +#define MPMU_APCR_SLPWP5 (1 << 17) +#define MPMU_APCR_SLPWP6 (1 << 16) +#define MPMU_APCR_SLPWP7 (1 << 15) +#define MPMU_APCR_MSASLPEN (1 << 14) +#define MPMU_APCR_STBYEN (1 << 13) + +#define MPMU_AWUCRM MPMU_REG(0x104c) +#define MPMU_AWUCRM_AP_ASYNC_INT (1 << 25) +#define MPMU_AWUCRM_AP_FULL_IDLE (1 << 24) +#define MPMU_AWUCRM_SDH1 (1 << 23) +#define MPMU_AWUCRM_SDH2 (1 << 22) +#define MPMU_AWUCRM_KEYPRESS (1 << 21) +#define MPMU_AWUCRM_TRACKBALL (1 << 20) +#define MPMU_AWUCRM_NEWROTARY (1 << 19) +#define MPMU_AWUCRM_RTC_ALARM (1 << 17) +#define MPMU_AWUCRM_AP2_TIMER_3 (1 << 13) +#define MPMU_AWUCRM_AP2_TIMER_2 (1 << 12) +#define MPMU_AWUCRM_AP2_TIMER_1 (1 << 11) +#define MPMU_AWUCRM_AP1_TIMER_3 (1 << 10) +#define MPMU_AWUCRM_AP1_TIMER_2 (1 << 9) +#define MPMU_AWUCRM_AP1_TIMER_1 (1 << 8) +#define MPMU_AWUCRM_WAKEUP(x) (1 << ((x) & 0x7)) + +enum { + POWER_MODE_ACTIVE = 0, + POWER_MODE_CORE_INTIDLE, + POWER_MODE_CORE_EXTIDLE, + POWER_MODE_APPS_IDLE, + POWER_MODE_APPS_SLEEP, + POWER_MODE_SYS_SLEEP, + POWER_MODE_HIBERNATE, + POWER_MODE_UDR, +}; + +extern int pxa910_set_wake(struct irq_data *data, unsigned int on); + +#endif diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index 1801e420623..a83ba7cb525 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h @@ -1,22 +1,27 @@ #ifndef __ASM_MACH_PXA168_H #define __ASM_MACH_PXA168_H -struct sys_timer; +#include <linux/reboot.h> -extern struct sys_timer pxa168_timer; +extern void pxa168_timer_init(void); +extern void __init icu_init_irq(void); extern void __init pxa168_init_irq(void); +extern void pxa168_restart(enum reboot_mode, const char *); extern void pxa168_clear_keypad_wakeup(void); #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <mach/devices.h> -#include <plat/i2c.h> -#include <plat/pxa3xx_nand.h> +#include <linux/platform_data/mtd-nand-pxa3xx.h> #include <video/pxa168fb.h> -#include <plat/pxa27x_keypad.h> +#include <linux/platform_data/keypad-pxa27x.h> #include <mach/cputype.h> +#include <linux/pxa168_eth.h> +#include <linux/platform_data/mv_usb.h> extern struct pxa_device_desc pxa168_device_uart1; extern struct pxa_device_desc pxa168_device_uart2; +extern struct pxa_device_desc pxa168_device_uart3; extern struct pxa_device_desc pxa168_device_twsi0; extern struct pxa_device_desc pxa168_device_twsi1; extern struct pxa_device_desc pxa168_device_pwm1; @@ -31,6 +36,13 @@ extern struct pxa_device_desc pxa168_device_ssp5; extern struct pxa_device_desc pxa168_device_nand; extern struct pxa_device_desc pxa168_device_fb; extern struct pxa_device_desc pxa168_device_keypad; +extern struct pxa_device_desc pxa168_device_eth; + +/* pdata can be NULL */ +extern int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata); + + +extern struct platform_device pxa168_device_gpio; static inline int pxa168_add_uart(int id) { @@ -39,6 +51,7 @@ static inline int pxa168_add_uart(int id) switch (id) { case 1: d = &pxa168_device_uart1; break; case 2: d = &pxa168_device_uart2; break; + case 3: d = &pxa168_device_uart3; break; } if (d == NULL) @@ -117,4 +130,8 @@ static inline int pxa168_add_keypad(struct pxa27x_keypad_platform_data *data) return pxa_register_device(&pxa168_device_keypad, data, sizeof(*data)); } +static inline int pxa168_add_eth(struct pxa168_eth_platform_data *data) +{ + return pxa_register_device(&pxa168_device_eth, data, sizeof(*data)); +} #endif /* __ASM_MACH_PXA168_H */ diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h index f13c49d6f8d..92253203f5b 100644 --- a/arch/arm/mach-mmp/include/mach/pxa910.h +++ b/arch/arm/mach-mmp/include/mach/pxa910.h @@ -1,15 +1,15 @@ #ifndef __ASM_MACH_PXA910_H #define __ASM_MACH_PXA910_H -struct sys_timer; - -extern struct sys_timer pxa910_timer; +extern void pxa910_timer_init(void); +extern void __init icu_init_irq(void); extern void __init pxa910_init_irq(void); #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <mach/devices.h> -#include <plat/i2c.h> -#include <plat/pxa3xx_nand.h> +#include <linux/platform_data/mtd-nand-pxa3xx.h> +#include <video/mmp_disp.h> extern struct pxa_device_desc pxa910_device_uart1; extern struct pxa_device_desc pxa910_device_uart2; @@ -20,6 +20,14 @@ extern struct pxa_device_desc pxa910_device_pwm2; extern struct pxa_device_desc pxa910_device_pwm3; extern struct pxa_device_desc pxa910_device_pwm4; extern struct pxa_device_desc pxa910_device_nand; +extern struct platform_device pxa168_device_u2o; +extern struct platform_device pxa168_device_u2ootg; +extern struct platform_device pxa168_device_u2oehci; +extern struct pxa_device_desc pxa910_device_disp; +extern struct pxa_device_desc pxa910_device_fb; +extern struct pxa_device_desc pxa910_device_panel; +extern struct platform_device pxa910_device_gpio; +extern struct platform_device pxa910_device_rtc; static inline int pxa910_add_uart(int id) { diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h index 1a96585336b..ddc812f4034 100644 --- a/arch/arm/mach-mmp/include/mach/regs-apbc.h +++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h @@ -13,103 +13,6 @@ #include <mach/addr-map.h> -#define APBC_VIRT_BASE (APB_VIRT_BASE + 0x015000) -#define APBC_REG(x) (APBC_VIRT_BASE + (x)) - -/* - * APB clock register offsets for PXA168 - */ -#define APBC_PXA168_UART1 APBC_REG(0x000) -#define APBC_PXA168_UART2 APBC_REG(0x004) -#define APBC_PXA168_GPIO APBC_REG(0x008) -#define APBC_PXA168_PWM1 APBC_REG(0x00c) -#define APBC_PXA168_PWM2 APBC_REG(0x010) -#define APBC_PXA168_PWM3 APBC_REG(0x014) -#define APBC_PXA168_PWM4 APBC_REG(0x018) -#define APBC_PXA168_RTC APBC_REG(0x028) -#define APBC_PXA168_TWSI0 APBC_REG(0x02c) -#define APBC_PXA168_KPC APBC_REG(0x030) -#define APBC_PXA168_TIMERS APBC_REG(0x034) -#define APBC_PXA168_AIB APBC_REG(0x03c) -#define APBC_PXA168_SW_JTAG APBC_REG(0x040) -#define APBC_PXA168_ONEWIRE APBC_REG(0x048) -#define APBC_PXA168_ASFAR APBC_REG(0x050) -#define APBC_PXA168_ASSAR APBC_REG(0x054) -#define APBC_PXA168_TWSI1 APBC_REG(0x06c) -#define APBC_PXA168_UART3 APBC_REG(0x070) -#define APBC_PXA168_AC97 APBC_REG(0x084) -#define APBC_PXA168_SSP1 APBC_REG(0x81c) -#define APBC_PXA168_SSP2 APBC_REG(0x820) -#define APBC_PXA168_SSP3 APBC_REG(0x84c) -#define APBC_PXA168_SSP4 APBC_REG(0x858) -#define APBC_PXA168_SSP5 APBC_REG(0x85c) - -/* - * APB Clock register offsets for PXA910 - */ -#define APBC_PXA910_UART0 APBC_REG(0x000) -#define APBC_PXA910_UART1 APBC_REG(0x004) -#define APBC_PXA910_GPIO APBC_REG(0x008) -#define APBC_PXA910_PWM1 APBC_REG(0x00c) -#define APBC_PXA910_PWM2 APBC_REG(0x010) -#define APBC_PXA910_PWM3 APBC_REG(0x014) -#define APBC_PXA910_PWM4 APBC_REG(0x018) -#define APBC_PXA910_SSP1 APBC_REG(0x01c) -#define APBC_PXA910_SSP2 APBC_REG(0x020) -#define APBC_PXA910_IPC APBC_REG(0x024) -#define APBC_PXA910_TWSI0 APBC_REG(0x02c) -#define APBC_PXA910_KPC APBC_REG(0x030) -#define APBC_PXA910_TIMERS APBC_REG(0x034) -#define APBC_PXA910_TBROT APBC_REG(0x038) -#define APBC_PXA910_AIB APBC_REG(0x03c) -#define APBC_PXA910_SW_JTAG APBC_REG(0x040) -#define APBC_PXA910_TIMERS1 APBC_REG(0x044) -#define APBC_PXA910_ONEWIRE APBC_REG(0x048) -#define APBC_PXA910_SSP3 APBC_REG(0x04c) -#define APBC_PXA910_ASFAR APBC_REG(0x050) -#define APBC_PXA910_ASSAR APBC_REG(0x054) - -/* - * APB Clock register offsets for MMP2 - */ -#define APBC_MMP2_RTC APBC_REG(0x000) -#define APBC_MMP2_TWSI1 APBC_REG(0x004) -#define APBC_MMP2_TWSI2 APBC_REG(0x008) -#define APBC_MMP2_TWSI3 APBC_REG(0x00c) -#define APBC_MMP2_TWSI4 APBC_REG(0x010) -#define APBC_MMP2_ONEWIRE APBC_REG(0x014) -#define APBC_MMP2_KPC APBC_REG(0x018) -#define APBC_MMP2_TB_ROTARY APBC_REG(0x01c) -#define APBC_MMP2_SW_JTAG APBC_REG(0x020) -#define APBC_MMP2_TIMERS APBC_REG(0x024) -#define APBC_MMP2_UART1 APBC_REG(0x02c) -#define APBC_MMP2_UART2 APBC_REG(0x030) -#define APBC_MMP2_UART3 APBC_REG(0x034) -#define APBC_MMP2_GPIO APBC_REG(0x038) -#define APBC_MMP2_PWM0 APBC_REG(0x03c) -#define APBC_MMP2_PWM1 APBC_REG(0x040) -#define APBC_MMP2_PWM2 APBC_REG(0x044) -#define APBC_MMP2_PWM3 APBC_REG(0x048) -#define APBC_MMP2_SSP0 APBC_REG(0x04c) -#define APBC_MMP2_SSP1 APBC_REG(0x050) -#define APBC_MMP2_SSP2 APBC_REG(0x054) -#define APBC_MMP2_SSP3 APBC_REG(0x058) -#define APBC_MMP2_SSP4 APBC_REG(0x05c) -#define APBC_MMP2_SSP5 APBC_REG(0x060) -#define APBC_MMP2_AIB APBC_REG(0x064) -#define APBC_MMP2_ASFAR APBC_REG(0x068) -#define APBC_MMP2_ASSAR APBC_REG(0x06c) -#define APBC_MMP2_USIM APBC_REG(0x070) -#define APBC_MMP2_MPMU APBC_REG(0x074) -#define APBC_MMP2_IPC APBC_REG(0x078) -#define APBC_MMP2_TWSI5 APBC_REG(0x07c) -#define APBC_MMP2_TWSI6 APBC_REG(0x080) -#define APBC_MMP2_TWSI_INTSTS APBC_REG(0x084) -#define APBC_MMP2_UART4 APBC_REG(0x088) -#define APBC_MMP2_RIPC APBC_REG(0x08c) -#define APBC_MMP2_THSENS1 APBC_REG(0x090) /* Thermal Sensor */ -#define APBC_MMP2_THSENS_INTSTS APBC_REG(0x0a4) - /* Common APB clock register bit definitions */ #define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */ #define APBC_FNCLK (1 << 1) /* Functional Clock Enable */ diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h index ac4702357a6..93c8d0e29bb 100644 --- a/arch/arm/mach-mmp/include/mach/regs-apmu.h +++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h @@ -13,21 +13,6 @@ #include <mach/addr-map.h> -#define APMU_VIRT_BASE (AXI_VIRT_BASE + 0x82800) -#define APMU_REG(x) (APMU_VIRT_BASE + (x)) - -/* Clock Reset Control */ -#define APMU_IRE APMU_REG(0x048) -#define APMU_LCD APMU_REG(0x04c) -#define APMU_CCIC APMU_REG(0x050) -#define APMU_SDH0 APMU_REG(0x054) -#define APMU_SDH1 APMU_REG(0x058) -#define APMU_USB APMU_REG(0x05c) -#define APMU_NAND APMU_REG(0x060) -#define APMU_DMA APMU_REG(0x064) -#define APMU_GEU APMU_REG(0x068) -#define APMU_BUS APMU_REG(0x06c) - #define APMU_FNCLK_EN (1 << 4) #define APMU_AXICLK_EN (1 << 3) #define APMU_FNRST_DIS (1 << 1) diff --git a/arch/arm/mach-mmp/include/mach/regs-rtc.h b/arch/arm/mach-mmp/include/mach/regs-rtc.h new file mode 100644 index 00000000000..5bff886a394 --- /dev/null +++ b/arch/arm/mach-mmp/include/mach/regs-rtc.h @@ -0,0 +1,23 @@ +#ifndef __ASM_MACH_REGS_RTC_H +#define __ASM_MACH_REGS_RTC_H + +#include <mach/addr-map.h> + +#define RTC_VIRT_BASE (APB_VIRT_BASE + 0x10000) +#define RTC_REG(x) (*((volatile u32 __iomem *)(RTC_VIRT_BASE + (x)))) + +/* + * Real Time Clock + */ + +#define RCNR RTC_REG(0x00) /* RTC Count Register */ +#define RTAR RTC_REG(0x04) /* RTC Alarm Register */ +#define RTSR RTC_REG(0x08) /* RTC Status Register */ +#define RTTR RTC_REG(0x0C) /* RTC Timer Trim Register */ + +#define RTSR_HZE (1 << 3) /* HZ interrupt enable */ +#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ +#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ +#define RTSR_AL (1 << 0) /* RTC alarm detected */ + +#endif /* __ASM_MACH_REGS_RTC_H */ diff --git a/arch/arm/mach-mmp/include/mach/regs-usb.h b/arch/arm/mach-mmp/include/mach/regs-usb.h new file mode 100644 index 00000000000..b047bf48750 --- /dev/null +++ b/arch/arm/mach-mmp/include/mach/regs-usb.h @@ -0,0 +1,253 @@ +/* + * Copyright (C) 2011 Marvell International Ltd. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_ARCH_REGS_USB_H +#define __ASM_ARCH_REGS_USB_H + +#define PXA168_U2O_REGBASE (0xd4208000) +#define PXA168_U2O_PHYBASE (0xd4207000) + +#define PXA168_U2H_REGBASE (0xd4209000) +#define PXA168_U2H_PHYBASE (0xd4206000) + +#define MMP3_HSIC1_REGBASE (0xf0001000) +#define MMP3_HSIC1_PHYBASE (0xf0001800) + +#define MMP3_HSIC2_REGBASE (0xf0002000) +#define MMP3_HSIC2_PHYBASE (0xf0002800) + +#define MMP3_FSIC_REGBASE (0xf0003000) +#define MMP3_FSIC_PHYBASE (0xf0003800) + + +#define USB_REG_RANGE (0x1ff) +#define USB_PHY_RANGE (0xff) + +/* registers */ +#define U2x_CAPREGS_OFFSET 0x100 + +/* phy regs */ +#define UTMI_REVISION 0x0 +#define UTMI_CTRL 0x4 +#define UTMI_PLL 0x8 +#define UTMI_TX 0xc +#define UTMI_RX 0x10 +#define UTMI_IVREF 0x14 +#define UTMI_T0 0x18 +#define UTMI_T1 0x1c +#define UTMI_T2 0x20 +#define UTMI_T3 0x24 +#define UTMI_T4 0x28 +#define UTMI_T5 0x2c +#define UTMI_RESERVE 0x30 +#define UTMI_USB_INT 0x34 +#define UTMI_DBG_CTL 0x38 +#define UTMI_OTG_ADDON 0x3c + +/* For UTMICTRL Register */ +#define UTMI_CTRL_USB_CLK_EN (1 << 31) +/* pxa168 */ +#define UTMI_CTRL_SUSPEND_SET1 (1 << 30) +#define UTMI_CTRL_SUSPEND_SET2 (1 << 29) +#define UTMI_CTRL_RXBUF_PDWN (1 << 24) +#define UTMI_CTRL_TXBUF_PDWN (1 << 11) + +#define UTMI_CTRL_INPKT_DELAY_SHIFT 30 +#define UTMI_CTRL_INPKT_DELAY_SOF_SHIFT 28 +#define UTMI_CTRL_PU_REF_SHIFT 20 +#define UTMI_CTRL_ARC_PULLDN_SHIFT 12 +#define UTMI_CTRL_PLL_PWR_UP_SHIFT 1 +#define UTMI_CTRL_PWR_UP_SHIFT 0 + +/* For UTMI_PLL Register */ +#define UTMI_PLL_PLLCALI12_SHIFT 29 +#define UTMI_PLL_PLLCALI12_MASK (0x3 << 29) + +#define UTMI_PLL_PLLVDD18_SHIFT 27 +#define UTMI_PLL_PLLVDD18_MASK (0x3 << 27) + +#define UTMI_PLL_PLLVDD12_SHIFT 25 +#define UTMI_PLL_PLLVDD12_MASK (0x3 << 25) + +#define UTMI_PLL_CLK_BLK_EN_SHIFT 24 +#define CLK_BLK_EN (0x1 << 24) +#define PLL_READY (0x1 << 23) +#define KVCO_EXT (0x1 << 22) +#define VCOCAL_START (0x1 << 21) + +#define UTMI_PLL_KVCO_SHIFT 15 +#define UTMI_PLL_KVCO_MASK (0x7 << 15) + +#define UTMI_PLL_ICP_SHIFT 12 +#define UTMI_PLL_ICP_MASK (0x7 << 12) + +#define UTMI_PLL_FBDIV_SHIFT 4 +#define UTMI_PLL_FBDIV_MASK (0xFF << 4) + +#define UTMI_PLL_REFDIV_SHIFT 0 +#define UTMI_PLL_REFDIV_MASK (0xF << 0) + +/* For UTMI_TX Register */ +#define UTMI_TX_REG_EXT_FS_RCAL_SHIFT 27 +#define UTMI_TX_REG_EXT_FS_RCAL_MASK (0xf << 27) + +#define UTMI_TX_REG_EXT_FS_RCAL_EN_SHIFT 26 +#define UTMI_TX_REG_EXT_FS_RCAL_EN_MASK (0x1 << 26) + +#define UTMI_TX_TXVDD12_SHIFT 22 +#define UTMI_TX_TXVDD12_MASK (0x3 << 22) + +#define UTMI_TX_CK60_PHSEL_SHIFT 17 +#define UTMI_TX_CK60_PHSEL_MASK (0xf << 17) + +#define UTMI_TX_IMPCAL_VTH_SHIFT 14 +#define UTMI_TX_IMPCAL_VTH_MASK (0x7 << 14) + +#define REG_RCAL_START (0x1 << 12) + +#define UTMI_TX_LOW_VDD_EN_SHIFT 11 + +#define UTMI_TX_AMP_SHIFT 0 +#define UTMI_TX_AMP_MASK (0x7 << 0) + +/* For UTMI_RX Register */ +#define UTMI_REG_SQ_LENGTH_SHIFT 15 +#define UTMI_REG_SQ_LENGTH_MASK (0x3 << 15) + +#define UTMI_RX_SQ_THRESH_SHIFT 4 +#define UTMI_RX_SQ_THRESH_MASK (0xf << 4) + +#define UTMI_OTG_ADDON_OTG_ON (1 << 0) + +/* For MMP3 USB Phy */ +#define USB2_PLL_REG0 0x4 +#define USB2_PLL_REG1 0x8 +#define USB2_TX_REG0 0x10 +#define USB2_TX_REG1 0x14 +#define USB2_TX_REG2 0x18 +#define USB2_RX_REG0 0x20 +#define USB2_RX_REG1 0x24 +#define USB2_RX_REG2 0x28 +#define USB2_ANA_REG0 0x30 +#define USB2_ANA_REG1 0x34 +#define USB2_ANA_REG2 0x38 +#define USB2_DIG_REG0 0x3C +#define USB2_DIG_REG1 0x40 +#define USB2_DIG_REG2 0x44 +#define USB2_DIG_REG3 0x48 +#define USB2_TEST_REG0 0x4C +#define USB2_TEST_REG1 0x50 +#define USB2_TEST_REG2 0x54 +#define USB2_CHARGER_REG0 0x58 +#define USB2_OTG_REG0 0x5C +#define USB2_PHY_MON0 0x60 +#define USB2_RESETVE_REG0 0x64 +#define USB2_ICID_REG0 0x78 +#define USB2_ICID_REG1 0x7C + +/* USB2_PLL_REG0 */ +/* This is for Ax stepping */ +#define USB2_PLL_FBDIV_SHIFT_MMP3 0 +#define USB2_PLL_FBDIV_MASK_MMP3 (0xFF << 0) + +#define USB2_PLL_REFDIV_SHIFT_MMP3 8 +#define USB2_PLL_REFDIV_MASK_MMP3 (0xF << 8) + +#define USB2_PLL_VDD12_SHIFT_MMP3 12 +#define USB2_PLL_VDD18_SHIFT_MMP3 14 + +/* This is for B0 stepping */ +#define USB2_PLL_FBDIV_SHIFT_MMP3_B0 0 +#define USB2_PLL_REFDIV_SHIFT_MMP3_B0 9 +#define USB2_PLL_VDD18_SHIFT_MMP3_B0 14 +#define USB2_PLL_FBDIV_MASK_MMP3_B0 0x01FF +#define USB2_PLL_REFDIV_MASK_MMP3_B0 0x3E00 + +#define USB2_PLL_CAL12_SHIFT_MMP3 0 +#define USB2_PLL_CALI12_MASK_MMP3 (0x3 << 0) + +#define USB2_PLL_VCOCAL_START_SHIFT_MMP3 2 + +#define USB2_PLL_KVCO_SHIFT_MMP3 4 +#define USB2_PLL_KVCO_MASK_MMP3 (0x7<<4) + +#define USB2_PLL_ICP_SHIFT_MMP3 8 +#define USB2_PLL_ICP_MASK_MMP3 (0x7<<8) + +#define USB2_PLL_LOCK_BYPASS_SHIFT_MMP3 12 + +#define USB2_PLL_PU_PLL_SHIFT_MMP3 13 +#define USB2_PLL_PU_PLL_MASK (0x1 << 13) + +#define USB2_PLL_READY_MASK_MMP3 (0x1 << 15) + +/* USB2_TX_REG0 */ +#define USB2_TX_IMPCAL_VTH_SHIFT_MMP3 8 +#define USB2_TX_IMPCAL_VTH_MASK_MMP3 (0x7 << 8) + +#define USB2_TX_RCAL_START_SHIFT_MMP3 13 + +/* USB2_TX_REG1 */ +#define USB2_TX_CK60_PHSEL_SHIFT_MMP3 0 +#define USB2_TX_CK60_PHSEL_MASK_MMP3 (0xf << 0) + +#define USB2_TX_AMP_SHIFT_MMP3 4 +#define USB2_TX_AMP_MASK_MMP3 (0x7 << 4) + +#define USB2_TX_VDD12_SHIFT_MMP3 8 +#define USB2_TX_VDD12_MASK_MMP3 (0x3 << 8) + +/* USB2_TX_REG2 */ +#define USB2_TX_DRV_SLEWRATE_SHIFT 10 + +/* USB2_RX_REG0 */ +#define USB2_RX_SQ_THRESH_SHIFT_MMP3 4 +#define USB2_RX_SQ_THRESH_MASK_MMP3 (0xf << 4) + +#define USB2_RX_SQ_LENGTH_SHIFT_MMP3 10 +#define USB2_RX_SQ_LENGTH_MASK_MMP3 (0x3 << 10) + +/* USB2_ANA_REG1*/ +#define USB2_ANA_PU_ANA_SHIFT_MMP3 14 + +/* USB2_OTG_REG0 */ +#define USB2_OTG_PU_OTG_SHIFT_MMP3 3 + +/* fsic registers */ +#define FSIC_MISC 0x4 +#define FSIC_INT 0x28 +#define FSIC_CTRL 0x30 + +/* HSIC registers */ +#define HSIC_PAD_CTRL 0x4 + +#define HSIC_CTRL 0x8 +#define HSIC_CTRL_HSIC_ENABLE (1<<7) +#define HSIC_CTRL_PLL_BYPASS (1<<4) + +#define TEST_GRP_0 0xc +#define TEST_GRP_1 0x10 + +#define HSIC_INT 0x14 +#define HSIC_INT_READY_INT_EN (1<<10) +#define HSIC_INT_CONNECT_INT_EN (1<<9) +#define HSIC_INT_CORE_INT_EN (1<<8) +#define HSIC_INT_HS_READY (1<<2) +#define HSIC_INT_CONNECT (1<<1) +#define HSIC_INT_CORE (1<<0) + +#define HSIC_CONFIG 0x18 +#define USBHSIC_CTRL 0x20 + +#define HSIC_USB_CTRL 0x28 +#define HSIC_USB_CTRL_CLKEN 1 +#define HSIC_USB_CLK_PHY 0x0 +#define HSIC_USB_CLK_PMU 0x1 + +#endif /* __ASM_ARCH_PXA_U2O_H */ diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h deleted file mode 100644 index 1a8a25edb1b..00000000000 --- a/arch/arm/mach-mmp/include/mach/system.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/system.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_SYSTEM_H -#define __ASM_MACH_SYSTEM_H - -#include <mach/cputype.h> - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode, const char *cmd) -{ - if (cpu_is_pxa168()) - cpu_reset(0xffff0000); - else - cpu_reset(0); -} -#endif /* __ASM_MACH_SYSTEM_H */ diff --git a/arch/arm/mach-mmp/include/mach/timex.h b/arch/arm/mach-mmp/include/mach/timex.h deleted file mode 100644 index 70c9f1d88c0..00000000000 --- a/arch/arm/mach-mmp/include/mach/timex.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/timex.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifdef CONFIG_CPU_MMP2 -#define CLOCK_TICK_RATE 6500000 -#else -#define CLOCK_TICK_RATE 3250000 -#endif diff --git a/arch/arm/mach-mmp/include/mach/uncompress.h b/arch/arm/mach-mmp/include/mach/uncompress.h index 85bd8a2d84b..8890fa8fa77 100644 --- a/arch/arm/mach-mmp/include/mach/uncompress.h +++ b/arch/arm/mach-mmp/include/mach/uncompress.h @@ -14,7 +14,7 @@ #define UART2_BASE (APB_PHYS_BASE + 0x17000) #define UART3_BASE (APB_PHYS_BASE + 0x18000) -static volatile unsigned long *UART; +volatile unsigned long *UART; static inline void putc(char c) { @@ -43,9 +43,3 @@ static inline void arch_decomp_setup(void) if (machine_is_avengers_lite()) UART = (unsigned long *)UART3_BASE; } - -/* - * nothing to do - */ - -#define arch_decomp_wdog() diff --git a/arch/arm/mach-mmp/include/mach/vmalloc.h b/arch/arm/mach-mmp/include/mach/vmalloc.h deleted file mode 100644 index 1d0bac003ad..00000000000 --- a/arch/arm/mach-mmp/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/vmalloc.h - */ - -#define VMALLOC_END 0xfe000000UL |