diff options
Diffstat (limited to 'arch/arm/mach-kirkwood')
41 files changed, 1225 insertions, 2047 deletions
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 7fc603b4689..df4b26340ae 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -2,69 +2,32 @@ if ARCH_KIRKWOOD menu "Marvell Kirkwood Implementations" -config MACH_DB88F6281_BP - bool "Marvell DB-88F6281-BP Development Board" - help - Say 'Y' here if you want your kernel to support the - Marvell DB-88F6281-BP Development Board. - -config MACH_RD88F6192_NAS - bool "Marvell RD-88F6192-NAS Reference Board" - help - Say 'Y' here if you want your kernel to support the - Marvell RD-88F6192-NAS Reference Board. +config KIRKWOOD_LEGACY + bool -config MACH_RD88F6281 - bool "Marvell RD-88F6281 Reference Board" - help - Say 'Y' here if you want your kernel to support the - Marvell RD-88F6281 Reference Board. - -config MACH_MV88F6281GTW_GE - bool "Marvell 88F6281 GTW GE Board" - help - Say 'Y' here if you want your kernel to support the - Marvell 88F6281 GTW GE Board. - -config MACH_SHEEVAPLUG - bool "Marvell SheevaPlug Reference Board" - help - Say 'Y' here if you want your kernel to support the - Marvell SheevaPlug Reference Board. - -config MACH_ESATA_SHEEVAPLUG - bool "Marvell eSATA SheevaPlug Reference Board" - help - Say 'Y' here if you want your kernel to support the - Marvell eSATA SheevaPlug Reference Board. - -config MACH_GURUPLUG - bool "Marvell GuruPlug Reference Board" - help - Say 'Y' here if you want your kernel to support the - Marvell GuruPlug Reference Board. - -config MACH_TS219 - bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" +config MACH_D2NET_V2 + bool "LaCie d2 Network v2 NAS Board" + select KIRKWOOD_LEGACY help Say 'Y' here if you want your kernel to support the - QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and - TS-219P+ Turbo NAS devices. + LaCie d2 Network v2 NAS. -config MACH_TS41X - bool "QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo NAS" +config MACH_NET2BIG_V2 + bool "LaCie 2Big Network v2 NAS Board" + select KIRKWOOD_LEGACY help Say 'Y' here if you want your kernel to support the - QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo - NAS devices. + LaCie 2Big Network v2 NAS. -config MACH_DOCKSTAR - bool "Seagate FreeAgent DockStar" +config MACH_NET5BIG_V2 + bool "LaCie 5Big Network v2 NAS Board" + select KIRKWOOD_LEGACY help Say 'Y' here if you want your kernel to support the - Seagate FreeAgent DockStar. + LaCie 5Big Network v2 NAS. config MACH_OPENRD + select KIRKWOOD_LEGACY bool config MACH_OPENRD_BASE @@ -88,47 +51,60 @@ config MACH_OPENRD_ULTIMATE Say 'Y' here if you want your kernel to support the Marvell OpenRD Ultimate Board. -config MACH_NETSPACE_V2 - bool "LaCie Network Space v2 NAS Board" +config MACH_RD88F6192_NAS + bool "Marvell RD-88F6192-NAS Reference Board" + select KIRKWOOD_LEGACY help Say 'Y' here if you want your kernel to support the - LaCie Network Space v2 NAS. + Marvell RD-88F6192-NAS Reference Board. -config MACH_INETSPACE_V2 - bool "LaCie Internet Space v2 NAS Board" +config MACH_RD88F6281 + bool "Marvell RD-88F6281 Reference Board" + select KIRKWOOD_LEGACY help Say 'Y' here if you want your kernel to support the - LaCie Internet Space v2 NAS. + Marvell RD-88F6281 Reference Board. -config MACH_NETSPACE_MAX_V2 - bool "LaCie Network Space Max v2 NAS Board" +config MACH_T5325 + bool "HP t5325 Thin Client" + select KIRKWOOD_LEGACY help Say 'Y' here if you want your kernel to support the - LaCie Network Space Max v2 NAS. + HP t5325 Thin Client. -config MACH_D2NET_V2 - bool "LaCie d2 Network v2 NAS Board" +config MACH_TS219 + bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" + select KIRKWOOD_LEGACY help Say 'Y' here if you want your kernel to support the - LaCie d2 Network v2 NAS. + QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and + TS-219P+ Turbo NAS devices. -config MACH_NET2BIG_V2 - bool "LaCie 2Big Network v2 NAS Board" +config MACH_TS41X + bool "QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo NAS" + select KIRKWOOD_LEGACY help Say 'Y' here if you want your kernel to support the - LaCie 2Big Network v2 NAS. + QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo + NAS devices. -config MACH_NET5BIG_V2 - bool "LaCie 5Big Network v2 NAS Board" - help - Say 'Y' here if you want your kernel to support the - LaCie 5Big Network v2 NAS. +comment "Device tree entries" -config MACH_T5325 - bool "HP t5325 Thin Client" +config ARCH_KIRKWOOD_DT + bool "Marvell Kirkwood Flattened Device Tree" + select KIRKWOOD_CLK + select OF_IRQ + select ORION_IRQCHIP + select ORION_TIMER + select POWER_SUPPLY + select POWER_RESET + select POWER_RESET_GPIO + select REGULATOR + select REGULATOR_FIXED_VOLTAGE + select USE_OF help Say 'Y' here if you want your kernel to support the - HP t5325 Thin Client. + Marvell Kirkwood using flattened device tree. endmenu diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile index 5dcaa81a2ec..3a72c5c6e74 100644 --- a/arch/arm/mach-kirkwood/Makefile +++ b/arch/arm/mach-kirkwood/Makefile @@ -1,22 +1,14 @@ -obj-y += common.o addr-map.o irq.o pcie.o mpp.o +obj-$(CONFIG_KIRKWOOD_LEGACY) += irq.o mpp.o common.o pcie.o +obj-$(CONFIG_PM) += pm.o -obj-$(CONFIG_MACH_DB88F6281_BP) += db88f6281-bp-setup.o -obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o -obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o -obj-$(CONFIG_MACH_MV88F6281GTW_GE) += mv88f6281gtw_ge-setup.o -obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o -obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG) += sheevaplug-setup.o -obj-$(CONFIG_MACH_GURUPLUG) += guruplug-setup.o -obj-$(CONFIG_MACH_DOCKSTAR) += dockstar-setup.o -obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o -obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o -obj-$(CONFIG_MACH_OPENRD) += openrd-setup.o -obj-$(CONFIG_MACH_NETSPACE_V2) += netspace_v2-setup.o lacie_v2-common.o -obj-$(CONFIG_MACH_INETSPACE_V2) += netspace_v2-setup.o lacie_v2-common.o -obj-$(CONFIG_MACH_NETSPACE_MAX_V2) += netspace_v2-setup.o lacie_v2-common.o obj-$(CONFIG_MACH_D2NET_V2) += d2net_v2-setup.o lacie_v2-common.o obj-$(CONFIG_MACH_NET2BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o obj-$(CONFIG_MACH_NET5BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o +obj-$(CONFIG_MACH_OPENRD) += openrd-setup.o +obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o +obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o obj-$(CONFIG_MACH_T5325) += t5325-setup.o +obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o +obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o -obj-$(CONFIG_CPU_IDLE) += cpuidle.o +obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c deleted file mode 100644 index 8d03bcef518..00000000000 --- a/arch/arm/mach-kirkwood/addr-map.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * arch/arm/mach-kirkwood/addr-map.c - * - * Address map functions for Marvell Kirkwood SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/mbus.h> -#include <linux/io.h> -#include <mach/hardware.h> -#include "common.h" - -/* - * Generic Address Decode Windows bit settings - */ -#define TARGET_DDR 0 -#define TARGET_DEV_BUS 1 -#define TARGET_SRAM 3 -#define TARGET_PCIE 4 -#define ATTR_DEV_SPI_ROM 0x1e -#define ATTR_DEV_BOOT 0x1d -#define ATTR_DEV_NAND 0x2f -#define ATTR_DEV_CS3 0x37 -#define ATTR_DEV_CS2 0x3b -#define ATTR_DEV_CS1 0x3d -#define ATTR_DEV_CS0 0x3e -#define ATTR_PCIE_IO 0xe0 -#define ATTR_PCIE_MEM 0xe8 -#define ATTR_PCIE1_IO 0xd0 -#define ATTR_PCIE1_MEM 0xd8 -#define ATTR_SRAM 0x01 - -/* - * Helpers to get DDR bank info - */ -#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3)) -#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3)) - -/* - * CPU Address Decode Windows registers - */ -#define WIN_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4)) -#define WIN_CTRL_OFF 0x0000 -#define WIN_BASE_OFF 0x0004 -#define WIN_REMAP_LO_OFF 0x0008 -#define WIN_REMAP_HI_OFF 0x000c - - -struct mbus_dram_target_info kirkwood_mbus_dram_info; - -static int __init cpu_win_can_remap(int win) -{ - if (win < 4) - return 1; - - return 0; -} - -static void __init setup_cpu_win(int win, u32 base, u32 size, - u8 target, u8 attr, int remap) -{ - void __iomem *addr = (void __iomem *)WIN_OFF(win); - u32 ctrl; - - base &= 0xffff0000; - ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1; - - writel(base, addr + WIN_BASE_OFF); - writel(ctrl, addr + WIN_CTRL_OFF); - if (cpu_win_can_remap(win)) { - if (remap < 0) - remap = base; - - writel(remap & 0xffff0000, addr + WIN_REMAP_LO_OFF); - writel(0, addr + WIN_REMAP_HI_OFF); - } -} - -void __init kirkwood_setup_cpu_mbus(void) -{ - void __iomem *addr; - int i; - int cs; - - /* - * First, disable and clear windows. - */ - for (i = 0; i < 8; i++) { - addr = (void __iomem *)WIN_OFF(i); - - writel(0, addr + WIN_BASE_OFF); - writel(0, addr + WIN_CTRL_OFF); - if (cpu_win_can_remap(i)) { - writel(0, addr + WIN_REMAP_LO_OFF); - writel(0, addr + WIN_REMAP_HI_OFF); - } - } - - /* - * Setup windows for PCIe IO+MEM space. - */ - setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE, - TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE); - setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE, - TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE); - setup_cpu_win(2, KIRKWOOD_PCIE1_IO_PHYS_BASE, KIRKWOOD_PCIE1_IO_SIZE, - TARGET_PCIE, ATTR_PCIE1_IO, KIRKWOOD_PCIE1_IO_BUS_BASE); - setup_cpu_win(3, KIRKWOOD_PCIE1_MEM_PHYS_BASE, KIRKWOOD_PCIE1_MEM_SIZE, - TARGET_PCIE, ATTR_PCIE1_MEM, KIRKWOOD_PCIE1_MEM_BUS_BASE); - - /* - * Setup window for NAND controller. - */ - setup_cpu_win(4, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE, - TARGET_DEV_BUS, ATTR_DEV_NAND, -1); - - /* - * Setup window for SRAM. - */ - setup_cpu_win(5, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE, - TARGET_SRAM, ATTR_SRAM, -1); - - /* - * Setup MBUS dram target info. - */ - kirkwood_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; - - addr = (void __iomem *)DDR_WINDOW_CPU_BASE; - - for (i = 0, cs = 0; i < 4; i++) { - u32 base = readl(addr + DDR_BASE_CS_OFF(i)); - u32 size = readl(addr + DDR_SIZE_CS_OFF(i)); - - /* - * Chip select enabled? - */ - if (size & 1) { - struct mbus_dram_window *w; - - w = &kirkwood_mbus_dram_info.cs[cs++]; - w->cs_index = i; - w->mbus_attr = 0xf & ~(1 << i); - w->base = base & 0xffff0000; - w->size = (size | 0x0000ffff) + 1; - } - } - kirkwood_mbus_dram_info.num_cs = cs; -} diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c new file mode 100644 index 00000000000..ff18ff20f71 --- /dev/null +++ b/arch/arm/mach-kirkwood/board-dt.c @@ -0,0 +1,223 @@ +/* + * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net> + * + * arch/arm/mach-kirkwood/board-dt.c + * + * Flattened Device Tree board initialization + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/clk.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_net.h> +#include <linux/of_platform.h> +#include <linux/dma-mapping.h> +#include <linux/irqchip.h> +#include <asm/hardware/cache-feroceon-l2.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <mach/bridge-regs.h> +#include <plat/common.h> +#include <plat/pcie.h> +#include "pm.h" + +static struct map_desc kirkwood_io_desc[] __initdata = { + { + .virtual = (unsigned long) KIRKWOOD_REGS_VIRT_BASE, + .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE), + .length = KIRKWOOD_REGS_SIZE, + .type = MT_DEVICE, + }, +}; + +static void __init kirkwood_map_io(void) +{ + iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc)); +} + +static struct resource kirkwood_cpufreq_resources[] = { + [0] = { + .start = CPU_CONTROL_PHYS, + .end = CPU_CONTROL_PHYS + 3, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device kirkwood_cpufreq_device = { + .name = "kirkwood-cpufreq", + .id = -1, + .num_resources = ARRAY_SIZE(kirkwood_cpufreq_resources), + .resource = kirkwood_cpufreq_resources, +}; + +static void __init kirkwood_cpufreq_init(void) +{ + platform_device_register(&kirkwood_cpufreq_device); +} + +static struct resource kirkwood_cpuidle_resource[] = { + { + .flags = IORESOURCE_MEM, + .start = DDR_OPERATION_BASE, + .end = DDR_OPERATION_BASE + 3, + }, +}; + +static struct platform_device kirkwood_cpuidle = { + .name = "kirkwood_cpuidle", + .id = -1, + .resource = kirkwood_cpuidle_resource, + .num_resources = 1, +}; + +static void __init kirkwood_cpuidle_init(void) +{ + platform_device_register(&kirkwood_cpuidle); +} + +/* Temporary here since mach-mvebu has a function we can use */ +static void kirkwood_restart(enum reboot_mode mode, const char *cmd) +{ + /* + * Enable soft reset to assert RSTOUTn. + */ + writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); + + /* + * Assert soft reset. + */ + writel(SOFT_RESET, SYSTEM_SOFT_RESET); + + while (1) + ; +} + +#define MV643XX_ETH_MAC_ADDR_LOW 0x0414 +#define MV643XX_ETH_MAC_ADDR_HIGH 0x0418 + +static void __init kirkwood_dt_eth_fixup(void) +{ + struct device_node *np; + + /* + * The ethernet interfaces forget the MAC address assigned by u-boot + * if the clocks are turned off. Usually, u-boot on kirkwood boards + * has no DT support to properly set local-mac-address property. + * As a workaround, we get the MAC address from mv643xx_eth registers + * and update the port device node if no valid MAC address is set. + */ + for_each_compatible_node(np, NULL, "marvell,kirkwood-eth-port") { + struct device_node *pnp = of_get_parent(np); + struct clk *clk; + struct property *pmac; + void __iomem *io; + u8 *macaddr; + u32 reg; + + if (!pnp) + continue; + + /* skip disabled nodes or nodes with valid MAC address*/ + if (!of_device_is_available(pnp) || of_get_mac_address(np)) + goto eth_fixup_skip; + + clk = of_clk_get(pnp, 0); + if (IS_ERR(clk)) + goto eth_fixup_skip; + + io = of_iomap(pnp, 0); + if (!io) + goto eth_fixup_no_map; + + /* ensure port clock is not gated to not hang CPU */ + clk_prepare_enable(clk); + + /* store MAC address register contents in local-mac-address */ + pr_err(FW_INFO "%s: local-mac-address is not set\n", + np->full_name); + + pmac = kzalloc(sizeof(*pmac) + 6, GFP_KERNEL); + if (!pmac) + goto eth_fixup_no_mem; + + pmac->value = pmac + 1; + pmac->length = 6; + pmac->name = kstrdup("local-mac-address", GFP_KERNEL); + if (!pmac->name) { + kfree(pmac); + goto eth_fixup_no_mem; + } + + macaddr = pmac->value; + reg = readl(io + MV643XX_ETH_MAC_ADDR_HIGH); + macaddr[0] = (reg >> 24) & 0xff; + macaddr[1] = (reg >> 16) & 0xff; + macaddr[2] = (reg >> 8) & 0xff; + macaddr[3] = reg & 0xff; + + reg = readl(io + MV643XX_ETH_MAC_ADDR_LOW); + macaddr[4] = (reg >> 8) & 0xff; + macaddr[5] = reg & 0xff; + + of_update_property(np, pmac); + +eth_fixup_no_mem: + iounmap(io); + clk_disable_unprepare(clk); +eth_fixup_no_map: + clk_put(clk); +eth_fixup_skip: + of_node_put(pnp); + } +} + +/* + * Disable propagation of mbus errors to the CPU local bus, as this + * causes mbus errors (which can occur for example for PCI aborts) to + * throw CPU aborts, which we're not set up to deal with. + */ +static void __init kirkwood_disable_mbus_error_propagation(void) +{ + void __iomem *cpu_config; + + cpu_config = ioremap(CPU_CONFIG_PHYS, 4); + writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config); + iounmap(cpu_config); +} + +static void __init kirkwood_dt_init(void) +{ + kirkwood_disable_mbus_error_propagation(); + + BUG_ON(mvebu_mbus_dt_init(false)); + +#ifdef CONFIG_CACHE_FEROCEON_L2 + feroceon_of_init(); +#endif + kirkwood_cpufreq_init(); + kirkwood_cpuidle_init(); + + kirkwood_pm_init(); + kirkwood_dt_eth_fixup(); + + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +} + +static const char * const kirkwood_dt_board_compat[] = { + "marvell,kirkwood", + NULL +}; + +DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)") + /* Maintainer: Jason Cooper <jason@lakedaemon.net> */ + .map_io = kirkwood_map_io, + .init_machine = kirkwood_dt_init, + .restart = kirkwood_restart, + .dt_compat = kirkwood_dt_board_compat, +MACHINE_END diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index f3248cfbe51..255f33a3903 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -12,42 +12,44 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/serial_8250.h> -#include <linux/mbus.h> #include <linux/ata_platform.h> #include <linux/mtd/nand.h> #include <linux/dma-mapping.h> +#include <linux/clk-provider.h> +#include <linux/spinlock.h> +#include <linux/mv643xx_i2c.h> +#include <linux/timex.h> +#include <linux/kexec.h> +#include <linux/reboot.h> #include <net/dsa.h> #include <asm/page.h> -#include <asm/timex.h> -#include <asm/kexec.h> #include <asm/mach/map.h> #include <asm/mach/time.h> +#include <asm/hardware/cache-feroceon-l2.h> #include <mach/kirkwood.h> #include <mach/bridge-regs.h> -#include <plat/audio.h> -#include <plat/cache-feroceon-l2.h> -#include <plat/mvsdio.h> -#include <plat/orion_nand.h> +#include <linux/platform_data/asoc-kirkwood.h> +#include <linux/platform_data/mmc-mvsdio.h> +#include <linux/platform_data/mtd-orion_nand.h> +#include <linux/platform_data/usb-ehci-orion.h> #include <plat/common.h> #include <plat/time.h> +#include <linux/platform_data/dma-mv_xor.h> #include "common.h" +#include "pm.h" + +/* These can go away once Kirkwood uses the mvebu-mbus DT binding */ +#define KIRKWOOD_MBUS_NAND_TARGET 0x01 +#define KIRKWOOD_MBUS_NAND_ATTR 0x2f +#define KIRKWOOD_MBUS_SRAM_TARGET 0x03 +#define KIRKWOOD_MBUS_SRAM_ATTR 0x01 /***************************************************************************** * I/O Address Mapping ****************************************************************************/ static struct map_desc kirkwood_io_desc[] __initdata = { { - .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE, - .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE), - .length = KIRKWOOD_PCIE_IO_SIZE, - .type = MT_DEVICE, - }, { - .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE, - .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE), - .length = KIRKWOOD_PCIE1_IO_SIZE, - .type = MT_DEVICE, - }, { - .virtual = KIRKWOOD_REGS_VIRT_BASE, + .virtual = (unsigned long) KIRKWOOD_REGS_VIRT_BASE, .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE), .length = KIRKWOOD_REGS_SIZE, .type = MT_DEVICE, @@ -59,22 +61,232 @@ void __init kirkwood_map_io(void) iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc)); } -/* - * Default clock control bits. Any bit _not_ set in this variable - * will be cleared from the hardware after platform devices have been - * registered. Some reserved bits must be set to 1. - */ -unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED; +/***************************************************************************** + * CLK tree + ****************************************************************************/ + +static void enable_sata0(void) +{ + /* Enable PLL and IVREF */ + writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2); + /* Enable PHY */ + writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL); +} + +static void disable_sata0(void) +{ + /* Disable PLL and IVREF */ + writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2); + /* Disable PHY */ + writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL); +} + +static void enable_sata1(void) +{ + /* Enable PLL and IVREF */ + writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2); + /* Enable PHY */ + writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL); +} + +static void disable_sata1(void) +{ + /* Disable PLL and IVREF */ + writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2); + /* Disable PHY */ + writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL); +} + +static void disable_pcie0(void) +{ + writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL); + while (1) + if (readl(PCIE_STATUS) & 0x1) + break; + writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL); +} + +static void disable_pcie1(void) +{ + u32 dev, rev; + + kirkwood_pcie_id(&dev, &rev); + + if (dev == MV88F6282_DEV_ID) { + writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL); + while (1) + if (readl(PCIE1_STATUS) & 0x1) + break; + writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL); + } +} + +/* An extended version of the gated clk. This calls fn_en()/fn_dis + * before enabling/disabling the clock. We use this to turn on/off + * PHYs etc. */ +struct clk_gate_fn { + struct clk_gate gate; + void (*fn_en)(void); + void (*fn_dis)(void); +}; + +#define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate) +#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) + +static int clk_gate_fn_enable(struct clk_hw *hw) +{ + struct clk_gate *gate = to_clk_gate(hw); + struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); + int ret; + + ret = clk_gate_ops.enable(hw); + if (!ret && gate_fn->fn_en) + gate_fn->fn_en(); + + return ret; +} + +static void clk_gate_fn_disable(struct clk_hw *hw) +{ + struct clk_gate *gate = to_clk_gate(hw); + struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); + + if (gate_fn->fn_dis) + gate_fn->fn_dis(); + + clk_gate_ops.disable(hw); +} + +static struct clk_ops clk_gate_fn_ops; + +static struct clk __init *clk_register_gate_fn(struct device *dev, + const char *name, + const char *parent_name, unsigned long flags, + void __iomem *reg, u8 bit_idx, + u8 clk_gate_flags, spinlock_t *lock, + void (*fn_en)(void), void (*fn_dis)(void)) +{ + struct clk_gate_fn *gate_fn; + struct clk *clk; + struct clk_init_data init; + + gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL); + if (!gate_fn) { + pr_err("%s: could not allocate gated clk\n", __func__); + return ERR_PTR(-ENOMEM); + } + + init.name = name; + init.ops = &clk_gate_fn_ops; + init.flags = flags; + init.parent_names = (parent_name ? &parent_name : NULL); + init.num_parents = (parent_name ? 1 : 0); + + /* struct clk_gate assignments */ + gate_fn->gate.reg = reg; + gate_fn->gate.bit_idx = bit_idx; + gate_fn->gate.flags = clk_gate_flags; + gate_fn->gate.lock = lock; + gate_fn->gate.hw.init = &init; + gate_fn->fn_en = fn_en; + gate_fn->fn_dis = fn_dis; + + /* ops is the gate ops, but with our enable/disable functions */ + if (clk_gate_fn_ops.enable != clk_gate_fn_enable || + clk_gate_fn_ops.disable != clk_gate_fn_disable) { + clk_gate_fn_ops = clk_gate_ops; + clk_gate_fn_ops.enable = clk_gate_fn_enable; + clk_gate_fn_ops.disable = clk_gate_fn_disable; + } + + clk = clk_register(dev, &gate_fn->gate.hw); + + if (IS_ERR(clk)) + kfree(gate_fn); + + return clk; +} + +static DEFINE_SPINLOCK(gating_lock); +static struct clk *tclk; + +static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx) +{ + return clk_register_gate(NULL, name, "tclk", 0, CLOCK_GATING_CTRL, + bit_idx, 0, &gating_lock); +} + +static struct clk __init *kirkwood_register_gate_fn(const char *name, + u8 bit_idx, + void (*fn_en)(void), + void (*fn_dis)(void)) +{ + return clk_register_gate_fn(NULL, name, "tclk", 0, CLOCK_GATING_CTRL, + bit_idx, 0, &gating_lock, fn_en, fn_dis); +} +static struct clk *ge0, *ge1; + +void __init kirkwood_clk_init(void) +{ + struct clk *runit, *sata0, *sata1, *usb0, *sdio; + struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio; + + tclk = clk_register_fixed_rate(NULL, "tclk", NULL, + CLK_IS_ROOT, kirkwood_tclk); + + runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT); + ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0); + ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1); + sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0, + enable_sata0, disable_sata0); + sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1, + enable_sata1, disable_sata1); + usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0); + sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO); + crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO); + xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0); + xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1); + pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0, + NULL, disable_pcie0); + pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1, + NULL, disable_pcie1); + audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO); + kirkwood_register_gate("tdm", CGC_BIT_TDM); + kirkwood_register_gate("tsu", CGC_BIT_TSU); + + /* clkdev entries, mapping clks to devices */ + orion_clkdev_add(NULL, "orion_spi.0", runit); + orion_clkdev_add(NULL, "orion_spi.1", runit); + orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0); + orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1); + orion_clkdev_add(NULL, "orion_wdt", tclk); + orion_clkdev_add("0", "sata_mv.0", sata0); + orion_clkdev_add("1", "sata_mv.0", sata1); + orion_clkdev_add(NULL, "orion-ehci.0", usb0); + orion_clkdev_add(NULL, "orion_nand", runit); + orion_clkdev_add(NULL, "mvsdio", sdio); + orion_clkdev_add(NULL, "mv_crypto", crypto); + orion_clkdev_add(NULL, MV_XOR_NAME ".0", xor0); + orion_clkdev_add(NULL, MV_XOR_NAME ".1", xor1); + orion_clkdev_add("0", "pcie", pex0); + orion_clkdev_add("1", "pcie", pex1); + orion_clkdev_add(NULL, "mvebu-audio", audio); + orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit); + orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".1", runit); + + /* Marvell says runit is used by SPI, UART, NAND, TWSI, ..., + * so should never be gated. + */ + clk_prepare_enable(runit); +} /***************************************************************************** * EHCI0 ****************************************************************************/ void __init kirkwood_ehci_init(void) { - kirkwood_clk_ctrl |= CGC_USB0; - orion_ehci_init(&kirkwood_mbus_dram_info, - USB_PHYS_BASE, IRQ_KIRKWOOD_USB); + orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA); } @@ -83,11 +295,12 @@ void __init kirkwood_ehci_init(void) ****************************************************************************/ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data) { - kirkwood_clk_ctrl |= CGC_GE0; - - orion_ge00_init(eth_data, &kirkwood_mbus_dram_info, + orion_ge00_init(eth_data, GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, - IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk); + IRQ_KIRKWOOD_GE00_ERR, 1600); + /* The interface forgets the MAC address assigned by u-boot if + the clock is turned off, so claim the clk now. */ + clk_prepare_enable(ge0); } @@ -96,12 +309,10 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data) ****************************************************************************/ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data) { - - kirkwood_clk_ctrl |= CGC_GE1; - - orion_ge01_init(eth_data, &kirkwood_mbus_dram_info, + orion_ge01_init(eth_data, GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, - IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk); + IRQ_KIRKWOOD_GE01_ERR, 1600); + clk_prepare_enable(ge1); } @@ -143,7 +354,6 @@ static struct platform_device kirkwood_nand_flash = { void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int chip_delay) { - kirkwood_clk_ctrl |= CGC_RUNIT; kirkwood_nand_data.parts = parts; kirkwood_nand_data.nr_parts = nr_parts; kirkwood_nand_data.chip_delay = chip_delay; @@ -153,7 +363,6 @@ void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *)) { - kirkwood_clk_ctrl |= CGC_RUNIT; kirkwood_nand_data.parts = parts; kirkwood_nand_data.nr_parts = nr_parts; kirkwood_nand_data.dev_ready = dev_ready; @@ -174,12 +383,7 @@ static void __init kirkwood_rtc_init(void) ****************************************************************************/ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data) { - kirkwood_clk_ctrl |= CGC_SATA0; - if (sata_data->n_ports > 1) - kirkwood_clk_ctrl |= CGC_SATA1; - - orion_sata_init(sata_data, &kirkwood_mbus_dram_info, - SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA); + orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA); } @@ -221,8 +425,6 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data) mvsdio_data->clock = 100000000; else mvsdio_data->clock = 200000000; - mvsdio_data->dram = &kirkwood_mbus_dram_info; - kirkwood_clk_ctrl |= CGC_SDIO; kirkwood_sdio.dev.platform_data = mvsdio_data; platform_device_register(&kirkwood_sdio); } @@ -231,10 +433,9 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data) /***************************************************************************** * SPI ****************************************************************************/ -void __init kirkwood_spi_init() +void __init kirkwood_spi_init(void) { - kirkwood_clk_ctrl |= CGC_RUNIT; - orion_spi_init(SPI_PHYS_BASE, kirkwood_tclk); + orion_spi_init(SPI_PHYS_BASE); } @@ -254,7 +455,7 @@ void __init kirkwood_i2c_init(void) void __init kirkwood_uart0_init(void) { orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE, - IRQ_KIRKWOOD_UART_0, kirkwood_tclk); + IRQ_KIRKWOOD_UART_0, tclk); } @@ -264,7 +465,7 @@ void __init kirkwood_uart0_init(void) void __init kirkwood_uart1_init(void) { orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE, - IRQ_KIRKWOOD_UART_1, kirkwood_tclk); + IRQ_KIRKWOOD_UART_1, tclk); } /***************************************************************************** @@ -272,7 +473,6 @@ void __init kirkwood_uart1_init(void) ****************************************************************************/ void __init kirkwood_crypto_init(void) { - kirkwood_clk_ctrl |= CGC_CRYPTO; orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO); } @@ -281,12 +481,9 @@ void __init kirkwood_crypto_init(void) /***************************************************************************** * XOR0 ****************************************************************************/ -static void __init kirkwood_xor0_init(void) +void __init kirkwood_xor0_init(void) { - kirkwood_clk_ctrl |= CGC_XOR0; - - orion_xor0_init(&kirkwood_mbus_dram_info, - XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE, + orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE, IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01); } @@ -294,10 +491,8 @@ static void __init kirkwood_xor0_init(void) /***************************************************************************** * XOR1 ****************************************************************************/ -static void __init kirkwood_xor1_init(void) +void __init kirkwood_xor1_init(void) { - kirkwood_clk_ctrl |= CGC_XOR1; - orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE, IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11); } @@ -306,11 +501,33 @@ static void __init kirkwood_xor1_init(void) /***************************************************************************** * Watchdog ****************************************************************************/ -static void __init kirkwood_wdt_init(void) +void __init kirkwood_wdt_init(void) { - orion_wdt_init(kirkwood_tclk); + orion_wdt_init(); } +/***************************************************************************** + * CPU idle + ****************************************************************************/ +static struct resource kirkwood_cpuidle_resource[] = { + { + .flags = IORESOURCE_MEM, + .start = DDR_OPERATION_BASE, + .end = DDR_OPERATION_BASE + 3, + }, +}; + +static struct platform_device kirkwood_cpuidle = { + .name = "kirkwood_cpuidle", + .id = -1, + .resource = kirkwood_cpuidle_resource, + .num_resources = 1, +}; + +void __init kirkwood_cpuidle_init(void) +{ + platform_device_register(&kirkwood_cpuidle); +} /***************************************************************************** * Time handling @@ -335,7 +552,7 @@ static int __init kirkwood_find_tclk(void) return 166666667; } -static void __init kirkwood_timer_init(void) +void __init kirkwood_timer_init(void) { kirkwood_tclk = kirkwood_find_tclk(); @@ -343,14 +560,10 @@ static void __init kirkwood_timer_init(void) IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); } -struct sys_timer kirkwood_timer = { - .init = kirkwood_timer_init, -}; - /***************************************************************************** * Audio ****************************************************************************/ -static struct resource kirkwood_i2s_resources[] = { +static struct resource kirkwood_audio_resources[] = { [0] = { .start = AUDIO_PHYS_BASE, .end = AUDIO_PHYS_BASE + SZ_16K - 1, @@ -363,31 +576,46 @@ static struct resource kirkwood_i2s_resources[] = { }, }; -static struct kirkwood_asoc_platform_data kirkwood_i2s_data = { - .dram = &kirkwood_mbus_dram_info, +static struct kirkwood_asoc_platform_data kirkwood_audio_data = { .burst = 128, }; -static struct platform_device kirkwood_i2s_device = { - .name = "kirkwood-i2s", +static struct platform_device kirkwood_audio_device = { + .name = "mvebu-audio", .id = -1, - .num_resources = ARRAY_SIZE(kirkwood_i2s_resources), - .resource = kirkwood_i2s_resources, + .num_resources = ARRAY_SIZE(kirkwood_audio_resources), + .resource = kirkwood_audio_resources, .dev = { - .platform_data = &kirkwood_i2s_data, + .platform_data = &kirkwood_audio_data, }, }; -static struct platform_device kirkwood_pcm_device = { - .name = "kirkwood-pcm-audio", +void __init kirkwood_audio_init(void) +{ + platform_device_register(&kirkwood_audio_device); +} + +/***************************************************************************** + * CPU Frequency + ****************************************************************************/ +static struct resource kirkwood_cpufreq_resources[] = { + [0] = { + .start = CPU_CONTROL_PHYS, + .end = CPU_CONTROL_PHYS + 3, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device kirkwood_cpufreq_device = { + .name = "kirkwood-cpufreq", .id = -1, + .num_resources = ARRAY_SIZE(kirkwood_cpufreq_resources), + .resource = kirkwood_cpufreq_resources, }; -void __init kirkwood_audio_init(void) +void __init kirkwood_cpufreq_init(void) { - kirkwood_clk_ctrl |= CGC_AUDIO; - platform_device_register(&kirkwood_i2s_device); - platform_device_register(&kirkwood_pcm_device); + platform_device_register(&kirkwood_cpufreq_device); } /***************************************************************************** @@ -396,7 +624,7 @@ void __init kirkwood_audio_init(void) /* * Identify device ID and revision. */ -static char * __init kirkwood_id(void) +char * __init kirkwood_id(void) { u32 dev, rev; @@ -430,6 +658,8 @@ static char * __init kirkwood_id(void) } else if (dev == MV88F6282_DEV_ID) { if (rev == MV88F6282_REV_A0) return "MV88F6282-Rev-A0"; + else if (rev == MV88F6282_REV_A1) + return "MV88F6282-Rev-A1"; else return "MV88F6282-Rev-Unsupported"; } else { @@ -437,8 +667,21 @@ static char * __init kirkwood_id(void) } } -static void __init kirkwood_l2_init(void) +void __init kirkwood_setup_wins(void) { + mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_NAND_TARGET, + KIRKWOOD_MBUS_NAND_ATTR, + KIRKWOOD_NAND_MEM_PHYS_BASE, + KIRKWOOD_NAND_MEM_SIZE); + mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_SRAM_TARGET, + KIRKWOOD_MBUS_SRAM_ATTR, + KIRKWOOD_SRAM_PHYS_BASE, + KIRKWOOD_SRAM_SIZE); +} + +void __init kirkwood_l2_init(void) +{ +#ifdef CONFIG_CACHE_FEROCEON_L2 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG); feroceon_l2_init(1); @@ -446,13 +689,12 @@ static void __init kirkwood_l2_init(void) writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG); feroceon_l2_init(0); #endif +#endif } void __init kirkwood_init(void) { - printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n", - kirkwood_id(), kirkwood_tclk); - kirkwood_i2s_data.tclk = kirkwood_tclk; + pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk); /* * Disable propagation of mbus errors to the CPU local bus, @@ -462,11 +704,16 @@ void __init kirkwood_init(void) */ writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG); - kirkwood_setup_cpu_mbus(); + BUG_ON(mvebu_mbus_init("marvell,kirkwood-mbus", + BRIDGE_WINS_BASE, BRIDGE_WINS_SZ, + DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ)); + + kirkwood_setup_wins(); -#ifdef CONFIG_CACHE_FEROCEON_L2 kirkwood_l2_init(); -#endif + + /* Setup root of clk tree */ + kirkwood_clk_init(); /* internal devices that every board has */ kirkwood_rtc_init(); @@ -475,62 +722,25 @@ void __init kirkwood_init(void) kirkwood_xor1_init(); kirkwood_crypto_init(); -#ifdef CONFIG_KEXEC + kirkwood_pm_init(); + kirkwood_cpuidle_init(); +#ifdef CONFIG_KEXEC kexec_reinit = kirkwood_enable_pcie; #endif } -static int __init kirkwood_clock_gate(void) +void kirkwood_restart(enum reboot_mode mode, const char *cmd) { - unsigned int curr = readl(CLOCK_GATING_CTRL); - u32 dev, rev; + /* + * Enable soft reset to assert RSTOUTn. + */ + writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); - kirkwood_pcie_id(&dev, &rev); - printk(KERN_DEBUG "Gating clock of unused units\n"); - printk(KERN_DEBUG "before: 0x%08x\n", curr); - - /* Make sure those units are accessible */ - writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL); - - /* For SATA: first shutdown the phy */ - if (!(kirkwood_clk_ctrl & CGC_SATA0)) { - /* Disable PLL and IVREF */ - writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2); - /* Disable PHY */ - writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL); - } - if (!(kirkwood_clk_ctrl & CGC_SATA1)) { - /* Disable PLL and IVREF */ - writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2); - /* Disable PHY */ - writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL); - } - - /* For PCIe: first shutdown the phy */ - if (!(kirkwood_clk_ctrl & CGC_PEX0)) { - writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL); - while (1) - if (readl(PCIE_STATUS) & 0x1) - break; - writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL); - } + /* + * Assert soft reset. + */ + writel(SOFT_RESET, SYSTEM_SOFT_RESET); - /* For PCIe 1: first shutdown the phy */ - if (dev == MV88F6282_DEV_ID) { - if (!(kirkwood_clk_ctrl & CGC_PEX1)) { - writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL); - while (1) - if (readl(PCIE1_STATUS) & 0x1) - break; - writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL); - } - } else /* keep this bit set for devices that don't have PCIe1 */ - kirkwood_clk_ctrl |= CGC_PEX1; - - /* Now gate clock the required units */ - writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL); - printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL)); - - return 0; -} -late_initcall(kirkwood_clock_gate); + while (1) + ; +} diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h index b9b0f0968a3..832a4e2ab8d 100644 --- a/arch/arm/mach-kirkwood/common.h +++ b/arch/arm/mach-kirkwood/common.h @@ -11,6 +11,8 @@ #ifndef __ARCH_KIRKWOOD_COMMON_H #define __ARCH_KIRKWOOD_COMMON_H +#include <linux/reboot.h> + struct dsa_platform_data; struct mv643xx_eth_platform_data; struct mv_sata_platform_data; @@ -30,8 +32,7 @@ void kirkwood_init(void); void kirkwood_init_early(void); void kirkwood_init_irq(void); -extern struct mbus_dram_target_info kirkwood_mbus_dram_info; -void kirkwood_setup_cpu_mbus(void); +void kirkwood_setup_wins(void); void kirkwood_enable_pcie(void); void kirkwood_pcie_id(u32 *dev, u32 *rev); @@ -48,11 +49,25 @@ void kirkwood_i2c_init(void); void kirkwood_uart0_init(void); void kirkwood_uart1_init(void); void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); -void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *)); +void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, + int (*dev_ready)(struct mtd_info *)); void kirkwood_audio_init(void); +void kirkwood_cpuidle_init(void); +void kirkwood_cpufreq_init(void); + +void kirkwood_restart(enum reboot_mode, const char *); +void kirkwood_clk_init(void); + +/* early init functions not converted to fdt yet */ +char *kirkwood_id(void); +void kirkwood_l2_init(void); +void kirkwood_wdt_init(void); +void kirkwood_xor0_init(void); +void kirkwood_xor1_init(void); +void kirkwood_crypto_init(void); extern int kirkwood_tclk; -extern struct sys_timer kirkwood_timer; +extern void kirkwood_timer_init(void); #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c deleted file mode 100644 index f68d33f1f39..00000000000 --- a/arch/arm/mach-kirkwood/cpuidle.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * arch/arm/mach-kirkwood/cpuidle.c - * - * CPU idle Marvell Kirkwood SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - * - * The cpu idle uses wait-for-interrupt and DDR self refresh in order - * to implement two idle states - - * #1 wait-for-interrupt - * #2 wait-for-interrupt and DDR self refresh - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/cpuidle.h> -#include <linux/io.h> -#include <asm/proc-fns.h> -#include <mach/kirkwood.h> - -#define KIRKWOOD_MAX_STATES 2 - -static struct cpuidle_driver kirkwood_idle_driver = { - .name = "kirkwood_idle", - .owner = THIS_MODULE, -}; - -static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device); - -/* Actual code that puts the SoC in different idle states */ -static int kirkwood_enter_idle(struct cpuidle_device *dev, - struct cpuidle_state *state) -{ - struct timeval before, after; - int idle_time; - - local_irq_disable(); - do_gettimeofday(&before); - if (state == &dev->states[0]) - /* Wait for interrupt state */ - cpu_do_idle(); - else if (state == &dev->states[1]) { - /* - * Following write will put DDR in self refresh. - * Note that we have 256 cycles before DDR puts it - * self in self-refresh, so the wait-for-interrupt - * call afterwards won't get the DDR from self refresh - * mode. - */ - writel(0x7, DDR_OPERATION_BASE); - cpu_do_idle(); - } - do_gettimeofday(&after); - local_irq_enable(); - idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + - (after.tv_usec - before.tv_usec); - return idle_time; -} - -/* Initialize CPU idle by registering the idle states */ -static int kirkwood_init_cpuidle(void) -{ - struct cpuidle_device *device; - - cpuidle_register_driver(&kirkwood_idle_driver); - - device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id()); - device->state_count = KIRKWOOD_MAX_STATES; - - /* Wait for interrupt state */ - device->states[0].enter = kirkwood_enter_idle; - device->states[0].exit_latency = 1; - device->states[0].target_residency = 10000; - device->states[0].flags = CPUIDLE_FLAG_TIME_VALID; - strcpy(device->states[0].name, "WFI"); - strcpy(device->states[0].desc, "Wait for interrupt"); - - /* Wait for interrupt and DDR self refresh state */ - device->states[1].enter = kirkwood_enter_idle; - device->states[1].exit_latency = 10; - device->states[1].target_residency = 10000; - device->states[1].flags = CPUIDLE_FLAG_TIME_VALID; - strcpy(device->states[1].name, "DDR SR"); - strcpy(device->states[1].desc, "WFI and DDR Self Refresh"); - - if (cpuidle_register_device(device)) { - printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n"); - return -EIO; - } - return 0; -} - -device_initcall(kirkwood_init_cpuidle); diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c index f457e07a65f..453418063c1 100644 --- a/arch/arm/mach-kirkwood/d2net_v2-setup.c +++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c @@ -32,7 +32,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <mach/kirkwood.h> -#include <mach/leds-ns2.h> +#include <linux/platform_data/leds-kirkwood-ns2.h> #include "common.h" #include "mpp.h" #include "lacie_v2-common.h" @@ -226,5 +226,6 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c deleted file mode 100644 index ff4c21c1f92..00000000000 --- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * arch/arm/mach-kirkwood/db88f6281-bp-setup.c - * - * Marvell DB-88F6281-BP Development Board Setup - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/mtd/partitions.h> -#include <linux/ata_platform.h> -#include <linux/mv643xx_eth.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <mach/kirkwood.h> -#include <plat/mvsdio.h> -#include "common.h" -#include "mpp.h" - -static struct mtd_partition db88f6281_nand_parts[] = { - { - .name = "u-boot", - .offset = 0, - .size = SZ_1M - }, { - .name = "uImage", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_4M - }, { - .name = "root", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL - }, -}; - -static struct mv643xx_eth_platform_data db88f6281_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -static struct mv_sata_platform_data db88f6281_sata_data = { - .n_ports = 2, -}; - -static struct mvsdio_platform_data db88f6281_mvsdio_data = { - .gpio_write_protect = 37, - .gpio_card_detect = 38, -}; - -static unsigned int db88f6281_mpp_config[] __initdata = { - MPP0_NF_IO2, - MPP1_NF_IO3, - MPP2_NF_IO4, - MPP3_NF_IO5, - MPP4_NF_IO6, - MPP5_NF_IO7, - MPP18_NF_IO0, - MPP19_NF_IO1, - MPP37_GPIO, - MPP38_GPIO, - 0 -}; - -static void __init db88f6281_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_init(); - kirkwood_mpp_conf(db88f6281_mpp_config); - - kirkwood_nand_init(ARRAY_AND_SIZE(db88f6281_nand_parts), 25); - kirkwood_ehci_init(); - kirkwood_ge00_init(&db88f6281_ge00_data); - kirkwood_sata_init(&db88f6281_sata_data); - kirkwood_uart0_init(); - kirkwood_sdio_init(&db88f6281_mvsdio_data); -} - -static int __init db88f6281_pci_init(void) -{ - if (machine_is_db88f6281_bp()) { - u32 dev, rev; - - kirkwood_pcie_id(&dev, &rev); - if (dev == MV88F6282_DEV_ID) - kirkwood_pcie_init(KW_PCIE1 | KW_PCIE0); - else - kirkwood_pcie_init(KW_PCIE0); - } - return 0; -} -subsys_initcall(db88f6281_pci_init); - -MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board") - /* Maintainer: Saeed Bishara <saeed@marvell.com> */ - .atag_offset = 0x100, - .init_machine = db88f6281_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, -MACHINE_END diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c deleted file mode 100644 index e4d199b2b1e..00000000000 --- a/arch/arm/mach-kirkwood/dockstar-setup.c +++ /dev/null @@ -1,111 +0,0 @@ -/* - * arch/arm/mach-kirkwood/dockstar-setup.c - * - * Seagate FreeAgent DockStar Setup - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/ata_platform.h> -#include <linux/mtd/partitions.h> -#include <linux/mv643xx_eth.h> -#include <linux/gpio.h> -#include <linux/leds.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <mach/kirkwood.h> -#include <plat/mvsdio.h> -#include "common.h" -#include "mpp.h" - -static struct mtd_partition dockstar_nand_parts[] = { - { - .name = "u-boot", - .offset = 0, - .size = SZ_1M - }, { - .name = "uImage", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_4M - }, { - .name = "root", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL - }, -}; - -static struct mv643xx_eth_platform_data dockstar_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(0), -}; - -static struct gpio_led dockstar_led_pins[] = { - { - .name = "dockstar:green:health", - .default_trigger = "default-on", - .gpio = 46, - .active_low = 1, - }, - { - .name = "dockstar:orange:misc", - .default_trigger = "none", - .gpio = 47, - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data dockstar_led_data = { - .leds = dockstar_led_pins, - .num_leds = ARRAY_SIZE(dockstar_led_pins), -}; - -static struct platform_device dockstar_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &dockstar_led_data, - } -}; - -static unsigned int dockstar_mpp_config[] __initdata = { - MPP29_GPIO, /* USB Power Enable */ - MPP46_GPIO, /* LED green */ - MPP47_GPIO, /* LED orange */ - 0 -}; - -static void __init dockstar_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_init(); - - /* setup gpio pin select */ - kirkwood_mpp_conf(dockstar_mpp_config); - - kirkwood_uart0_init(); - kirkwood_nand_init(ARRAY_AND_SIZE(dockstar_nand_parts), 25); - - if (gpio_request(29, "USB Power Enable") != 0 || - gpio_direction_output(29, 1) != 0) - printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n"); - kirkwood_ehci_init(); - - kirkwood_ge00_init(&dockstar_ge00_data); - - platform_device_register(&dockstar_leds); -} - -MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar") - .atag_offset = 0x100, - .init_machine = dockstar_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, -MACHINE_END diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c deleted file mode 100644 index 6c40f784b51..00000000000 --- a/arch/arm/mach-kirkwood/guruplug-setup.c +++ /dev/null @@ -1,130 +0,0 @@ -/* - * arch/arm/mach-kirkwood/guruplug-setup.c - * - * Marvell GuruPlug Reference Board Setup - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/mtd/partitions.h> -#include <linux/ata_platform.h> -#include <linux/mv643xx_eth.h> -#include <linux/gpio.h> -#include <linux/leds.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <mach/kirkwood.h> -#include <plat/mvsdio.h> -#include "common.h" -#include "mpp.h" - -static struct mtd_partition guruplug_nand_parts[] = { - { - .name = "u-boot", - .offset = 0, - .size = SZ_1M - }, { - .name = "uImage", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_4M - }, { - .name = "root", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL - }, -}; - -static struct mv643xx_eth_platform_data guruplug_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(0), -}; - -static struct mv643xx_eth_platform_data guruplug_ge01_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(1), -}; - -static struct mv_sata_platform_data guruplug_sata_data = { - .n_ports = 1, -}; - -static struct mvsdio_platform_data guruplug_mvsdio_data = { - /* unfortunately the CD signal has not been connected */ -}; - -static struct gpio_led guruplug_led_pins[] = { - { - .name = "guruplug:red:health", - .gpio = 46, - .active_low = 1, - }, - { - .name = "guruplug:green:health", - .gpio = 47, - .active_low = 1, - }, - { - .name = "guruplug:red:wmode", - .gpio = 48, - .active_low = 1, - }, - { - .name = "guruplug:green:wmode", - .gpio = 49, - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data guruplug_led_data = { - .leds = guruplug_led_pins, - .num_leds = ARRAY_SIZE(guruplug_led_pins), -}; - -static struct platform_device guruplug_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &guruplug_led_data, - } -}; - -static unsigned int guruplug_mpp_config[] __initdata = { - MPP46_GPIO, /* M_RLED */ - MPP47_GPIO, /* M_GLED */ - MPP48_GPIO, /* B_RLED */ - MPP49_GPIO, /* B_GLED */ - 0 -}; - -static void __init guruplug_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_init(); - kirkwood_mpp_conf(guruplug_mpp_config); - - kirkwood_uart0_init(); - kirkwood_nand_init(ARRAY_AND_SIZE(guruplug_nand_parts), 25); - - kirkwood_ehci_init(); - kirkwood_ge00_init(&guruplug_ge00_data); - kirkwood_ge01_init(&guruplug_ge01_data); - kirkwood_sata_init(&guruplug_sata_data); - kirkwood_sdio_init(&guruplug_mvsdio_data); - - platform_device_register(&guruplug_leds); -} - -MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board") - /* Maintainer: Siddarth Gore <gores@marvell.com> */ - .atag_offset = 0x100, - .init_machine = guruplug_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, -MACHINE_END diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h index 957bd7997d7..1c37082c8b3 100644 --- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h +++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h @@ -13,36 +13,54 @@ #include <mach/kirkwood.h> -#define CPU_CONFIG (BRIDGE_VIRT_BASE | 0x0100) +#define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0100) +#define CPU_CONFIG_PHYS (BRIDGE_PHYS_BASE + 0x0100) #define CPU_CONFIG_ERROR_PROP 0x00000004 -#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) +#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) +#define CPU_CONTROL_PHYS (BRIDGE_PHYS_BASE + 0x0104) #define CPU_RESET 0x00000002 -#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) -#define WDT_RESET_OUT_EN 0x00000002 +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) +#define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108) #define SOFT_RESET_OUT_EN 0x00000004 -#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) #define SOFT_RESET 0x00000001 -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) -#define WDT_INT_REQ 0x0008 +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110) #define BRIDGE_INT_TIMER1_CLR (~0x0004) -#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) #define IRQ_CAUSE_LOW_OFF 0x0000 #define IRQ_MASK_LOW_OFF 0x0004 #define IRQ_CAUSE_HIGH_OFF 0x0010 #define IRQ_MASK_HIGH_OFF 0x0014 -#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) +#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300) -#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) +#define L2_CONFIG_REG (BRIDGE_VIRT_BASE + 0x0128) #define L2_WRITETHROUGH 0x00000010 -#define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE | 0x11c) +#define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE + 0x11c) +#define CGC_BIT_GE0 (0) +#define CGC_BIT_PEX0 (2) +#define CGC_BIT_USB0 (3) +#define CGC_BIT_SDIO (4) +#define CGC_BIT_TSU (5) +#define CGC_BIT_DUNIT (6) +#define CGC_BIT_RUNIT (7) +#define CGC_BIT_XOR0 (8) +#define CGC_BIT_AUDIO (9) +#define CGC_BIT_SATA0 (14) +#define CGC_BIT_SATA1 (15) +#define CGC_BIT_XOR1 (16) +#define CGC_BIT_CRYPTO (17) +#define CGC_BIT_PEX1 (18) +#define CGC_BIT_GE1 (19) +#define CGC_BIT_TDM (20) #define CGC_GE0 (1 << 0) #define CGC_PEX0 (1 << 2) #define CGC_USB0 (1 << 3) @@ -52,6 +70,7 @@ #define CGC_RUNIT (1 << 7) #define CGC_XOR0 (1 << 8) #define CGC_AUDIO (1 << 9) +#define CGC_POWERSAVE (1 << 11) #define CGC_SATA0 (1 << 14) #define CGC_SATA1 (1 << 15) #define CGC_XOR1 (1 << 16) @@ -61,4 +80,7 @@ #define CGC_TDM (1 << 20) #define CGC_RESERVED (0x6 << 21) +#define MEMORY_PM_CTRL (BRIDGE_VIRT_BASE + 0x118) +#define MEMORY_PM_CTRL_PHYS (BRIDGE_PHYS_BASE + 0x118) + #endif diff --git a/arch/arm/mach-kirkwood/include/mach/debug-macro.S b/arch/arm/mach-kirkwood/include/mach/debug-macro.S deleted file mode 100644 index f785d401a60..00000000000 --- a/arch/arm/mach-kirkwood/include/mach/debug-macro.S +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/debug-macro.S - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <mach/bridge-regs.h> - - .macro addruart, rp, rv, tmp - ldr \rp, =KIRKWOOD_REGS_PHYS_BASE - ldr \rv, =KIRKWOOD_REGS_VIRT_BASE - orr \rp, \rp, #0x00012000 - orr \rv, \rv, #0x00012000 - .endm - -#define UART_SHIFT 2 -#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S index 8939d36f893..82db29f7af8 100644 --- a/arch/arm/mach-kirkwood/include/mach/entry-macro.S +++ b/arch/arm/mach-kirkwood/include/mach/entry-macro.S @@ -10,12 +10,6 @@ #include <mach/bridge-regs.h> - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_preamble, base, tmp ldr \base, =IRQ_VIRT_BASE .endm diff --git a/arch/arm/mach-kirkwood/include/mach/gpio.h b/arch/arm/mach-kirkwood/include/mach/gpio.h deleted file mode 100644 index 84f340b546c..00000000000 --- a/arch/arm/mach-kirkwood/include/mach/gpio.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * arch/asm-arm/mach-kirkwood/include/mach/gpio.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <plat/gpio.h> diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h deleted file mode 100644 index 1aaddc364f2..00000000000 --- a/arch/arm/mach-kirkwood/include/mach/io.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/io.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include "kirkwood.h" - -#define IO_SPACE_LIMIT 0xffffffff - -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_BUS_BASE) - + KIRKWOOD_PCIE_IO_VIRT_BASE); -} - -static inline void __iomem * -__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype) -{ - void __iomem *retval; - unsigned long offs = paddr - KIRKWOOD_REGS_PHYS_BASE; - if (mtype == MT_DEVICE && size && offs < KIRKWOOD_REGS_SIZE && - size <= KIRKWOOD_REGS_SIZE && offs + size <= KIRKWOOD_REGS_SIZE) { - retval = (void __iomem *)KIRKWOOD_REGS_VIRT_BASE + offs; - } else { - retval = __arm_ioremap(paddr, size, mtype); - } - - return retval; -} - -static inline void -__arch_iounmap(void __iomem *addr) -{ - if (addr < (void __iomem *)KIRKWOOD_REGS_VIRT_BASE || - addr >= (void __iomem *)(KIRKWOOD_REGS_VIRT_BASE + KIRKWOOD_REGS_SIZE)) - __iounmap(addr); -} - -#define __arch_ioremap __arch_ioremap -#define __arch_iounmap __arch_iounmap -#define __io(a) __io(a) -#define __mem_pci(a) (a) - - -#endif diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h index 010bdeb4ac5..92976cef391 100644 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h @@ -37,17 +37,15 @@ #define KIRKWOOD_NAND_MEM_SIZE SZ_1K #define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000 -#define KIRKWOOD_PCIE1_IO_VIRT_BASE 0xfef00000 -#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00100000 -#define KIRKWOOD_PCIE1_IO_SIZE SZ_1M +#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00010000 +#define KIRKWOOD_PCIE1_IO_SIZE SZ_64K #define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000 -#define KIRKWOOD_PCIE_IO_VIRT_BASE 0xfee00000 #define KIRKWOOD_PCIE_IO_BUS_BASE 0x00000000 -#define KIRKWOOD_PCIE_IO_SIZE SZ_1M +#define KIRKWOOD_PCIE_IO_SIZE SZ_64K #define KIRKWOOD_REGS_PHYS_BASE 0xf1000000 -#define KIRKWOOD_REGS_VIRT_BASE 0xfed00000 +#define KIRKWOOD_REGS_VIRT_BASE IOMEM(0xfed00000) #define KIRKWOOD_REGS_SIZE SZ_1M #define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000 @@ -61,60 +59,65 @@ /* * Register Map */ -#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000) -#define DDR_WINDOW_CPU_BASE (DDR_VIRT_BASE | 0x1500) -#define DDR_OPERATION_BASE (DDR_VIRT_BASE | 0x1418) - -#define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x10000) -#define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x10000) -#define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE | 0x0030) -#define DEVICE_ID (DEV_BUS_VIRT_BASE | 0x0034) -#define GPIO_LOW_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x0100) -#define GPIO_HIGH_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x0140) -#define RTC_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x0300) -#define SPI_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x0600) -#define I2C_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1000) -#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) -#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000) -#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) -#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) - -#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) - -#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x30000) - -#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000) -#define PCIE_LINK_CTRL (PCIE_VIRT_BASE | 0x70) -#define PCIE_STATUS (PCIE_VIRT_BASE | 0x1a04) -#define PCIE1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x44000) -#define PCIE1_LINK_CTRL (PCIE1_VIRT_BASE | 0x70) -#define PCIE1_STATUS (PCIE1_VIRT_BASE | 0x1a04) - -#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000) - -#define XOR0_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60800) -#define XOR0_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60800) -#define XOR1_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60900) -#define XOR1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60900) -#define XOR0_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60A00) -#define XOR0_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60A00) -#define XOR1_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60B00) -#define XOR1_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60B00) - -#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x70000) -#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000) - -#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000) -#define SATA_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x80000) -#define SATA0_IF_CTRL (SATA_VIRT_BASE | 0x2050) -#define SATA0_PHY_MODE_2 (SATA_VIRT_BASE | 0x2330) -#define SATA1_IF_CTRL (SATA_VIRT_BASE | 0x4050) -#define SATA1_PHY_MODE_2 (SATA_VIRT_BASE | 0x4330) - -#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000) - -#define AUDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0xA0000) -#define AUDIO_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0xA0000) +#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x00000) +#define DDR_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x00000) +#define DDR_WINDOW_CPU_BASE (DDR_PHYS_BASE + 0x1500) +#define DDR_WINDOW_CPU_SZ (0x20) +#define DDR_OPERATION_BASE (DDR_PHYS_BASE + 0x1418) + +#define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x10000) +#define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x10000) +#define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE + 0x0030) +#define DEVICE_ID (DEV_BUS_VIRT_BASE + 0x0034) +#define GPIO_LOW_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0100) +#define GPIO_HIGH_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0140) +#define RTC_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x0300) +#define SPI_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x0600) +#define I2C_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x1000) +#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2000) +#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2000) +#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2100) +#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2100) + +#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x20000) +#define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x20000) +#define BRIDGE_WINS_BASE (BRIDGE_PHYS_BASE) +#define BRIDGE_WINS_SZ (0x80) + +#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x30000) + +#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x40000) +#define PCIE_LINK_CTRL (PCIE_VIRT_BASE + 0x70) +#define PCIE_STATUS (PCIE_VIRT_BASE + 0x1a04) +#define PCIE1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x44000) +#define PCIE1_LINK_CTRL (PCIE1_VIRT_BASE + 0x70) +#define PCIE1_STATUS (PCIE1_VIRT_BASE + 0x1a04) + +#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x50000) + +#define XOR0_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60800) +#define XOR0_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60800) +#define XOR1_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60900) +#define XOR1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60900) +#define XOR0_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60A00) +#define XOR0_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60A00) +#define XOR1_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60B00) +#define XOR1_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60B00) + +#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x70000) +#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x74000) + +#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x80000) +#define SATA_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x80000) +#define SATA0_IF_CTRL (SATA_VIRT_BASE + 0x2050) +#define SATA0_PHY_MODE_2 (SATA_VIRT_BASE + 0x2330) +#define SATA1_IF_CTRL (SATA_VIRT_BASE + 0x4050) +#define SATA1_PHY_MODE_2 (SATA_VIRT_BASE + 0x4330) + +#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x90000) + +#define AUDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0xA0000) +#define AUDIO_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0xA0000) /* * Supported devices and revisions. @@ -135,4 +138,5 @@ #define MV88F6282_DEV_ID 0x6282 #define MV88F6282_REV_A0 0 +#define MV88F6282_REV_A1 1 #endif diff --git a/arch/arm/mach-kirkwood/include/mach/leds-netxbig.h b/arch/arm/mach-kirkwood/include/mach/leds-netxbig.h deleted file mode 100644 index 24b536ebdf1..00000000000 --- a/arch/arm/mach-kirkwood/include/mach/leds-netxbig.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/leds-netxbig.h - * - * Platform data structure for netxbig LED driver - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_LEDS_NETXBIG_H -#define __MACH_LEDS_NETXBIG_H - -struct netxbig_gpio_ext { - unsigned *addr; - int num_addr; - unsigned *data; - int num_data; - unsigned enable; -}; - -enum netxbig_led_mode { - NETXBIG_LED_OFF, - NETXBIG_LED_ON, - NETXBIG_LED_SATA, - NETXBIG_LED_TIMER1, - NETXBIG_LED_TIMER2, - NETXBIG_LED_MODE_NUM, -}; - -#define NETXBIG_LED_INVALID_MODE NETXBIG_LED_MODE_NUM - -struct netxbig_led_timer { - unsigned long delay_on; - unsigned long delay_off; - enum netxbig_led_mode mode; -}; - -struct netxbig_led { - const char *name; - const char *default_trigger; - int mode_addr; - int *mode_val; - int bright_addr; -}; - -struct netxbig_led_platform_data { - struct netxbig_gpio_ext *gpio_ext; - struct netxbig_led_timer *timer; - int num_timer; - struct netxbig_led *leds; - int num_leds; -}; - -#endif /* __MACH_LEDS_NETXBIG_H */ diff --git a/arch/arm/mach-kirkwood/include/mach/leds-ns2.h b/arch/arm/mach-kirkwood/include/mach/leds-ns2.h deleted file mode 100644 index e21272e5f66..00000000000 --- a/arch/arm/mach-kirkwood/include/mach/leds-ns2.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/leds-ns2.h - * - * Platform data structure for Network Space v2 LED driver - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_LEDS_NS2_H -#define __MACH_LEDS_NS2_H - -struct ns2_led { - const char *name; - const char *default_trigger; - unsigned cmd; - unsigned slow; -}; - -struct ns2_led_platform_data { - int num_leds; - struct ns2_led *leds; -}; - -#endif /* __MACH_LEDS_NS2_H */ diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h deleted file mode 100644 index 7568e95d279..00000000000 --- a/arch/arm/mach-kirkwood/include/mach/system.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/system.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include <mach/bridge-regs.h> - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode, const char *cmd) -{ - /* - * Enable soft reset to assert RSTOUTn. - */ - writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); - - /* - * Assert soft reset. - */ - writel(SOFT_RESET, SYSTEM_SOFT_RESET); - - while (1) - ; -} - - -#endif diff --git a/arch/arm/mach-kirkwood/include/mach/timex.h b/arch/arm/mach-kirkwood/include/mach/timex.h deleted file mode 100644 index c923cd169b9..00000000000 --- a/arch/arm/mach-kirkwood/include/mach/timex.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/timex.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define CLOCK_TICK_RATE (100 * HZ) - diff --git a/arch/arm/mach-kirkwood/include/mach/uncompress.h b/arch/arm/mach-kirkwood/include/mach/uncompress.h index 75d5497df3a..5bca5534021 100644 --- a/arch/arm/mach-kirkwood/include/mach/uncompress.h +++ b/arch/arm/mach-kirkwood/include/mach/uncompress.h @@ -44,4 +44,3 @@ static void flush(void) * nothing to do */ #define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/arch/arm/mach-kirkwood/include/mach/vmalloc.h b/arch/arm/mach-kirkwood/include/mach/vmalloc.h deleted file mode 100644 index bf162ca3d2c..00000000000 --- a/arch/arm/mach-kirkwood/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/vmalloc.h - */ - -#define VMALLOC_END 0xfe800000UL diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c index c4c68e5b94f..2c47a8ad0e2 100644 --- a/arch/arm/mach-kirkwood/irq.c +++ b/arch/arm/mach-kirkwood/irq.c @@ -7,42 +7,76 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ +#include <asm/exception.h> #include <linux/gpio.h> #include <linux/kernel.h> -#include <linux/init.h> #include <linux/irq.h> #include <linux/io.h> #include <mach/bridge-regs.h> +#include <plat/orion-gpio.h> #include <plat/irq.h> #include "common.h" -static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) +static int __initdata gpio0_irqs[4] = { + IRQ_KIRKWOOD_GPIO_LOW_0_7, + IRQ_KIRKWOOD_GPIO_LOW_8_15, + IRQ_KIRKWOOD_GPIO_LOW_16_23, + IRQ_KIRKWOOD_GPIO_LOW_24_31, +}; + +static int __initdata gpio1_irqs[4] = { + IRQ_KIRKWOOD_GPIO_HIGH_0_7, + IRQ_KIRKWOOD_GPIO_HIGH_8_15, + IRQ_KIRKWOOD_GPIO_HIGH_16_23, + 0, +}; + +#ifdef CONFIG_MULTI_IRQ_HANDLER +/* + * Compiling with both non-DT and DT support enabled, will + * break asm irq handler used by non-DT boards. Therefore, + * we provide a C-style irq handler even for non-DT boards, + * if MULTI_IRQ_HANDLER is set. + */ + +static void __iomem *kirkwood_irq_base = IRQ_VIRT_BASE; + +asmlinkage void +__exception_irq_entry kirkwood_legacy_handle_irq(struct pt_regs *regs) { - BUG_ON(irq < IRQ_KIRKWOOD_GPIO_LOW_0_7); - BUG_ON(irq > IRQ_KIRKWOOD_GPIO_HIGH_16_23); + u32 stat; - orion_gpio_irq_handler((irq - IRQ_KIRKWOOD_GPIO_LOW_0_7) << 3); + stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_LOW_OFF); + stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_LOW_OFF); + if (stat) { + unsigned int hwirq = __fls(stat); + handle_IRQ(hwirq, regs); + return; + } + stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_HIGH_OFF); + stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_HIGH_OFF); + if (stat) { + unsigned int hwirq = 32 + __fls(stat); + handle_IRQ(hwirq, regs); + return; + } } +#endif void __init kirkwood_init_irq(void) { - orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); - orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); + orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); + orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); + +#ifdef CONFIG_MULTI_IRQ_HANDLER + set_handle_irq(kirkwood_legacy_handle_irq); +#endif /* * Initialize gpiolib for GPIOs 0-49. */ - orion_gpio_init(0, 32, GPIO_LOW_VIRT_BASE, 0, - IRQ_KIRKWOOD_GPIO_START); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler); - - orion_gpio_init(32, 18, GPIO_HIGH_VIRT_BASE, 0, - IRQ_KIRKWOOD_GPIO_START + 32); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, - gpio_irq_handler); + orion_gpio_init(NULL, 0, 32, GPIO_LOW_VIRT_BASE, 0, + IRQ_KIRKWOOD_GPIO_START, gpio0_irqs); + orion_gpio_init(NULL, 32, 18, GPIO_HIGH_VIRT_BASE, 0, + IRQ_KIRKWOOD_GPIO_START + 32, gpio1_irqs); } diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c index 285edab776e..8e3e4331c38 100644 --- a/arch/arm/mach-kirkwood/lacie_v2-common.c +++ b/arch/arm/mach-kirkwood/lacie_v2-common.c @@ -12,13 +12,14 @@ #include <linux/spi/flash.h> #include <linux/spi/spi.h> #include <linux/i2c.h> -#include <linux/i2c/at24.h> +#include <linux/platform_data/at24.h> #include <linux/gpio.h> #include <asm/mach/time.h> #include <mach/kirkwood.h> #include <mach/irqs.h> #include <plat/time.h> #include "common.h" +#include "lacie_v2-common.h" /***************************************************************************** * 512KB SPI Flash on Boot Device (MACRONIX MX25L4005) diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c index cc431fa22cc..e96fd71abd7 100644 --- a/arch/arm/mach-kirkwood/mpp.c +++ b/arch/arm/mach-kirkwood/mpp.c @@ -10,7 +10,6 @@ #include <linux/gpio.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/mbus.h> #include <linux/io.h> #include <mach/hardware.h> #include <plat/mpp.h> @@ -23,16 +22,17 @@ static unsigned int __init kirkwood_variant(void) kirkwood_pcie_id(&dev, &rev); - if ((dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0) || - (dev == MV88F6282_DEV_ID)) + if (dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0) return MPP_F6281_MASK; + if (dev == MV88F6282_DEV_ID) + return MPP_F6282_MASK; if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0) return MPP_F6192_MASK; if (dev == MV88F6180_DEV_ID) return MPP_F6180_MASK; - printk(KERN_ERR "MPP setup: unknown kirkwood variant " - "(dev %#x rev %#x)\n", dev, rev); + pr_err("MPP setup: unknown kirkwood variant (dev %#x rev %#x)\n", + dev, rev); return 0; } diff --git a/arch/arm/mach-kirkwood/mpp.h b/arch/arm/mach-kirkwood/mpp.h index ac787957e2d..d5a0d1da2e0 100644 --- a/arch/arm/mach-kirkwood/mpp.h +++ b/arch/arm/mach-kirkwood/mpp.h @@ -31,313 +31,314 @@ #define MPP_F6282_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 0, 1 ) #define MPP0_GPIO MPP( 0, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP0_NF_IO2 MPP( 0, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 1, 1, 1, 1, 1, 1 ) +#define MPP0_NF_IO2 MPP( 0, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 0, 1, 1, 1, 1, 1 ) #define MPP1_GPO MPP( 1, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP1_NF_IO3 MPP( 1, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 1, 1, 1, 1, 1, 1 ) +#define MPP1_NF_IO3 MPP( 1, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 0, 1, 1, 1, 1, 1 ) #define MPP2_GPO MPP( 2, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP2_NF_IO4 MPP( 2, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 1, 1, 1, 1, 1, 1 ) +#define MPP2_NF_IO4 MPP( 2, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 0, 1, 1, 1, 1, 1 ) #define MPP3_GPO MPP( 3, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP3_NF_IO5 MPP( 3, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP3_SPI_MISO MPP( 3, 0x2, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP3_NF_IO5 MPP( 3, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP3_SPI_MISO MPP( 3, 0x2, 0, 0, 1, 1, 1, 1, 1 ) #define MPP4_GPIO MPP( 4, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP4_NF_IO6 MPP( 4, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP4_UART0_RXD MPP( 4, 0x2, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP4_NF_IO6 MPP( 4, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP4_UART0_RXD MPP( 4, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 0, 0, 0, 1, 1, 1 ) #define MPP4_LCD_VGA_HSYNC MPP( 4, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP4_PTP_CLK MPP( 4, 0xd, 1, 0, 1, 1, 1, 1, 0 ) +#define MPP4_PTP_CLK MPP( 4, 0xd, 0, 0, 1, 1, 1, 1, 0 ) #define MPP5_GPO MPP( 5, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP5_NF_IO7 MPP( 5, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 1, 1, 1, 1, 1, 0 ) -#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 1, 0, 1, 1, 1, 1 ) +#define MPP5_NF_IO7 MPP( 5, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 0, 0, 1, 1, 1, 1 ) #define MPP5_LCD_VGA_VSYNC MPP( 5, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 1, 1, 1, 1, 1, 0 ) +#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 0, 1, 1, 1, 1, 0 ) #define MPP7_GPO MPP( 7, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 1, 1, 1, 1, 1, 0 ) -#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 1, 1, 1, 1, 1, 0 ) -#define MPP7_LCD_PWM MPP( 7, 0xb, 0, 1, 0, 0, 0, 0, 1 ) +#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP7_LCD_PWM MPP( 7, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP8_GPIO MPP( 8, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP8_TW0_SDA MPP( 8, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP8_MII0_RXERR MPP( 8, 0x4, 1, 0, 0, 1, 1, 1, 1 ) -#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP8_PTP_CLK MPP( 8, 0xc, 1, 0, 1, 1, 1, 1, 0 ) -#define MPP8_MII0_COL MPP( 8, 0xd, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP8_TW0_SDA MPP( 8, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP8_MII0_RXERR MPP( 8, 0x4, 0, 0, 0, 1, 1, 1, 1 ) +#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP8_PTP_CLK MPP( 8, 0xc, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP8_MII0_COL MPP( 8, 0xd, 0, 0, 1, 1, 1, 1, 1 ) #define MPP9_GPIO MPP( 9, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP9_TW0_SCK MPP( 9, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP9_UART0_CTS MPP( 9, 0x2, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP9_UART1_CTS MPP( 9, 0x3, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 1, 0, 1, 1, 1, 1 ) -#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 1, 0, 1, 1, 1, 1, 0 ) -#define MPP9_MII0_CRS MPP( 9, 0xd, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP9_TW0_SCK MPP( 9, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP9_UART0_CTS MPP( 9, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP9_UART1_CTS MPP( 9, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 0, 0, 1, 1, 1, 1 ) +#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP9_MII0_CRS MPP( 9, 0xd, 0, 0, 1, 1, 1, 1, 1 ) #define MPP10_GPO MPP( 10, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP10_UART0_TXD MPP( 10, 0X3, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 1, 1, 1, 1, 1, 0 ) +#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP10_UART0_TXD MPP( 10, 0X3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 0, 1, 1, 1, 1, 0 ) #define MPP11_GPIO MPP( 11, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP11_SPI_MISO MPP( 11, 0x2, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP11_UART0_RXD MPP( 11, 0x3, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 1, 0, 1, 1, 1, 1, 0 ) -#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 1, 1, 1, 1, 1, 0 ) -#define MPP11_PTP_CLK MPP( 11, 0xd, 1, 0, 1, 1, 1, 1, 0 ) -#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1, 1 ) +#define MPP11_SPI_MISO MPP( 11, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP11_UART0_RXD MPP( 11, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP11_PTP_CLK MPP( 11, 0xd, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 0, 0, 1, 1, 1, 1 ) #define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP12_TW1_SDA MPP( 12, 0xd, 1, 0, 0, 0, 0, 0, 1 ) +#define MPP12_GPIO MPP( 12, 0x0, 1, 1, 0, 0, 0, 1, 0 ) +#define MPP12_SD_CLK MPP( 12, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP12_TW1_SDA MPP( 12, 0xd, 0, 0, 0, 0, 0, 0, 1 ) #define MPP13_GPIO MPP( 13, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP13_SD_CMD MPP( 13, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP13_AU_SPDIFRMCLK MPP( 13, 0xa, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP13_LCDPWM MPP( 13, 0xb, 0, 1, 0, 0, 0, 0, 1 ) +#define MPP13_SD_CMD MPP( 13, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP13_AU_SPDIFRMCLK MPP( 13, 0xa, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP13_LCDPWM MPP( 13, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP14_GPIO MPP( 14, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP14_SD_D0 MPP( 14, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP14_UART1_RXD MPP( 14, 0x3, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP14_AU_SPDIFI MPP( 14, 0xa, 1, 0, 0, 0, 0, 0, 1 ) -#define MPP14_AU_I2SDI MPP( 14, 0xb, 1, 0, 0, 0, 0, 0, 1 ) -#define MPP14_MII0_COL MPP( 14, 0xd, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP14_SD_D0 MPP( 14, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP14_UART1_RXD MPP( 14, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP14_AU_SPDIFI MPP( 14, 0xa, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP14_AU_I2SDI MPP( 14, 0xb, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP14_MII0_COL MPP( 14, 0xd, 0, 0, 1, 1, 1, 1, 1 ) #define MPP15_GPIO MPP( 15, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP15_SD_D1 MPP( 15, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 1, 0, 1, 1, 1, 1 ) -#define MPP15_SPI_CSn MPP( 15, 0xb, 0, 1, 0, 0, 0, 0, 1 ) +#define MPP15_SD_D1 MPP( 15, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 0, 0, 1, 1, 1, 1 ) +#define MPP15_SPI_CSn MPP( 15, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP16_GPIO MPP( 16, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP16_SD_D2 MPP( 16, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP16_UART0_CTS MPP( 16, 0x2, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP16_UART1_RXD MPP( 16, 0x3, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP16_LCD_EXT_REF_CLK MPP( 16, 0xb, 1, 0, 0, 0, 0, 0, 1 ) -#define MPP16_MII0_CRS MPP( 16, 0xd, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP16_SD_D2 MPP( 16, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP16_UART0_CTS MPP( 16, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP16_UART1_RXD MPP( 16, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP16_LCD_EXT_REF_CLK MPP( 16, 0xb, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP16_MII0_CRS MPP( 16, 0xd, 0, 0, 1, 1, 1, 1, 1 ) #define MPP17_GPIO MPP( 17, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP17_SD_D3 MPP( 17, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 1, 0, 1, 1, 1, 1 ) -#define MPP17_SATA1_ACTn MPP( 17, 0xa, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP17_TW1_SCK MPP( 17, 0xd, 1, 1, 0, 0, 0, 0, 1 ) +#define MPP17_SD_D3 MPP( 17, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 0, 0, 1, 1, 1, 1 ) +#define MPP17_SATA1_ACTn MPP( 17, 0xa, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP17_TW1_SCK MPP( 17, 0xd, 0, 0, 0, 0, 0, 0, 1 ) #define MPP18_GPO MPP( 18, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP18_NF_IO0 MPP( 18, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP18_PEX0_CLKREQ MPP( 18, 0x2, 0, 1, 0, 0, 0, 0, 1 ) +#define MPP18_NF_IO0 MPP( 18, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP18_PEX0_CLKREQ MPP( 18, 0x2, 0, 0, 0, 0, 0, 0, 1 ) #define MPP19_GPO MPP( 19, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP19_NF_IO1 MPP( 19, 0x1, 1, 1, 1, 1, 1, 1, 1 ) +#define MPP19_NF_IO1 MPP( 19, 0x1, 0, 0, 1, 1, 1, 1, 1 ) #define MPP20_GPIO MPP( 20, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP20_TSMP0 MPP( 20, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP20_TSMP0 MPP( 20, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP20_GE1_TXD0 MPP( 20, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP20_AU_SPDIFI MPP( 20, 0x4, 1, 0, 0, 0, 1, 1, 1 ) -#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP20_AU_SPDIFI MPP( 20, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 0, 0, 0, 1, 1, 1 ) #define MPP20_LCD_D0 MPP( 20, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP21_GPIO MPP( 21, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP21_TSMP1 MPP( 21, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP21_TSMP1 MPP( 21, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP21_GE1_TXD1 MPP( 21, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP21_AU_SPDIFO MPP( 21, 0x4, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 1, 0, 1, 1, 1, 1 ) +#define MPP21_AU_SPDIFO MPP( 21, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 0, 0, 1, 1, 1, 1 ) #define MPP21_LCD_D1 MPP( 21, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP22_GPIO MPP( 22, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP22_TSMP2 MPP( 22, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP22_TSMP2 MPP( 22, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP22_GE1_TXD2 MPP( 22, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP22_AU_SPDIFRMKCLK MPP( 22, 0x4, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP22_AU_SPDIFRMKCLK MPP( 22, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 0, 0, 0, 1, 1, 1 ) #define MPP22_LCD_D2 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP23_GPIO MPP( 23, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP23_TSMP3 MPP( 23, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 1, 0, 0, 0, 1, 1, 1 ) +#define MPP23_TSMP3 MPP( 23, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP23_GE1_TXD3 MPP( 23, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP23_AU_I2SBCLK MPP( 23, 0x4, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 1, 0, 1, 1, 1, 1 ) +#define MPP23_AU_I2SBCLK MPP( 23, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 0, 0, 1, 1, 1, 1 ) #define MPP23_LCD_D3 MPP( 23, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP24_GPIO MPP( 24, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP24_TSMP4 MPP( 24, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP24_TDM_SPI_CS0 MPP( 24, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP24_TSMP4 MPP( 24, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP24_TDM_SPI_CS0 MPP( 24, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP24_GE1_RXD0 MPP( 24, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP24_AU_I2SDO MPP( 24, 0x4, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP24_AU_I2SDO MPP( 24, 0x4, 0, 0, 0, 0, 1, 1, 1 ) #define MPP24_LCD_D4 MPP( 24, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP25_GPIO MPP( 25, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP25_TSMP5 MPP( 25, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP25_TSMP5 MPP( 25, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP25_GE1_RXD1 MPP( 25, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP25_AU_I2SLRCLK MPP( 25, 0x4, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP25_AU_I2SLRCLK MPP( 25, 0x4, 0, 0, 0, 0, 1, 1, 1 ) #define MPP25_LCD_D5 MPP( 25, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP26_GPIO MPP( 26, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP26_TSMP6 MPP( 26, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 1, 0, 0, 0, 1, 1, 1 ) +#define MPP26_TSMP6 MPP( 26, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP26_GE1_RXD2 MPP( 26, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP26_AU_I2SMCLK MPP( 26, 0x4, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP26_AU_I2SMCLK MPP( 26, 0x4, 0, 0, 0, 0, 1, 1, 1 ) #define MPP26_LCD_D6 MPP( 26, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP27_GPIO MPP( 27, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP27_TSMP7 MPP( 27, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP27_TSMP7 MPP( 27, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP27_GE1_RXD3 MPP( 27, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP27_AU_I2SDI MPP( 27, 0x4, 1, 0, 0, 0, 1, 1, 1 ) +#define MPP27_AU_I2SDI MPP( 27, 0x4, 0, 0, 0, 0, 1, 1, 1 ) #define MPP27_LCD_D7 MPP( 27, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP28_GPIO MPP( 28, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP28_TSMP8 MPP( 28, 0x1, 1, 1, 0, 0, 1, 1, 1 ) +#define MPP28_TSMP8 MPP( 28, 0x1, 0, 0, 0, 0, 1, 1, 1 ) #define MPP28_TDM_CODEC_INTn MPP( 28, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP28_GE1_COL MPP( 28, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP28_AU_EXTCLK MPP( 28, 0x4, 1, 0, 0, 0, 1, 1, 1 ) +#define MPP28_AU_EXTCLK MPP( 28, 0x4, 0, 0, 0, 0, 1, 1, 1 ) #define MPP28_LCD_D8 MPP( 28, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP29_GPIO MPP( 29, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP29_TSMP9 MPP( 29, 0x1, 1, 1, 0, 0, 1, 1, 1 ) +#define MPP29_TSMP9 MPP( 29, 0x1, 0, 0, 0, 0, 1, 1, 1 ) #define MPP29_TDM_CODEC_RSTn MPP( 29, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP29_GE1_TCLK MPP( 29, 0x3, 0, 0, 0, 1, 1, 1, 1 ) #define MPP29_LCD_D9 MPP( 29, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP30_GPIO MPP( 30, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP30_TSMP10 MPP( 30, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP30_TDM_PCLK MPP( 30, 0x2, 1, 1, 0, 0, 1, 1, 1 ) +#define MPP30_TSMP10 MPP( 30, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP30_TDM_PCLK MPP( 30, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP30_GE1_RXCTL MPP( 30, 0x3, 0, 0, 0, 1, 1, 1, 1 ) #define MPP30_LCD_D10 MPP( 30, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP31_GPIO MPP( 31, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP31_TSMP11 MPP( 31, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP31_TDM_FS MPP( 31, 0x2, 1, 1, 0, 0, 1, 1, 1 ) +#define MPP31_TSMP11 MPP( 31, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP31_TDM_FS MPP( 31, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP31_GE1_RXCLK MPP( 31, 0x3, 0, 0, 0, 1, 1, 1, 1 ) #define MPP31_LCD_D11 MPP( 31, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP32_GPIO MPP( 32, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP32_TSMP12 MPP( 32, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP32_TDM_DRX MPP( 32, 0x2, 1, 0, 0, 0, 1, 1, 1 ) +#define MPP32_TSMP12 MPP( 32, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP32_TDM_DRX MPP( 32, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP32_GE1_TCLKOUT MPP( 32, 0x3, 0, 0, 0, 1, 1, 1, 1 ) #define MPP32_LCD_D12 MPP( 32, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP33_GPO MPP( 33, 0x0, 0, 1, 0, 1, 1, 1, 1 ) -#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP33_GE1_TXCTL MPP( 33, 0x3, 0, 0, 0, 1, 1, 1, 1 ) #define MPP33_LCD_D13 MPP( 33, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP34_GPIO MPP( 34, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP34_GE1_TXEN MPP( 34, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP34_SATA1_ACTn MPP( 34, 0x5, 0, 1, 0, 0, 0, 1, 1 ) +#define MPP34_SATA1_ACTn MPP( 34, 0x5, 0, 0, 0, 0, 0, 1, 1 ) #define MPP34_LCD_D14 MPP( 34, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP35_GPIO MPP( 35, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP35_GE1_RXERR MPP( 35, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 1, 0, 1, 1, 1, 1 ) +#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 0, 0, 1, 1, 1, 1 ) #define MPP35_LCD_D15 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP35_MII0_RXERR MPP( 35, 0xc, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP35_MII0_RXERR MPP( 35, 0xc, 0, 0, 1, 1, 1, 1, 1 ) #define MPP36_GPIO MPP( 36, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP36_TSMP0 MPP( 36, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP36_AU_SPDIFI MPP( 36, 0x4, 1, 0, 1, 0, 0, 1, 1 ) -#define MPP36_TW1_SDA MPP( 36, 0xb, 1, 1, 0, 0, 0, 0, 1 ) +#define MPP36_TSMP0 MPP( 36, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP36_AU_SPDIFI MPP( 36, 0x4, 0, 0, 1, 0, 0, 1, 1 ) +#define MPP36_TW1_SDA MPP( 36, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP37_GPIO MPP( 37, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP37_TSMP1 MPP( 37, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP37_AU_SPDIFO MPP( 37, 0x4, 0, 1, 1, 0, 0, 1, 1 ) -#define MPP37_TW1_SCK MPP( 37, 0xb, 1, 1, 0, 0, 0, 0, 1 ) +#define MPP37_TSMP1 MPP( 37, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP37_AU_SPDIFO MPP( 37, 0x4, 0, 0, 1, 0, 0, 1, 1 ) +#define MPP37_TW1_SCK MPP( 37, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP38_GPIO MPP( 38, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP38_TSMP2 MPP( 38, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP38_AU_SPDIFRMLCLK MPP( 38, 0x4, 0, 1, 1, 0, 0, 1, 1 ) +#define MPP38_TSMP2 MPP( 38, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP38_AU_SPDIFRMLCLK MPP( 38, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP38_LCD_D18 MPP( 38, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP39_GPIO MPP( 39, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP39_TSMP3 MPP( 39, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP39_AU_I2SBCLK MPP( 39, 0x4, 0, 1, 1, 0, 0, 1, 1 ) +#define MPP39_TSMP3 MPP( 39, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP39_AU_I2SBCLK MPP( 39, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP39_LCD_D19 MPP( 39, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP40_GPIO MPP( 40, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP40_TSMP4 MPP( 40, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP40_AU_I2SDO MPP( 40, 0x4, 0, 1, 1, 0, 0, 1, 1 ) +#define MPP40_TSMP4 MPP( 40, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP40_AU_I2SDO MPP( 40, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP40_LCD_D20 MPP( 40, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP41_GPIO MPP( 41, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP41_TSMP5 MPP( 41, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 1, 0, 0, 0, 0, 1, 1 ) -#define MPP41_AU_I2SLRCLK MPP( 41, 0x4, 0, 1, 1, 0, 0, 1, 1 ) +#define MPP41_TSMP5 MPP( 41, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP41_AU_I2SLRCLK MPP( 41, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP41_LCD_D21 MPP( 41, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP42_GPIO MPP( 42, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP42_TSMP6 MPP( 42, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP42_AU_I2SMCLK MPP( 42, 0x4, 0, 1, 1, 0, 0, 1, 1 ) +#define MPP42_TSMP6 MPP( 42, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP42_AU_I2SMCLK MPP( 42, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP42_LCD_D22 MPP( 42, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP43_GPIO MPP( 43, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP43_TSMP7 MPP( 43, 0x1, 1, 1, 0, 0, 0, 1, 1 ) +#define MPP43_TSMP7 MPP( 43, 0x1, 0, 0, 0, 0, 0, 1, 1 ) #define MPP43_TDM_CODEC_INTn MPP( 43, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP43_AU_I2SDI MPP( 43, 0x4, 1, 0, 1, 0, 0, 1, 1 ) +#define MPP43_AU_I2SDI MPP( 43, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP43_LCD_D23 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP44_GPIO MPP( 44, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP44_TSMP8 MPP( 44, 0x1, 1, 1, 0, 0, 0, 1, 1 ) +#define MPP44_TSMP8 MPP( 44, 0x1, 0, 0, 0, 0, 0, 1, 1 ) #define MPP44_TDM_CODEC_RSTn MPP( 44, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP44_AU_EXTCLK MPP( 44, 0x4, 1, 0, 1, 0, 0, 1, 1 ) +#define MPP44_AU_EXTCLK MPP( 44, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP44_LCD_CLK MPP( 44, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP45_GPIO MPP( 45, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP45_TSMP9 MPP( 45, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP45_TDM_PCLK MPP( 45, 0x2, 1, 1, 0, 0, 0, 1, 1 ) +#define MPP45_TSMP9 MPP( 45, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP45_TDM_PCLK MPP( 45, 0x2, 0, 0, 0, 0, 0, 1, 1 ) #define MPP245_LCD_E MPP( 45, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP46_GPIO MPP( 46, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP46_TSMP10 MPP( 46, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP46_TDM_FS MPP( 46, 0x2, 1, 1, 0, 0, 0, 1, 1 ) +#define MPP46_TSMP10 MPP( 46, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP46_TDM_FS MPP( 46, 0x2, 0, 0, 0, 0, 0, 1, 1 ) #define MPP46_LCD_HSYNC MPP( 46, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP47_GPIO MPP( 47, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP47_TSMP11 MPP( 47, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP47_TDM_DRX MPP( 47, 0x2, 1, 0, 0, 0, 0, 1, 1 ) +#define MPP47_TSMP11 MPP( 47, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP47_TDM_DRX MPP( 47, 0x2, 0, 0, 0, 0, 0, 1, 1 ) #define MPP47_LCD_VSYNC MPP( 47, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP48_GPIO MPP( 48, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP48_TSMP12 MPP( 48, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP48_TDM_DTX MPP( 48, 0x2, 0, 1, 0, 0, 0, 1, 1 ) +#define MPP48_TSMP12 MPP( 48, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP48_TDM_DTX MPP( 48, 0x2, 0, 0, 0, 0, 0, 1, 1 ) #define MPP48_LCD_D16 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP49_GPIO MPP( 49, 0x0, 1, 1, 0, 0, 0, 1, 0 ) #define MPP49_GPO MPP( 49, 0x0, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP49_TSMP9 MPP( 49, 0x1, 1, 1, 0, 0, 0, 1, 0 ) -#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP49_PTP_CLK MPP( 49, 0x5, 1, 0, 0, 0, 0, 1, 0 ) -#define MPP49_PEX0_CLKREQ MPP( 49, 0xa, 0, 1, 0, 0, 0, 0, 1 ) +#define MPP49_TSMP9 MPP( 49, 0x1, 0, 0, 0, 0, 0, 1, 0 ) +#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP49_PTP_CLK MPP( 49, 0x5, 0, 0, 0, 0, 0, 1, 0 ) +#define MPP49_PEX0_CLKREQ MPP( 49, 0xa, 0, 0, 0, 0, 0, 0, 1 ) #define MPP49_LCD_D17 MPP( 49, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP_MAX 49 diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c deleted file mode 100644 index 9a1e917352f..00000000000 --- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c +++ /dev/null @@ -1,172 +0,0 @@ -/* - * arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c - * - * Marvell 88F6281 GTW GE Board Setup - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/pci.h> -#include <linux/irq.h> -#include <linux/mtd/physmap.h> -#include <linux/timer.h> -#include <linux/mv643xx_eth.h> -#include <linux/ethtool.h> -#include <linux/gpio.h> -#include <linux/leds.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> -#include <linux/spi/flash.h> -#include <linux/spi/spi.h> -#include <linux/spi/orion_spi.h> -#include <net/dsa.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/pci.h> -#include <mach/kirkwood.h> -#include "common.h" -#include "mpp.h" - -static struct mv643xx_eth_platform_data mv88f6281gtw_ge_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_NONE, - .speed = SPEED_1000, - .duplex = DUPLEX_FULL, -}; - -static struct dsa_chip_data mv88f6281gtw_ge_switch_chip_data = { - .port_names[0] = "lan1", - .port_names[1] = "lan2", - .port_names[2] = "lan3", - .port_names[3] = "lan4", - .port_names[4] = "wan", - .port_names[5] = "cpu", -}; - -static struct dsa_platform_data mv88f6281gtw_ge_switch_plat_data = { - .nr_chips = 1, - .chip = &mv88f6281gtw_ge_switch_chip_data, -}; - -static const struct flash_platform_data mv88f6281gtw_ge_spi_slave_data = { - .type = "mx25l12805d", -}; - -static struct spi_board_info __initdata mv88f6281gtw_ge_spi_slave_info[] = { - { - .modalias = "m25p80", - .platform_data = &mv88f6281gtw_ge_spi_slave_data, - .irq = -1, - .max_speed_hz = 50000000, - .bus_num = 0, - .chip_select = 0, - }, -}; - -static struct gpio_keys_button mv88f6281gtw_ge_button_pins[] = { - { - .code = KEY_RESTART, - .gpio = 47, - .desc = "SWR Button", - .active_low = 1, - }, { - .code = KEY_WPS_BUTTON, - .gpio = 46, - .desc = "WPS Button", - .active_low = 1, - }, -}; - -static struct gpio_keys_platform_data mv88f6281gtw_ge_button_data = { - .buttons = mv88f6281gtw_ge_button_pins, - .nbuttons = ARRAY_SIZE(mv88f6281gtw_ge_button_pins), -}; - -static struct platform_device mv88f6281gtw_ge_buttons = { - .name = "gpio-keys", - .id = -1, - .num_resources = 0, - .dev = { - .platform_data = &mv88f6281gtw_ge_button_data, - }, -}; - -static struct gpio_led mv88f6281gtw_ge_led_pins[] = { - { - .name = "gtw:green:Status", - .gpio = 20, - .active_low = 0, - }, { - .name = "gtw:red:Status", - .gpio = 21, - .active_low = 0, - }, { - .name = "gtw:green:USB", - .gpio = 12, - .active_low = 0, - }, -}; - -static struct gpio_led_platform_data mv88f6281gtw_ge_led_data = { - .leds = mv88f6281gtw_ge_led_pins, - .num_leds = ARRAY_SIZE(mv88f6281gtw_ge_led_pins), -}; - -static struct platform_device mv88f6281gtw_ge_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &mv88f6281gtw_ge_led_data, - }, -}; - -static unsigned int mv88f6281gtw_ge_mpp_config[] __initdata = { - MPP12_GPO, /* Status#_USB pin */ - MPP20_GPIO, /* Status#_GLED pin */ - MPP21_GPIO, /* Status#_RLED pin */ - MPP46_GPIO, /* WPS_Switch pin */ - MPP47_GPIO, /* SW_Init pin */ - 0 -}; - -static void __init mv88f6281gtw_ge_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_init(); - kirkwood_mpp_conf(mv88f6281gtw_ge_mpp_config); - - kirkwood_ehci_init(); - kirkwood_ge00_init(&mv88f6281gtw_ge_ge00_data); - kirkwood_ge00_switch_init(&mv88f6281gtw_ge_switch_plat_data, NO_IRQ); - spi_register_board_info(mv88f6281gtw_ge_spi_slave_info, - ARRAY_SIZE(mv88f6281gtw_ge_spi_slave_info)); - kirkwood_spi_init(); - kirkwood_uart0_init(); - platform_device_register(&mv88f6281gtw_ge_leds); - platform_device_register(&mv88f6281gtw_ge_buttons); -} - -static int __init mv88f6281gtw_ge_pci_init(void) -{ - if (machine_is_mv88f6281gtw_ge()) - kirkwood_pcie_init(KW_PCIE0); - - return 0; -} -subsys_initcall(mv88f6281gtw_ge_pci_init); - -MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board") - /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ - .atag_offset = 0x100, - .init_machine = mv88f6281gtw_ge_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, -MACHINE_END diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c deleted file mode 100644 index 8849bcc7328..00000000000 --- a/arch/arm/mach-kirkwood/netspace_v2-setup.c +++ /dev/null @@ -1,290 +0,0 @@ -/* - * arch/arm/mach-kirkwood/netspace_v2-setup.c - * - * LaCie Network Space v2 board setup - * - * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com> - * Copyright (C) 2009 Benoît Canet <benoit.canet@gmail.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/ata_platform.h> -#include <linux/mv643xx_eth.h> -#include <linux/input.h> -#include <linux/gpio.h> -#include <linux/gpio_keys.h> -#include <linux/leds.h> -#include <linux/gpio-fan.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <mach/kirkwood.h> -#include <mach/leds-ns2.h> -#include "common.h" -#include "mpp.h" -#include "lacie_v2-common.h" - -/***************************************************************************** - * Ethernet - ****************************************************************************/ - -static struct mv643xx_eth_platform_data netspace_v2_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -/***************************************************************************** - * SATA - ****************************************************************************/ - -static struct mv_sata_platform_data netspace_v2_sata_data = { - .n_ports = 2, -}; - -/***************************************************************************** - * GPIO keys - ****************************************************************************/ - -#define NETSPACE_V2_PUSH_BUTTON 32 - -static struct gpio_keys_button netspace_v2_buttons[] = { - [0] = { - .code = KEY_POWER, - .gpio = NETSPACE_V2_PUSH_BUTTON, - .desc = "Power push button", - .active_low = 0, - }, -}; - -static struct gpio_keys_platform_data netspace_v2_button_data = { - .buttons = netspace_v2_buttons, - .nbuttons = ARRAY_SIZE(netspace_v2_buttons), -}; - -static struct platform_device netspace_v2_gpio_buttons = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &netspace_v2_button_data, - }, -}; - -/***************************************************************************** - * GPIO LEDs - ****************************************************************************/ - -#define NETSPACE_V2_GPIO_RED_LED 12 - -static struct gpio_led netspace_v2_gpio_led_pins[] = { - { - .name = "ns_v2:red:fail", - .gpio = NETSPACE_V2_GPIO_RED_LED, - }, -}; - -static struct gpio_led_platform_data netspace_v2_gpio_leds_data = { - .num_leds = ARRAY_SIZE(netspace_v2_gpio_led_pins), - .leds = netspace_v2_gpio_led_pins, -}; - -static struct platform_device netspace_v2_gpio_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &netspace_v2_gpio_leds_data, - }, -}; - -/***************************************************************************** - * Dual-GPIO CPLD LEDs - ****************************************************************************/ - -#define NETSPACE_V2_GPIO_BLUE_LED_SLOW 29 -#define NETSPACE_V2_GPIO_BLUE_LED_CMD 30 - -static struct ns2_led netspace_v2_led_pins[] = { - { - .name = "ns_v2:blue:sata", - .cmd = NETSPACE_V2_GPIO_BLUE_LED_CMD, - .slow = NETSPACE_V2_GPIO_BLUE_LED_SLOW, - }, -}; - -static struct ns2_led_platform_data netspace_v2_leds_data = { - .num_leds = ARRAY_SIZE(netspace_v2_led_pins), - .leds = netspace_v2_led_pins, -}; - -static struct platform_device netspace_v2_leds = { - .name = "leds-ns2", - .id = -1, - .dev = { - .platform_data = &netspace_v2_leds_data, - }, -}; - -/***************************************************************************** - * GPIO fan - ****************************************************************************/ - -/* Designed for fan 40x40x16: ADDA AD0412LB-D50 6000rpm@12v */ -static struct gpio_fan_speed netspace_max_v2_fan_speed[] = { - { 0, 0 }, - { 1500, 15 }, - { 1700, 14 }, - { 1800, 13 }, - { 2100, 12 }, - { 3100, 11 }, - { 3300, 10 }, - { 4300, 9 }, - { 5500, 8 }, -}; - -static unsigned netspace_max_v2_fan_ctrl[] = { 22, 7, 33, 23 }; - -static struct gpio_fan_alarm netspace_max_v2_fan_alarm = { - .gpio = 25, - .active_low = 1, -}; - -static struct gpio_fan_platform_data netspace_max_v2_fan_data = { - .num_ctrl = ARRAY_SIZE(netspace_max_v2_fan_ctrl), - .ctrl = netspace_max_v2_fan_ctrl, - .alarm = &netspace_max_v2_fan_alarm, - .num_speed = ARRAY_SIZE(netspace_max_v2_fan_speed), - .speed = netspace_max_v2_fan_speed, -}; - -static struct platform_device netspace_max_v2_gpio_fan = { - .name = "gpio-fan", - .id = -1, - .dev = { - .platform_data = &netspace_max_v2_fan_data, - }, -}; - -/***************************************************************************** - * General Setup - ****************************************************************************/ - -static unsigned int netspace_v2_mpp_config[] __initdata = { - MPP0_SPI_SCn, - MPP1_SPI_MOSI, - MPP2_SPI_SCK, - MPP3_SPI_MISO, - MPP4_NF_IO6, - MPP5_NF_IO7, - MPP6_SYSRST_OUTn, - MPP7_GPO, /* Fan speed (bit 1) */ - MPP8_TW0_SDA, - MPP9_TW0_SCK, - MPP10_UART0_TXD, - MPP11_UART0_RXD, - MPP12_GPO, /* Red led */ - MPP14_GPIO, /* USB fuse */ - MPP16_GPIO, /* SATA 0 power */ - MPP17_GPIO, /* SATA 1 power */ - MPP18_NF_IO0, - MPP19_NF_IO1, - MPP20_SATA1_ACTn, - MPP21_SATA0_ACTn, - MPP22_GPIO, /* Fan speed (bit 0) */ - MPP23_GPIO, /* Fan power */ - MPP24_GPIO, /* USB mode select */ - MPP25_GPIO, /* Fan rotation fail */ - MPP26_GPIO, /* USB device vbus */ - MPP28_GPIO, /* USB enable host vbus */ - MPP29_GPIO, /* Blue led (slow register) */ - MPP30_GPIO, /* Blue led (command register) */ - MPP31_GPIO, /* Board power off */ - MPP32_GPIO, /* Power button (0 = Released, 1 = Pushed) */ - MPP33_GPO, /* Fan speed (bit 2) */ - 0 -}; - -#define NETSPACE_V2_GPIO_POWER_OFF 31 - -static void netspace_v2_power_off(void) -{ - gpio_set_value(NETSPACE_V2_GPIO_POWER_OFF, 1); -} - -static void __init netspace_v2_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_init(); - kirkwood_mpp_conf(netspace_v2_mpp_config); - - if (machine_is_netspace_max_v2()) - lacie_v2_hdd_power_init(2); - else - lacie_v2_hdd_power_init(1); - - kirkwood_ehci_init(); - kirkwood_ge00_init(&netspace_v2_ge00_data); - kirkwood_sata_init(&netspace_v2_sata_data); - kirkwood_uart0_init(); - lacie_v2_register_flash(); - lacie_v2_register_i2c_devices(); - - platform_device_register(&netspace_v2_leds); - platform_device_register(&netspace_v2_gpio_leds); - platform_device_register(&netspace_v2_gpio_buttons); - if (machine_is_netspace_max_v2()) - platform_device_register(&netspace_max_v2_gpio_fan); - - if (gpio_request(NETSPACE_V2_GPIO_POWER_OFF, "power-off") == 0 && - gpio_direction_output(NETSPACE_V2_GPIO_POWER_OFF, 0) == 0) - pm_power_off = netspace_v2_power_off; - else - pr_err("netspace_v2: failed to configure power-off GPIO\n"); -} - -#ifdef CONFIG_MACH_NETSPACE_V2 -MACHINE_START(NETSPACE_V2, "LaCie Network Space v2") - .atag_offset = 0x100, - .init_machine = netspace_v2_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_INETSPACE_V2 -MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2") - .atag_offset = 0x100, - .init_machine = netspace_v2_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_NETSPACE_MAX_V2 -MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2") - .atag_offset = 0x100, - .init_machine = netspace_v2_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, -MACHINE_END -#endif diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c index 1ba12c4dff8..913d032cdb1 100644 --- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c +++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c @@ -32,7 +32,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <mach/kirkwood.h> -#include <mach/leds-netxbig.h> +#include <linux/platform_data/leds-kirkwood-netxbig.h> #include "common.h" #include "mpp.h" #include "lacie_v2-common.h" @@ -404,7 +404,8 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END #endif @@ -415,6 +416,7 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c index 5660ca6c3d8..e5cf8410358 100644 --- a/arch/arm/mach-kirkwood/openrd-setup.c +++ b/arch/arm/mach-kirkwood/openrd-setup.c @@ -20,7 +20,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <mach/kirkwood.h> -#include <plat/mvsdio.h> +#include <linux/platform_data/mmc-mvsdio.h> #include "common.h" #include "mpp.h" @@ -55,6 +55,7 @@ static struct mv_sata_platform_data openrd_sata_data = { static struct mvsdio_platform_data openrd_mvsdio_data = { .gpio_card_detect = 29, /* MPP29 used as SD card detect */ + .gpio_write_protect = -1, }; static unsigned int openrd_mpp_config[] __initdata = { @@ -83,6 +84,11 @@ static struct i2c_board_info i2c_board_info[] __initdata = { }, }; +static struct platform_device openrd_client_audio_device = { + .name = "openrd-client-audio", + .id = -1, +}; + static int __initdata uart1; static int __init sd_uart_selection(char *str) @@ -116,14 +122,12 @@ static int __init uart1_mpp_config(void) kirkwood_mpp_conf(openrd_uart1_mpp_config); if (gpio_request(34, "SD_UART1_SEL")) { - printk(KERN_ERR "GPIO request failed for SD/UART1 selection" - ", gpio: 34\n"); + pr_err("GPIO request 34 failed for SD/UART1 selection\n"); return -EIO; } if (gpio_request(28, "RS232_RS485_SEL")) { - printk(KERN_ERR "GPIO request failed for RS232/RS485 selection" - ", gpio# 28\n"); + pr_err("GPIO request 28 failed for RS232/RS485 selection\n"); gpio_free(34); return -EIO; } @@ -154,7 +158,8 @@ static void __init openrd_init(void) kirkwood_mpp_conf(openrd_mpp_config); kirkwood_uart0_init(); - kirkwood_nand_init(ARRAY_AND_SIZE(openrd_nand_parts), 25); + kirkwood_nand_init(openrd_nand_parts, ARRAY_SIZE(openrd_nand_parts), + 25); kirkwood_ehci_init(); @@ -172,6 +177,7 @@ static void __init openrd_init(void) kirkwood_i2c_init(); if (machine_is_openrd_client() || machine_is_openrd_ultimate()) { + platform_device_register(&openrd_client_audio_device); i2c_register_board_info(0, i2c_board_info, ARRAY_SIZE(i2c_board_info)); kirkwood_audio_init(); @@ -179,15 +185,13 @@ static void __init openrd_init(void) if (uart1 <= 0) { if (uart1 < 0) - printk(KERN_ERR "Invalid kernel parameter to select " - "UART1. Defaulting to SD. ERROR CODE: %d\n", - uart1); + pr_err("Invalid kernel parameter to select UART1. Defaulting to SD. ERROR CODE: %d\n", + uart1); /* Select SD * Pin # 34: 0 => UART1, 1 => SD */ if (gpio_request(34, "SD_UART1_SEL")) { - printk(KERN_ERR "GPIO request failed for SD/UART1 " - "selection, gpio: 34\n"); + pr_err("GPIO request 34 failed for SD/UART1 selection\n"); } else { gpio_direction_output(34, 1); @@ -219,7 +223,8 @@ MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END #endif @@ -231,7 +236,8 @@ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END #endif @@ -243,6 +249,7 @@ MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index 74b992d810e..12d86f39f38 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c @@ -11,6 +11,7 @@ #include <linux/kernel.h> #include <linux/pci.h> #include <linux/slab.h> +#include <linux/clk.h> #include <linux/mbus.h> #include <video/vga.h> #include <asm/irq.h> @@ -19,6 +20,33 @@ #include <mach/bridge-regs.h> #include "common.h" +/* These can go away once Kirkwood uses the mvebu-mbus DT binding */ +#define KIRKWOOD_MBUS_PCIE0_MEM_TARGET 0x4 +#define KIRKWOOD_MBUS_PCIE0_MEM_ATTR 0xe8 +#define KIRKWOOD_MBUS_PCIE0_IO_TARGET 0x4 +#define KIRKWOOD_MBUS_PCIE0_IO_ATTR 0xe0 +#define KIRKWOOD_MBUS_PCIE1_MEM_TARGET 0x4 +#define KIRKWOOD_MBUS_PCIE1_MEM_ATTR 0xd8 +#define KIRKWOOD_MBUS_PCIE1_IO_TARGET 0x4 +#define KIRKWOOD_MBUS_PCIE1_IO_ATTR 0xd0 + +static void kirkwood_enable_pcie_clk(const char *port) +{ + struct clk *clk; + + clk = clk_get_sys("pcie", port); + if (IS_ERR(clk)) { + pr_err("PCIE clock %s missing\n", port); + return; + } + clk_prepare_enable(clk); + clk_put(clk); +} + +/* This function is called very early in the boot when probing the + hardware to determine what we actually are, and what rate tclk is + ticking at. Hence calling kirkwood_enable_pcie_clk() is not + possible since the clk tree has not been created yet. */ void kirkwood_enable_pcie(void) { u32 curr = readl(CLOCK_GATING_CTRL); @@ -26,11 +54,11 @@ void kirkwood_enable_pcie(void) writel(curr | CGC_PEX0, CLOCK_GATING_CTRL); } -void __init kirkwood_pcie_id(u32 *dev, u32 *rev) +void kirkwood_pcie_id(u32 *dev, u32 *rev) { kirkwood_enable_pcie(); - *dev = orion_pcie_dev_id((void __iomem *)PCIE_VIRT_BASE); - *rev = orion_pcie_rev((void __iomem *)PCIE_VIRT_BASE); + *dev = orion_pcie_dev_id(PCIE_VIRT_BASE); + *rev = orion_pcie_rev(PCIE_VIRT_BASE); } struct pcie_port { @@ -38,18 +66,12 @@ struct pcie_port { void __iomem *base; spinlock_t conf_lock; int irq; - struct resource res[2]; + struct resource res; }; static int pcie_port_map[2]; static int num_pcie_ports; -static inline struct pcie_port *bus_to_port(struct pci_bus *bus) -{ - struct pci_sys_data *sys = bus->sysdata; - return sys->private_data; -} - static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) { /* @@ -79,7 +101,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) { - struct pcie_port *pp = bus_to_port(bus); + struct pci_sys_data *sys = bus->sysdata; + struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; @@ -98,7 +121,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 val) { - struct pcie_port *pp = bus_to_port(bus); + struct pci_sys_data *sys = bus->sysdata; + struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; @@ -119,51 +143,34 @@ static struct pci_ops pcie_ops = { static void __init pcie0_ioresources_init(struct pcie_port *pp) { - pp->base = (void __iomem *)PCIE_VIRT_BASE; + pp->base = PCIE_VIRT_BASE; pp->irq = IRQ_KIRKWOOD_PCIE; /* - * IORESOURCE_IO - */ - pp->res[0].name = "PCIe 0 I/O Space"; - pp->res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE; - pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1; - pp->res[0].flags = IORESOURCE_IO; - - /* * IORESOURCE_MEM */ - pp->res[1].name = "PCIe 0 MEM"; - pp->res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE; - pp->res[1].end = pp->res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1; - pp->res[1].flags = IORESOURCE_MEM; + pp->res.name = "PCIe 0 MEM"; + pp->res.start = KIRKWOOD_PCIE_MEM_PHYS_BASE; + pp->res.end = pp->res.start + KIRKWOOD_PCIE_MEM_SIZE - 1; + pp->res.flags = IORESOURCE_MEM; } static void __init pcie1_ioresources_init(struct pcie_port *pp) { - pp->base = (void __iomem *)PCIE1_VIRT_BASE; + pp->base = PCIE1_VIRT_BASE; pp->irq = IRQ_KIRKWOOD_PCIE1; /* - * IORESOURCE_IO - */ - pp->res[0].name = "PCIe 1 I/O Space"; - pp->res[0].start = KIRKWOOD_PCIE1_IO_BUS_BASE; - pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1; - pp->res[0].flags = IORESOURCE_IO; - - /* * IORESOURCE_MEM */ - pp->res[1].name = "PCIe 1 MEM"; - pp->res[1].start = KIRKWOOD_PCIE1_MEM_PHYS_BASE; - pp->res[1].end = pp->res[1].start + KIRKWOOD_PCIE1_MEM_SIZE - 1; - pp->res[1].flags = IORESOURCE_MEM; + pp->res.name = "PCIe 1 MEM"; + pp->res.start = KIRKWOOD_PCIE1_MEM_PHYS_BASE; + pp->res.end = pp->res.start + KIRKWOOD_PCIE1_MEM_SIZE - 1; + pp->res.flags = IORESOURCE_MEM; } static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) { - extern unsigned int kirkwood_clk_ctrl; struct pcie_port *pp; int index; @@ -171,7 +178,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) return 0; index = pcie_port_map[nr]; - printk(KERN_INFO "PCI: bus%d uses PCIe port %d\n", sys->busnr, index); + pr_info("PCI: bus%d uses PCIe port %d\n", sys->busnr, index); pp = kzalloc(sizeof(*pp), GFP_KERNEL); if (!pp) @@ -182,45 +189,48 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) switch (index) { case 0: - kirkwood_clk_ctrl |= CGC_PEX0; + kirkwood_enable_pcie_clk("0"); pcie0_ioresources_init(pp); + pci_ioremap_io(SZ_64K * sys->busnr, KIRKWOOD_PCIE_IO_PHYS_BASE); break; case 1: - kirkwood_clk_ctrl |= CGC_PEX1; + kirkwood_enable_pcie_clk("1"); pcie1_ioresources_init(pp); + pci_ioremap_io(SZ_64K * sys->busnr, + KIRKWOOD_PCIE1_IO_PHYS_BASE); break; default: panic("PCIe setup: invalid controller %d", index); } - if (request_resource(&ioport_resource, &pp->res[0])) - panic("Request PCIe%d IO resource failed\n", index); - if (request_resource(&iomem_resource, &pp->res[1])) + if (request_resource(&iomem_resource, &pp->res)) panic("Request PCIe%d Memory resource failed\n", index); - sys->resource[0] = &pp->res[0]; - sys->resource[1] = &pp->res[1]; - sys->resource[2] = NULL; - sys->io_offset = 0; + pci_add_resource_offset(&sys->resources, &pp->res, sys->mem_offset); /* * Generic PCIe unit setup. */ orion_pcie_set_local_bus_nr(pp->base, sys->busnr); - orion_pcie_setup(pp->base, &kirkwood_mbus_dram_info); + orion_pcie_setup(pp->base); return 1; } -static void __devinit rc_pci_fixup(struct pci_dev *dev) +/* + * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it + * is operating as a root complex this needs to be switched to + * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on + * the device. Decoding setup is handled by the orion code. + */ +static void rc_pci_fixup(struct pci_dev *dev) { - /* - * Prevent enumeration of root complex. - */ if (dev->bus->parent == NULL && dev->devfn == 0) { int i; + dev->class &= 0xff; + dev->class |= PCI_CLASS_BRIDGE_HOST << 8; for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { dev->resource[i].start = 0; dev->resource[i].end = 0; @@ -230,49 +240,49 @@ static void __devinit rc_pci_fixup(struct pci_dev *dev) } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup); -static struct pci_bus __init * -kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys) -{ - struct pci_bus *bus; - - if (nr < num_pcie_ports) { - bus = pci_scan_bus(sys->busnr, &pcie_ops, sys); - } else { - bus = NULL; - BUG(); - } - - return bus; -} - static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { - struct pcie_port *pp = bus_to_port(dev->bus); + struct pci_sys_data *sys = dev->sysdata; + struct pcie_port *pp = sys->private_data; return pp->irq; } static struct hw_pci kirkwood_pci __initdata = { - .swizzle = pci_std_swizzle, .setup = kirkwood_pcie_setup, - .scan = kirkwood_pcie_scan_bus, .map_irq = kirkwood_pcie_map_irq, + .ops = &pcie_ops, }; -static void __init add_pcie_port(int index, unsigned long base) +static void __init add_pcie_port(int index, void __iomem *base) { - printk(KERN_INFO "Kirkwood PCIe port %d: ", index); - - if (orion_pcie_link_up((void __iomem *)base)) { - printk(KERN_INFO "link up\n"); - pcie_port_map[num_pcie_ports++] = index; - } else - printk(KERN_INFO "link down, ignoring\n"); + pcie_port_map[num_pcie_ports++] = index; + pr_info("Kirkwood PCIe port %d: link %s\n", index, + orion_pcie_link_up(base) ? "up" : "down"); } void __init kirkwood_pcie_init(unsigned int portmask) { + mvebu_mbus_add_window_remap_by_id(KIRKWOOD_MBUS_PCIE0_IO_TARGET, + KIRKWOOD_MBUS_PCIE0_IO_ATTR, + KIRKWOOD_PCIE_IO_PHYS_BASE, + KIRKWOOD_PCIE_IO_SIZE, + KIRKWOOD_PCIE_IO_BUS_BASE); + mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_PCIE0_MEM_TARGET, + KIRKWOOD_MBUS_PCIE0_MEM_ATTR, + KIRKWOOD_PCIE_MEM_PHYS_BASE, + KIRKWOOD_PCIE_MEM_SIZE); + mvebu_mbus_add_window_remap_by_id(KIRKWOOD_MBUS_PCIE1_IO_TARGET, + KIRKWOOD_MBUS_PCIE1_IO_ATTR, + KIRKWOOD_PCIE1_IO_PHYS_BASE, + KIRKWOOD_PCIE1_IO_SIZE, + KIRKWOOD_PCIE1_IO_BUS_BASE); + mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_PCIE1_MEM_TARGET, + KIRKWOOD_MBUS_PCIE1_MEM_ATTR, + KIRKWOOD_PCIE1_MEM_PHYS_BASE, + KIRKWOOD_PCIE1_MEM_SIZE); + vga_base = KIRKWOOD_PCIE_MEM_PHYS_BASE; if (portmask & KW_PCIE0) diff --git a/arch/arm/mach-kirkwood/pm.c b/arch/arm/mach-kirkwood/pm.c new file mode 100644 index 00000000000..8e5e0329d04 --- /dev/null +++ b/arch/arm/mach-kirkwood/pm.c @@ -0,0 +1,76 @@ +/* + * Power Management driver for Marvell Kirkwood SoCs + * + * Copyright (C) 2013 Ezequiel Garcia <ezequiel@free-electrons.com> + * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, + * version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/kernel.h> +#include <linux/suspend.h> +#include <linux/io.h> +#include <mach/bridge-regs.h> +#include "common.h" + +static void __iomem *ddr_operation_base; +static void __iomem *memory_pm_ctrl; + +static void kirkwood_low_power(void) +{ + u32 mem_pm_ctrl; + + mem_pm_ctrl = readl(memory_pm_ctrl); + + /* Set peripherals to low-power mode */ + writel_relaxed(~0, memory_pm_ctrl); + + /* Set DDR in self-refresh */ + writel_relaxed(0x7, ddr_operation_base); + + /* + * Set CPU in wait-for-interrupt state. + * This disables the CPU core clocks, + * the array clocks, and also the L2 controller. + */ + cpu_do_idle(); + + writel_relaxed(mem_pm_ctrl, memory_pm_ctrl); +} + +static int kirkwood_suspend_enter(suspend_state_t state) +{ + switch (state) { + case PM_SUSPEND_STANDBY: + kirkwood_low_power(); + break; + default: + return -EINVAL; + } + return 0; +} + +static int kirkwood_pm_valid_standby(suspend_state_t state) +{ + return state == PM_SUSPEND_STANDBY; +} + +static const struct platform_suspend_ops kirkwood_suspend_ops = { + .enter = kirkwood_suspend_enter, + .valid = kirkwood_pm_valid_standby, +}; + +void __init kirkwood_pm_init(void) +{ + ddr_operation_base = ioremap(DDR_OPERATION_BASE, 4); + memory_pm_ctrl = ioremap(MEMORY_PM_CTRL_PHYS, 4); + + suspend_set_ops(&kirkwood_suspend_ops); +} diff --git a/arch/arm/mach-kirkwood/pm.h b/arch/arm/mach-kirkwood/pm.h new file mode 100644 index 00000000000..21e7530f368 --- /dev/null +++ b/arch/arm/mach-kirkwood/pm.h @@ -0,0 +1,26 @@ +/* + * Power Management driver for Marvell Kirkwood SoCs + * + * Copyright (C) 2013 Ezequiel Garcia <ezequiel@free-electrons.com> + * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, + * version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ARCH_KIRKWOOD_PM_H +#define __ARCH_KIRKWOOD_PM_H + +#ifdef CONFIG_PM +void kirkwood_pm_init(void); +#else +static inline void kirkwood_pm_init(void) {}; +#endif + +#endif diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c index 6663869773a..e4fd3129d36 100644 --- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c @@ -16,10 +16,10 @@ #include <linux/gpio.h> #include <linux/spi/flash.h> #include <linux/spi/spi.h> -#include <linux/spi/orion_spi.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <mach/kirkwood.h> +#include <plat/orion-gpio.h> #include "common.h" #define RD88F6192_GPIO_USB_VBUS 10 @@ -84,5 +84,6 @@ MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c index 66b3c05e37a..5154bd2a3ad 100644 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c @@ -20,7 +20,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <mach/kirkwood.h> -#include <plat/mvsdio.h> +#include <linux/platform_data/mmc-mvsdio.h> #include "common.h" #include "mpp.h" @@ -69,6 +69,7 @@ static struct mv_sata_platform_data rd88f6281_sata_data = { static struct mvsdio_platform_data rd88f6281_mvsdio_data = { .gpio_card_detect = 28, + .gpio_write_protect = -1, }; static unsigned int rd88f6281_mpp_config[] __initdata = { @@ -86,7 +87,9 @@ static void __init rd88f6281_init(void) kirkwood_init(); kirkwood_mpp_conf(rd88f6281_mpp_config); - kirkwood_nand_init(ARRAY_AND_SIZE(rd88f6281_nand_parts), 25); + kirkwood_nand_init(rd88f6281_nand_parts, + ARRAY_SIZE(rd88f6281_nand_parts), + 25); kirkwood_ehci_init(); kirkwood_ge00_init(&rd88f6281_ge00_data); @@ -120,5 +123,6 @@ MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c deleted file mode 100644 index 8b102d62e82..00000000000 --- a/arch/arm/mach-kirkwood/sheevaplug-setup.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * arch/arm/mach-kirkwood/sheevaplug-setup.c - * - * Marvell SheevaPlug Reference Board Setup - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/ata_platform.h> -#include <linux/mtd/partitions.h> -#include <linux/mv643xx_eth.h> -#include <linux/gpio.h> -#include <linux/leds.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <mach/kirkwood.h> -#include <plat/mvsdio.h> -#include "common.h" -#include "mpp.h" - -static struct mtd_partition sheevaplug_nand_parts[] = { - { - .name = "u-boot", - .offset = 0, - .size = SZ_1M - }, { - .name = "uImage", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_4M - }, { - .name = "root", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL - }, -}; - -static struct mv643xx_eth_platform_data sheevaplug_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(0), -}; - -static struct mv_sata_platform_data sheeva_esata_sata_data = { - .n_ports = 2, -}; - -static struct mvsdio_platform_data sheevaplug_mvsdio_data = { - /* unfortunately the CD signal has not been connected */ -}; - -static struct mvsdio_platform_data sheeva_esata_mvsdio_data = { - .gpio_write_protect = 44, /* MPP44 used as SD write protect */ - .gpio_card_detect = 47, /* MPP47 used as SD card detect */ -}; - -static struct gpio_led sheevaplug_led_pins[] = { - { - .name = "plug:red:misc", - .default_trigger = "none", - .gpio = 46, - .active_low = 1, - }, - { - .name = "plug:green:health", - .default_trigger = "default-on", - .gpio = 49, - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data sheevaplug_led_data = { - .leds = sheevaplug_led_pins, - .num_leds = ARRAY_SIZE(sheevaplug_led_pins), -}; - -static struct platform_device sheevaplug_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &sheevaplug_led_data, - } -}; - -static unsigned int sheevaplug_mpp_config[] __initdata = { - MPP29_GPIO, /* USB Power Enable */ - MPP46_GPIO, /* LED Red */ - MPP49_GPIO, /* LED */ - 0 -}; - -static unsigned int sheeva_esata_mpp_config[] __initdata = { - MPP29_GPIO, /* USB Power Enable */ - MPP44_GPIO, /* SD Write Protect */ - MPP47_GPIO, /* SD Card Detect */ - MPP49_GPIO, /* LED Green */ - 0 -}; - -static void __init sheevaplug_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_init(); - - /* setup gpio pin select */ - if (machine_is_sheeva_esata()) - kirkwood_mpp_conf(sheeva_esata_mpp_config); - else - kirkwood_mpp_conf(sheevaplug_mpp_config); - - kirkwood_uart0_init(); - kirkwood_nand_init(ARRAY_AND_SIZE(sheevaplug_nand_parts), 25); - - if (gpio_request(29, "USB Power Enable") != 0 || - gpio_direction_output(29, 1) != 0) - printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n"); - kirkwood_ehci_init(); - - kirkwood_ge00_init(&sheevaplug_ge00_data); - - /* honor lower power consumption for plugs with out eSATA */ - if (machine_is_sheeva_esata()) - kirkwood_sata_init(&sheeva_esata_sata_data); - - /* enable sd wp and sd cd on plugs with esata */ - if (machine_is_sheeva_esata()) - kirkwood_sdio_init(&sheeva_esata_mvsdio_data); - else - kirkwood_sdio_init(&sheevaplug_mvsdio_data); - - platform_device_register(&sheevaplug_leds); -} - -#ifdef CONFIG_MACH_SHEEVAPLUG -MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board") - /* Maintainer: shadi Ammouri <shadi@marvell.com> */ - .atag_offset = 0x100, - .init_machine = sheevaplug_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_ESATA_SHEEVAPLUG -MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board") - .atag_offset = 0x100, - .init_machine = sheevaplug_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, -MACHINE_END -#endif diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c index ea104fb5ec3..8736f8c9751 100644 --- a/arch/arm/mach-kirkwood/t5325-setup.c +++ b/arch/arm/mach-kirkwood/t5325-setup.c @@ -16,7 +16,6 @@ #include <linux/mtd/physmap.h> #include <linux/spi/flash.h> #include <linux/spi/spi.h> -#include <linux/spi/orion_spi.h> #include <linux/i2c.h> #include <linux/mv643xx_eth.h> #include <linux/ata_platform.h> @@ -30,7 +29,7 @@ #include "common.h" #include "mpp.h" -struct mtd_partition hp_t5325_partitions[] = { +static struct mtd_partition hp_t5325_partitions[] = { { .name = "u-boot env", .size = SZ_64K, @@ -60,14 +59,14 @@ struct mtd_partition hp_t5325_partitions[] = { }, }; -const struct flash_platform_data hp_t5325_flash = { +static const struct flash_platform_data hp_t5325_flash = { .type = "mx25l8005", .name = "spi_flash", .parts = hp_t5325_partitions, .nr_parts = ARRAY_SIZE(hp_t5325_partitions), }; -struct spi_board_info __initdata hp_t5325_spi_slave_info[] = { +static struct spi_board_info __initdata hp_t5325_spi_slave_info[] = { { .modalias = "m25p80", .platform_data = &hp_t5325_flash, @@ -106,6 +105,11 @@ static struct platform_device hp_t5325_button_device = { } }; +static struct platform_device hp_t5325_audio_device = { + .name = "t5325-audio", + .id = -1, +}; + static unsigned int hp_t5325_mpp_config[] __initdata = { MPP0_NF_IO2, MPP1_SPI_MOSI, @@ -179,6 +183,7 @@ static void __init hp_t5325_init(void) kirkwood_sata_init(&hp_t5325_sata_data); kirkwood_ehci_init(); platform_device_register(&hp_t5325_button_device); + platform_device_register(&hp_t5325_audio_device); i2c_register_board_info(0, i2c_board_info, ARRAY_SIZE(i2c_board_info)); kirkwood_audio_init(); @@ -206,5 +211,6 @@ MACHINE_START(T5325, "HP t5325 Thin Client") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c index 262c034836d..e1267d6b468 100644 --- a/arch/arm/mach-kirkwood/ts219-setup.c +++ b/arch/arm/mach-kirkwood/ts219-setup.c @@ -124,7 +124,7 @@ static void __init qnap_ts219_init(void) static int __init ts219_pci_init(void) { if (machine_is_ts219()) - kirkwood_pcie_init(KW_PCIE0); + kirkwood_pcie_init(KW_PCIE1 | KW_PCIE0); return 0; } @@ -137,5 +137,6 @@ MACHINE_START(TS219, "QNAP TS-119/TS-219") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c index b68f5b4a9ec..81d585806b2 100644 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ b/arch/arm/mach-kirkwood/ts41x-setup.c @@ -20,6 +20,7 @@ #include <linux/gpio.h> #include <linux/gpio_keys.h> #include <linux/input.h> +#include <linux/io.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <mach/kirkwood.h> @@ -161,7 +162,7 @@ static int __init ts41x_pci_init(void) * (Marvell 88sx7042/sata_mv) is known to stop working * after a few minutes. */ - orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE); + orion_pcie_reset(PCIE_VIRT_BASE); kirkwood_pcie_id(&dev, &rev); if (dev == MV88F6282_DEV_ID) @@ -169,8 +170,7 @@ static int __init ts41x_pci_init(void) else kirkwood_pcie_init(KW_PCIE0); } - - return 0; + return 0; } subsys_initcall(ts41x_pci_init); @@ -181,5 +181,6 @@ MACHINE_START(TS41X, "QNAP TS-41x") .map_io = kirkwood_map_io, .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, + .init_time = kirkwood_timer_init, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c index 24294b2bc46..cec87cef76c 100644 --- a/arch/arm/mach-kirkwood/tsx1x-common.c +++ b/arch/arm/mach-kirkwood/tsx1x-common.c @@ -4,10 +4,10 @@ #include <linux/mtd/physmap.h> #include <linux/spi/flash.h> #include <linux/spi/spi.h> -#include <linux/spi/orion_spi.h> #include <linux/serial_reg.h> #include <mach/kirkwood.h> #include "common.h" +#include "tsx1x-common.h" /* * QNAP TS-x1x Boards flash @@ -30,7 +30,7 @@ * ***************************************************************************/ -struct mtd_partition qnap_tsx1x_partitions[] = { +static struct mtd_partition qnap_tsx1x_partitions[] = { { .name = "U-Boot", .size = 0x00080000, @@ -59,14 +59,14 @@ struct mtd_partition qnap_tsx1x_partitions[] = { }, }; -const struct flash_platform_data qnap_tsx1x_flash = { +static const struct flash_platform_data qnap_tsx1x_flash = { .type = "m25p128", .name = "spi_flash", .parts = qnap_tsx1x_partitions, .nr_parts = ARRAY_SIZE(qnap_tsx1x_partitions), }; -struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = { +static struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = { { .modalias = "m25p80", .platform_data = &qnap_tsx1x_flash, |