diff options
Diffstat (limited to 'arch/arm/mach-ixp23xx/include')
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/debug-macro.S | 25 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/entry-macro.S | 37 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/hardware.h | 36 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/io.h | 52 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/irqs.h | 223 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/ixdp2351.h | 89 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/ixp23xx.h | 298 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/memory.h | 34 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/platform.h | 57 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/system.h | 33 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/time.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/timex.h | 7 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/uncompress.h | 40 | ||||
| -rw-r--r-- | arch/arm/mach-ixp23xx/include/mach/vmalloc.h | 10 | 
14 files changed, 0 insertions, 944 deletions
diff --git a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S b/arch/arm/mach-ixp23xx/include/mach/debug-macro.S deleted file mode 100644 index f7c6eef7fa2..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S +++ /dev/null @@ -1,25 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <mach/ixp23xx.h> - -		.macro	addruart, rp, rv -		ldr	\rp, =IXP23XX_PERIPHERAL_PHYS 	@ physical -		ldr	\rv, =IXP23XX_PERIPHERAL_VIRT	@ virtual -#ifdef __ARMEB__ -		orr	\rp, \rp, #0x00000003 -		orr	\rv, \rv, #0x00000003 -#endif -		.endm - -#define UART_SHIFT	2 -#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S deleted file mode 100644 index 3f5338a7bbd..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S +++ /dev/null @@ -1,37 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/entry-macro.S - */ - -		.macro	disable_fiq -		.endm - -		.macro  get_irqnr_preamble, base, tmp -		.endm - -		.macro  arch_ret_to_user, tmp1, tmp2 -		.endm - -		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp -		ldr	\irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) -		ldr	\irqnr, [\irqnr]	@ get interrupt number -		cmp	\irqnr, #0x0		@ spurious interrupt ? -		movne	\irqnr, \irqnr, lsr #2	@ skip unwanted low order bits -		subne	\irqnr, \irqnr, #1	@ convert to 0 based - -#if 0 -		cmp	\irqnr, #IRQ_IXP23XX_PCI_INT_RPH -		bne	1001f -		mov	\irqnr, #IRQ_IXP23XX_INTA - -		ldr	\irqnr, =0xf5000030 - -		mov	\tmp, #(1<<26) -		tst	\irqnr, \tmp -		movne	\irqnr, #IRQ_IXP23XX_INTB - -		mov	\tmp, #(1<<27) -		tst	\irqnr, \tmp -		movne	\irqnr, #IRQ_IXP23XX_INTA -1001: -#endif -		.endm diff --git a/arch/arm/mach-ixp23xx/include/mach/hardware.h b/arch/arm/mach-ixp23xx/include/mach/hardware.h deleted file mode 100644 index 57b508bfe28..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/hardware.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/hardware.h - * - * Copyright (C) 2002-2004 Intel Corporation. - * Copyricht (C) 2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Hardware definitions for IXP23XX based systems - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -/* PCI IO info */ -#define PCIBIOS_MIN_IO		0x00000000 -#define PCIBIOS_MIN_MEM		0xe0000000 - -#include "ixp23xx.h" - -#define pcibios_assign_all_busses()	0 - -/* - * Platform helper functions - */ -#include "platform.h" - -/* - * Platform-specific headers - */ -#include "ixdp2351.h" - - -#endif diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h deleted file mode 100644 index fd9ef8e519f..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/io.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/io.h - * - * Original Author: Naeem M Afzal <naeem.m.afzal@intel.com> - * Maintainer: Deepak Saxena <dsaxena@plexity.net> - * - * Copyright (C) 2003-2005 Intel Corp. - * Copyright (C) 2005 MontaVista Software, Inc - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(p)		((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) -#define __mem_pci(a)	(a) - -static inline void __iomem * -ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype) -{ -	if (addr >= IXP23XX_PCI_MEM_START && -		addr <= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) { -		if (addr + size > IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) -			return NULL; - -		return (void __iomem *) - 			((addr - IXP23XX_PCI_MEM_START) + IXP23XX_PCI_MEM_VIRT); -	} - -	return __arm_ioremap(addr, size, mtype); -} - -static inline void -ixp23xx_iounmap(void __iomem *addr) -{ -	if ((((u32)addr) >= IXP23XX_PCI_MEM_VIRT) && -	    (((u32)addr) < IXP23XX_PCI_MEM_VIRT + IXP23XX_PCI_MEM_SIZE)) -		return; - -	__iounmap(addr); -} - -#define __arch_ioremap(a,s,f)	ixp23xx_ioremap(a,s,f) -#define __arch_iounmap(a)	ixp23xx_iounmap(a) - - -#endif diff --git a/arch/arm/mach-ixp23xx/include/mach/irqs.h b/arch/arm/mach-ixp23xx/include/mach/irqs.h deleted file mode 100644 index 3af33a04b8a..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/irqs.h +++ /dev/null @@ -1,223 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/irqs.h - * - * IRQ definitions for IXP23XX based systems - * - * Author: Naeem Afzal <naeem.m.afzal@intel.com> - * - * Copyright (C) 2003-2004 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#define NR_IXP23XX_IRQS			IRQ_IXP23XX_INTB+1 -#define IRQ_IXP23XX_EXTIRQS		NR_IXP23XX_IRQS - - -#define IRQ_IXP23XX_DBG0		0	/* Debug/Execution/MBox */ -#define IRQ_IXP23XX_DBG1		1	/* Debug/Execution/MBox */ -#define IRQ_IXP23XX_NPE_TRG		2	/* npe_trigger */ -#define IRQ_IXP23XX_TIMER1		3	/* Timer[0] */ -#define IRQ_IXP23XX_TIMER2		4	/* Timer[1] */ -#define IRQ_IXP23XX_TIMESTAMP		5	/* Timer[2], Time-stamp */ -#define IRQ_IXP23XX_WDOG		6	/* Time[3], Watchdog Timer */ -#define IRQ_IXP23XX_PCI_DBELL		7	/* PCI Doorbell */ -#define IRQ_IXP23XX_PCI_DMA1		8	/* PCI DMA Channel 1 */ -#define IRQ_IXP23XX_PCI_DMA2		9	/* PCI DMA Channel 2 */ -#define IRQ_IXP23XX_PCI_DMA3		10	/* PCI DMA Channel 3 */ -#define IRQ_IXP23XX_PCI_INT_RPH		11	/* pcxg_pci_int_rph */ -#define IRQ_IXP23XX_CPP_PMU		12	/* xpxg_pm_int_rpl */ -#define IRQ_IXP23XX_SWINT0		13	/* S/W Interrupt0 */ -#define IRQ_IXP23XX_SWINT1		14	/* S/W Interrupt1 */ -#define IRQ_IXP23XX_UART2		15	/* UART1 Interrupt */ -#define IRQ_IXP23XX_UART1		16	/* UART0 Interrupt */ -#define IRQ_IXP23XX_XSI_PMU_ROLLOVER	17	/* AHB Performance M. Unit counter rollover */ -#define IRQ_IXP23XX_XSI_AHB_PM0		18	/* intr_pm_o */ -#define IRQ_IXP23XX_XSI_AHB_ECE0	19	/* intr_ece_o */ -#define IRQ_IXP23XX_XSI_AHB_GASKET	20	/* gas_intr_o */ -#define IRQ_IXP23XX_XSI_CPP		21	/* xsi2cpp_int */ -#define IRQ_IXP23XX_CPP_XSI		22	/* cpp2xsi_int */ -#define IRQ_IXP23XX_ME_ATTN0		23	/* ME_ATTN */ -#define IRQ_IXP23XX_ME_ATTN1		24	/* ME_ATTN */ -#define IRQ_IXP23XX_ME_ATTN2		25	/* ME_ATTN */ -#define IRQ_IXP23XX_ME_ATTN3		26	/* ME_ATTN */ -#define IRQ_IXP23XX_PCI_ERR_RPH		27	/* PCXG_PCI_ERR_RPH */ -#define IRQ_IXP23XX_D0XG_ECC_CORR	28	/* D0XG_DRAM_ECC_CORR */ -#define IRQ_IXP23XX_D0XG_ECC_UNCORR	29	/* D0XG_DRAM_ECC_UNCORR */ -#define IRQ_IXP23XX_SRAM_ERR1		30	/* SRAM1_ERR */ -#define IRQ_IXP23XX_SRAM_ERR0		31	/* SRAM0_ERR */ -#define IRQ_IXP23XX_MEDIA_ERR		32	/* MEDIA_ERR */ -#define IRQ_IXP23XX_STH_DRAM_ECC_MAJ	33	/* STH_DRAM0_ECC_MAJ */ -#define IRQ_IXP23XX_GPIO6		34	/* GPIO0 interrupts */ -#define IRQ_IXP23XX_GPIO7		35	/* GPIO1 interrupts */ -#define IRQ_IXP23XX_GPIO8		36	/* GPIO2 interrupts */ -#define IRQ_IXP23XX_GPIO9		37	/* GPIO3 interrupts */ -#define IRQ_IXP23XX_GPIO10		38	/* GPIO4 interrupts */ -#define IRQ_IXP23XX_GPIO11		39	/* GPIO5 interrupts */ -#define IRQ_IXP23XX_GPIO12		40	/* GPIO6 interrupts */ -#define IRQ_IXP23XX_GPIO13		41	/* GPIO7 interrupts */ -#define IRQ_IXP23XX_GPIO14		42	/* GPIO8 interrupts */ -#define IRQ_IXP23XX_GPIO15		43	/* GPIO9 interrupts */ -#define IRQ_IXP23XX_SHAC_RING0		44	/* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING1		45	/* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING2		46	/* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING3		47	/* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING4		48	/* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING5		49	/* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING6		50	/* SHAC RING Full */ -#define IRQ_IXP23XX_SHAC_RING7		51	/* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING8		52	/* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING9		53	/* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING10		54	/* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING11		55	/* SHAC Ring Full */ -#define IRQ_IXP23XX_ME_THREAD_A0_ME0	56	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A1_ME0	57	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A2_ME0	58	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A3_ME0	59	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A4_ME0	60	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A5_ME0	61	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A6_ME0	62	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A7_ME0	63	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A8_ME1	64	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A9_ME1	65	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A10_ME1	66	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A11_ME1	67	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A12_ME1	68	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A13_ME1	69	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A14_ME1	70	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A15_ME1	71	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A16_ME2	72	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A17_ME2	73	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A18_ME2	74	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A19_ME2	75	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A20_ME2	76	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A21_ME2	77	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A22_ME2	78	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A23_ME2	79	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A24_ME3	80	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A25_ME3	81	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A26_ME3	82	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A27_ME3	83	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A28_ME3	84	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A29_ME3	85	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A30_ME3	86	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A31_ME3	87	/* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_B0_ME0	88	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B1_ME0	89	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B2_ME0	90	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B3_ME0	91	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B4_ME0	92	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B5_ME0	93	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B6_ME0	94	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B7_ME0	95	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B8_ME1	96	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B9_ME1	97	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B10_ME1	98	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B11_ME1	99	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B12_ME1	100	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B13_ME1	101	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B14_ME1	102	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B15_ME1	103	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B16_ME2	104	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B17_ME2	105	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B18_ME2	106	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B19_ME2	107	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B20_ME2	108	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B21_ME2	109	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B22_ME2	110	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B23_ME2	111	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B24_ME3	112	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B25_ME3	113	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B26_ME3	114	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B27_ME3	115	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B28_ME3	116	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B29_ME3	117	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B30_ME3	118	/* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B31_ME3	119	/* ME_THREAD_B */ - -#define NUM_IXP23XX_RAW_IRQS		120 - -#define IRQ_IXP23XX_INTA		120	/* Indirect pcxg_pci_int_rph */ -#define IRQ_IXP23XX_INTB		121	/* Indirect pcxg_pci_int_rph */ - -#define NR_IXP23XX_IRQ			(IRQ_IXP23XX_INTB + 1) - -/* - * We default to 32 per-board IRQs. Increase this number if you need - * more, but keep it realistic. - */ -#define NR_IXP23XX_MACH_IRQS 		32 - -#define NR_IRQS				(NR_IXP23XX_IRQS + NR_IXP23XX_MACH_IRQS) - -#define IXP23XX_MACH_IRQ(irq) 		(NR_IXP23XX_IRQ + (irq)) - - -/* - * IXDP2351-specific interrupts - */ - -/* - * External PCI interrupts signaled through INTB - * - */ -#define IXDP2351_INTB_IRQ_BASE 		0 -#define IRQ_IXDP2351_INTA_82546		IXP23XX_MACH_IRQ(0) -#define IRQ_IXDP2351_INTB_82546		IXP23XX_MACH_IRQ(1) -#define IRQ_IXDP2351_SPCI_DB_0		IXP23XX_MACH_IRQ(2) -#define IRQ_IXDP2351_SPCI_DB_1		IXP23XX_MACH_IRQ(3) -#define IRQ_IXDP2351_SPCI_PMC_INTA	IXP23XX_MACH_IRQ(4) -#define IRQ_IXDP2351_SPCI_PMC_INTB	IXP23XX_MACH_IRQ(5) -#define IRQ_IXDP2351_SPCI_PMC_INTC	IXP23XX_MACH_IRQ(6) -#define IRQ_IXDP2351_SPCI_PMC_INTD	IXP23XX_MACH_IRQ(7) -#define IRQ_IXDP2351_SPCI_FIC		IXP23XX_MACH_IRQ(8) - -#define IXDP2351_INTB_IRQ_BIT(irq)	(irq - IXP23XX_MACH_IRQ(0)) -#define IXDP2351_INTB_IRQ_MASK(irq)	(1 << IXDP2351_INTB_IRQ_BIT(irq)) -#define IXDP2351_INTB_IRQ_VALID		0x01FF -#define IXDP2351_INTB_IRQ_NUM 		16 - -/* - * Other external interrupts signaled through INTA - */ -#define IXDP2351_INTA_IRQ_BASE 		16 -#define IRQ_IXDP2351_IPMI_FROM		IXP23XX_MACH_IRQ(16) -#define IRQ_IXDP2351_125US		IXP23XX_MACH_IRQ(17) -#define IRQ_IXDP2351_DB_0_ADD		IXP23XX_MACH_IRQ(18) -#define IRQ_IXDP2351_DB_1_ADD		IXP23XX_MACH_IRQ(19) -#define IRQ_IXDP2351_DEBUG1		IXP23XX_MACH_IRQ(20) -#define IRQ_IXDP2351_ADD_UART		IXP23XX_MACH_IRQ(21) -#define IRQ_IXDP2351_FIC_ADD		IXP23XX_MACH_IRQ(24) -#define IRQ_IXDP2351_CS8900		IXP23XX_MACH_IRQ(25) -#define IRQ_IXDP2351_BBSRAM		IXP23XX_MACH_IRQ(26) -#define IRQ_IXDP2351_CONFIG_MEDIA	IXP23XX_MACH_IRQ(27) -#define IRQ_IXDP2351_CLOCK_REF		IXP23XX_MACH_IRQ(28) -#define IRQ_IXDP2351_A10_NP		IXP23XX_MACH_IRQ(29) -#define IRQ_IXDP2351_A11_NP		IXP23XX_MACH_IRQ(30) -#define IRQ_IXDP2351_DEBUG_NP		IXP23XX_MACH_IRQ(31) - -#define IXDP2351_INTA_IRQ_BIT(irq) 	(irq - IXP23XX_MACH_IRQ(16)) -#define IXDP2351_INTA_IRQ_MASK(irq) 	(1 << IXDP2351_INTA_IRQ_BIT(irq)) -#define IXDP2351_INTA_IRQ_VALID 	0xFF3F -#define IXDP2351_INTA_IRQ_NUM 		16 - - -/* - * ADI RoadRunner IRQs - */ -#define IRQ_ROADRUNNER_PCI_INTA 	IRQ_IXP23XX_INTA -#define IRQ_ROADRUNNER_PCI_INTB 	IRQ_IXP23XX_INTB -#define IRQ_ROADRUNNER_PCI_INTC 	IRQ_IXP23XX_GPIO11 -#define IRQ_ROADRUNNER_PCI_INTD 	IRQ_IXP23XX_GPIO12 - -/* - * Put new board definitions here - */ - - -#endif diff --git a/arch/arm/mach-ixp23xx/include/mach/ixdp2351.h b/arch/arm/mach-ixp23xx/include/mach/ixdp2351.h deleted file mode 100644 index 663951027de..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/ixdp2351.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/ixdp2351.h - * - * Register and other defines for IXDP2351 - * - * Copyright (c) 2002-2004 Intel Corp. - * Copytight (c) 2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ASM_ARCH_IXDP2351_H -#define __ASM_ARCH_IXDP2351_H - -/* - * NP module memory map - */ -#define IXDP2351_NP_PHYS_BASE		(IXP23XX_EXP_BUS_CS4_BASE) -#define IXDP2351_NP_PHYS_SIZE		0x00100000 -#define IXDP2351_NP_VIRT_BASE		0xeff00000 - -#define IXDP2351_VIRT_CS8900_BASE	(IXDP2351_NP_VIRT_BASE) -#define IXDP2351_VIRT_CS8900_END	(IXDP2351_VIRT_CS8900_BASE + 16) - -#define IXDP2351_VIRT_NP_CPLD_BASE 	(IXP23XX_EXP_BUS_CS4_BASE_VIRT + 0x00010000) - -#define IXDP2351_NP_CPLD_REG(reg) ((volatile u16 *)(IXDP2351_VIRT_NP_CPLD_BASE + reg)) - -#define IXDP2351_NP_CPLD_RESET1_REG	IXDP2351_NP_CPLD_REG(0x00) -#define IXDP2351_NP_CPLD_LED_REG	IXDP2351_NP_CPLD_REG(0x02) -#define IXDP2351_NP_CPLD_VERSION_REG	IXDP2351_NP_CPLD_REG(0x04) - -/* - * Base board module memory map - */ - -#define IXDP2351_BB_BASE_PHYS		(IXP23XX_EXP_BUS_CS5_BASE) -#define IXDP2351_BB_SIZE		0x01000000 -#define IXDP2351_BB_BASE_VIRT		(0xee000000) - -#define IXDP2351_BB_AREA_BASE(offset)	(IXDP2351_BB_BASE_VIRT + offset) - -#define IXDP2351_VIRT_NVRAM_BASE	IXDP2351_BB_AREA_BASE(0x0) -#define IXDP2351_NVRAM_SIZE		(0x20000) - -#define IXDP2351_VIRT_MB_IXF1104_BASE	IXDP2351_BB_AREA_BASE(0x00020000) -#define IXDP2351_VIRT_ADD_UART_BASE	IXDP2351_BB_AREA_BASE(0x000240C0) -#define IXDP2351_VIRT_FIC_BASE		IXDP2351_BB_AREA_BASE(0x00200000) -#define IXDP2351_VIRT_DB0_BASE		IXDP2351_BB_AREA_BASE(0x00400000) -#define IXDP2351_VIRT_DB1_BASE		IXDP2351_BB_AREA_BASE(0x00600000) -#define IXDP2351_VIRT_CPLD_BASE		IXDP2351_BB_AREA_BASE(0x00024000) - -/* - * On board CPLD registers - */ -#define IXDP2351_CPLD_BB_REG(reg) ((volatile u16 *)(IXDP2351_VIRT_CPLD_BASE + reg)) - -#define IXDP2351_CPLD_RESET0_REG	IXDP2351_CPLD_BB_REG(0x00) -#define IXDP2351_CPLD_RESET1_REG	IXDP2351_CPLD_BB_REG(0x04) - -#define IXDP2351_CPLD_RESET1_MAGIC 	0x55AA -#define IXDP2351_CPLD_RESET1_ENABLE 	0x8000 - -#define IXDP2351_CPLD_FPGA_CONFIG_REG	IXDP2351_CPLD_BB_REG(0x08) -#define IXDP2351_CPLD_INTB_MASK_SET_REG	IXDP2351_CPLD_BB_REG(0x10) -#define IXDP2351_CPLD_INTA_MASK_SET_REG	IXDP2351_CPLD_BB_REG(0x14) -#define IXDP2351_CPLD_INTB_STAT_REG	IXDP2351_CPLD_BB_REG(0x18) -#define IXDP2351_CPLD_INTA_STAT_REG	IXDP2351_CPLD_BB_REG(0x1C) -#define IXDP2351_CPLD_INTB_RAW_REG	IXDP2351_CPLD_BB_REG(0x20)	/* read */ -#define IXDP2351_CPLD_INTA_RAW_REG	IXDP2351_CPLD_BB_REG(0x24)	/* read */ -#define IXDP2351_CPLD_INTB_MASK_CLR_REG	IXDP2351_CPLD_INTB_RAW_REG	/* write */ -#define IXDP2351_CPLD_INTA_MASK_CLR_REG	IXDP2351_CPLD_INTA_RAW_REG	/* write */ -#define IXDP2351_CPLD_INTB_SIM_REG	IXDP2351_CPLD_BB_REG(0x28) -#define IXDP2351_CPLD_INTA_SIM_REG	IXDP2351_CPLD_BB_REG(0x2C) -	/* Interrupt bits are defined in irqs.h */ -#define IXDP2351_CPLD_BB_GBE0_REG	IXDP2351_CPLD_BB_REG(0x30) -#define IXDP2351_CPLD_BB_GBE1_REG	IXDP2351_CPLD_BB_REG(0x34) - -/* #define IXDP2351_CPLD_BB_MISC_REG	IXDP2351_CPLD_REG(0x1C) */ -/* #define IXDP2351_CPLD_BB_MISC_REV_MASK	0xFF		*/ -/* #define IXDP2351_CPLD_BB_GDXCS0_REG	IXDP2351_CPLD_REG(0x24) */ -/* #define IXDP2351_CPLD_BB_GDXCS1_REG	IXDP2351_CPLD_REG(0x28) */ -/* #define IXDP2351_CPLD_BB_CLOCK_REG	IXDP2351_CPLD_REG(0x04) */ - - -#endif diff --git a/arch/arm/mach-ixp23xx/include/mach/ixp23xx.h b/arch/arm/mach-ixp23xx/include/mach/ixp23xx.h deleted file mode 100644 index 6d02481b1d6..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/ixp23xx.h +++ /dev/null @@ -1,298 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/ixp23xx.h - * - * Register definitions for IXP23XX - * - * Copyright (C) 2003-2005 Intel Corporation. - * Copyright (C) 2005 MontaVista Software, Inc. - * - * Maintainer: Deepak Saxena <dsaxena@plexity.net> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_IXP23XX_H -#define __ASM_ARCH_IXP23XX_H - -/* - * IXP2300 linux memory map: - * - * virt		phys		size - * fffd0000	a0000000	64K		XSI2CPP_CSR - * fffc0000	c4000000	4K		EXP_CFG - * fff00000	c8000000	64K		PERIPHERAL - * fe000000	1c0000000	16M		CAP_CSR - * fd000000	1c8000000	16M		MSF_CSR - * fb000000			16M		--- - * fa000000	1d8000000	32M		PCI_IO - * f8000000	1da000000	32M		PCI_CFG - * f6000000	1de000000	32M		PCI_CREG - * f4000000			32M		--- - * f0000000	1e0000000	64M		PCI_MEM - * e[c-f]000000					per-platform mappings - */ - - -/**************************************************************************** - * Static mappings. - ****************************************************************************/ -#define IXP23XX_XSI2CPP_CSR_PHYS	0xa0000000 -#define IXP23XX_XSI2CPP_CSR_VIRT	0xfffd0000 -#define IXP23XX_XSI2CPP_CSR_SIZE	0x00010000 - -#define IXP23XX_EXP_CFG_PHYS		0xc4000000 -#define IXP23XX_EXP_CFG_VIRT		0xfffc0000 -#define IXP23XX_EXP_CFG_SIZE		0x00001000 - -#define IXP23XX_PERIPHERAL_PHYS		0xc8000000 -#define IXP23XX_PERIPHERAL_VIRT		0xfff00000 -#define IXP23XX_PERIPHERAL_SIZE		0x00010000 - -#define IXP23XX_CAP_CSR_PHYS		0x1c0000000ULL -#define IXP23XX_CAP_CSR_VIRT		0xfe000000 -#define IXP23XX_CAP_CSR_SIZE		0x01000000 - -#define IXP23XX_MSF_CSR_PHYS		0x1c8000000ULL -#define IXP23XX_MSF_CSR_VIRT		0xfd000000 -#define IXP23XX_MSF_CSR_SIZE		0x01000000 - -#define IXP23XX_PCI_IO_PHYS		0x1d8000000ULL -#define IXP23XX_PCI_IO_VIRT		0xfa000000 -#define IXP23XX_PCI_IO_SIZE		0x02000000 - -#define IXP23XX_PCI_CFG_PHYS		0x1da000000ULL -#define IXP23XX_PCI_CFG_VIRT		0xf8000000 -#define IXP23XX_PCI_CFG_SIZE		0x02000000 -#define IXP23XX_PCI_CFG0_VIRT		IXP23XX_PCI_CFG_VIRT -#define IXP23XX_PCI_CFG1_VIRT		(IXP23XX_PCI_CFG_VIRT + 0x01000000) - -#define IXP23XX_PCI_CREG_PHYS		0x1de000000ULL -#define IXP23XX_PCI_CREG_VIRT		0xf6000000 -#define IXP23XX_PCI_CREG_SIZE		0x02000000 -#define IXP23XX_PCI_CSR_VIRT		(IXP23XX_PCI_CREG_VIRT + 0x01000000) - -#define IXP23XX_PCI_MEM_START		0xe0000000 -#define IXP23XX_PCI_MEM_PHYS		0x1e0000000ULL -#define IXP23XX_PCI_MEM_VIRT		0xf0000000 -#define IXP23XX_PCI_MEM_SIZE		0x04000000 - - -/**************************************************************************** - * XSI2CPP CSRs. - ****************************************************************************/ -#define IXP23XX_XSI2CPP_REG(x)		((volatile unsigned long *)(IXP23XX_XSI2CPP_CSR_VIRT + (x))) -#define IXP23XX_CPP2XSI_CURR_XFER_REG3	IXP23XX_XSI2CPP_REG(0xf8) -#define IXP23XX_CPP2XSI_ADDR_31		(1 << 19) -#define IXP23XX_CPP2XSI_PSH_OFF		(1 << 20) -#define IXP23XX_CPP2XSI_COH_OFF		(1 << 21) - - -/**************************************************************************** - * Expansion Bus Config. - ****************************************************************************/ -#define IXP23XX_EXP_CFG_REG(x)		((volatile unsigned long *)(IXP23XX_EXP_CFG_VIRT + (x))) -#define IXP23XX_EXP_CS0			IXP23XX_EXP_CFG_REG(0x00) -#define IXP23XX_EXP_CS1			IXP23XX_EXP_CFG_REG(0x04) -#define IXP23XX_EXP_CS2			IXP23XX_EXP_CFG_REG(0x08) -#define IXP23XX_EXP_CS3			IXP23XX_EXP_CFG_REG(0x0c) -#define IXP23XX_EXP_CS4			IXP23XX_EXP_CFG_REG(0x10) -#define IXP23XX_EXP_CS5			IXP23XX_EXP_CFG_REG(0x14) -#define IXP23XX_EXP_CS6			IXP23XX_EXP_CFG_REG(0x18) -#define IXP23XX_EXP_CS7			IXP23XX_EXP_CFG_REG(0x1c) -#define IXP23XX_FLASH_WRITABLE		(0x2) -#define IXP23XX_FLASH_BUS8		(0x1) - -#define IXP23XX_EXP_CFG0		IXP23XX_EXP_CFG_REG(0x20) -#define IXP23XX_EXP_CFG1		IXP23XX_EXP_CFG_REG(0x24) -#define IXP23XX_EXP_CFG0_MEM_MAP		(1 << 31) -#define IXP23XX_EXP_CFG0_XSCALE_SPEED_SEL 	(3 << 22) -#define IXP23XX_EXP_CFG0_XSCALE_SPEED_EN	(1 << 21) -#define IXP23XX_EXP_CFG0_CPP_SPEED_SEL		(3 << 19) -#define IXP23XX_EXP_CFG0_CPP_SPEED_EN		(1 << 18) -#define IXP23XX_EXP_CFG0_PCI_SWIN		(3 << 16) -#define IXP23XX_EXP_CFG0_PCI_DWIN		(3 << 14) -#define IXP23XX_EXP_CFG0_PCI33_MODE		(1 << 13) -#define IXP23XX_EXP_CFG0_QDR_SPEED_SEL		(1 << 12) -#define IXP23XX_EXP_CFG0_CPP_DIV_SEL		(1 << 5) -#define IXP23XX_EXP_CFG0_XSI_NOT_PRES		(1 << 4) -#define IXP23XX_EXP_CFG0_PROM_BOOT		(1 << 3) -#define IXP23XX_EXP_CFG0_PCI_ARB		(1 << 2) -#define IXP23XX_EXP_CFG0_PCI_HOST		(1 << 1) -#define IXP23XX_EXP_CFG0_FLASH_WIDTH		(1 << 0) - -#define IXP23XX_EXP_UNIT_FUSE		IXP23XX_EXP_CFG_REG(0x28) -#define IXP23XX_EXP_MSF_MUX		IXP23XX_EXP_CFG_REG(0x30) -#define IXP23XX_EXP_CFG_FUSE		IXP23XX_EXP_CFG_REG(0x34) - -#define IXP23XX_EXP_BUS_PHYS		0x90000000 -#define IXP23XX_EXP_BUS_WINDOW_SIZE	0x01000000 - -#define IXP23XX_EXP_BUS_CS0_BASE	(IXP23XX_EXP_BUS_PHYS + 0x00000000) -#define IXP23XX_EXP_BUS_CS1_BASE	(IXP23XX_EXP_BUS_PHYS + 0x01000000) -#define IXP23XX_EXP_BUS_CS2_BASE	(IXP23XX_EXP_BUS_PHYS + 0x02000000) -#define IXP23XX_EXP_BUS_CS3_BASE	(IXP23XX_EXP_BUS_PHYS + 0x03000000) -#define IXP23XX_EXP_BUS_CS4_BASE	(IXP23XX_EXP_BUS_PHYS + 0x04000000) -#define IXP23XX_EXP_BUS_CS5_BASE	(IXP23XX_EXP_BUS_PHYS + 0x05000000) -#define IXP23XX_EXP_BUS_CS6_BASE	(IXP23XX_EXP_BUS_PHYS + 0x06000000) -#define IXP23XX_EXP_BUS_CS7_BASE	(IXP23XX_EXP_BUS_PHYS + 0x07000000) - - -/**************************************************************************** - * Peripherals. - ****************************************************************************/ -#define IXP23XX_UART1_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x0000) -#define IXP23XX_UART2_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x1000) -#define IXP23XX_PMU_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x2000) -#define IXP23XX_INTC_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x3000) -#define IXP23XX_GPIO_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x4000) -#define IXP23XX_TIMER_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x5000) -#define IXP23XX_NPE0_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x6000) -#define IXP23XX_DSR_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x7000) -#define IXP23XX_NPE1_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x8000) -#define IXP23XX_ETH0_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x9000) -#define IXP23XX_ETH1_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0xA000) -#define IXP23XX_GIG0_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0xB000) -#define IXP23XX_GIG1_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0xC000) -#define IXP23XX_DDRS_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0xD000) - -#define IXP23XX_UART1_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x0000) -#define IXP23XX_UART2_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x1000) -#define IXP23XX_PMU_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x2000) -#define IXP23XX_INTC_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x3000) -#define IXP23XX_GPIO_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x4000) -#define IXP23XX_TIMER_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x5000) -#define IXP23XX_NPE0_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x6000) -#define IXP23XX_DSR_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x7000) -#define IXP23XX_NPE1_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x8000) -#define IXP23XX_ETH0_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x9000) -#define IXP23XX_ETH1_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0xA000) -#define IXP23XX_GIG0_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0xB000) -#define IXP23XX_GIG1_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0xC000) -#define IXP23XX_DDRS_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0xD000) - - -/**************************************************************************** - * Interrupt controller. - ****************************************************************************/ -#define IXP23XX_INTC_REG(x)		 ((volatile unsigned long *)(IXP23XX_INTC_VIRT + (x))) -#define IXP23XX_INTR_ST1		IXP23XX_INTC_REG(0x00) -#define IXP23XX_INTR_ST2		IXP23XX_INTC_REG(0x04) -#define IXP23XX_INTR_ST3		IXP23XX_INTC_REG(0x08) -#define IXP23XX_INTR_ST4		IXP23XX_INTC_REG(0x0c) -#define IXP23XX_INTR_EN1		IXP23XX_INTC_REG(0x10) -#define IXP23XX_INTR_EN2		IXP23XX_INTC_REG(0x14) -#define IXP23XX_INTR_EN3		IXP23XX_INTC_REG(0x18) -#define IXP23XX_INTR_EN4		IXP23XX_INTC_REG(0x1c) -#define IXP23XX_INTR_SEL1		IXP23XX_INTC_REG(0x20) -#define IXP23XX_INTR_SEL2		IXP23XX_INTC_REG(0x24) -#define IXP23XX_INTR_SEL3		IXP23XX_INTC_REG(0x28) -#define IXP23XX_INTR_SEL4		IXP23XX_INTC_REG(0x2c) -#define IXP23XX_INTR_IRQ_ST1		IXP23XX_INTC_REG(0x30) -#define IXP23XX_INTR_IRQ_ST2		IXP23XX_INTC_REG(0x34) -#define IXP23XX_INTR_IRQ_ST3		IXP23XX_INTC_REG(0x38) -#define IXP23XX_INTR_IRQ_ST4		IXP23XX_INTC_REG(0x3c) -#define IXP23XX_INTR_IRQ_ENC_ST_OFFSET	0x54 - - -/**************************************************************************** - * GPIO. - ****************************************************************************/ -#define IXP23XX_GPIO_REG(x)		((volatile unsigned long *)(IXP23XX_GPIO_VIRT + (x))) -#define IXP23XX_GPIO_GPOUTR		IXP23XX_GPIO_REG(0x00) -#define IXP23XX_GPIO_GPOER		IXP23XX_GPIO_REG(0x04) -#define IXP23XX_GPIO_GPINR		IXP23XX_GPIO_REG(0x08) -#define IXP23XX_GPIO_GPISR		IXP23XX_GPIO_REG(0x0c) -#define IXP23XX_GPIO_GPIT1R		IXP23XX_GPIO_REG(0x10) -#define IXP23XX_GPIO_GPIT2R		IXP23XX_GPIO_REG(0x14) -#define IXP23XX_GPIO_GPCLKR		IXP23XX_GPIO_REG(0x18) -#define IXP23XX_GPIO_GPDBSELR 		IXP23XX_GPIO_REG(0x1c) - -#define IXP23XX_GPIO_STYLE_MASK		0x7 -#define IXP23XX_GPIO_STYLE_ACTIVE_HIGH	0x0 -#define IXP23XX_GPIO_STYLE_ACTIVE_LOW	0x1 -#define IXP23XX_GPIO_STYLE_RISING_EDGE	0x2 -#define IXP23XX_GPIO_STYLE_FALLING_EDGE	0x3 -#define IXP23XX_GPIO_STYLE_TRANSITIONAL	0x4 - -#define IXP23XX_GPIO_STYLE_SIZE		3 - - -/**************************************************************************** - * Timer. - ****************************************************************************/ -#define IXP23XX_TIMER_REG(x)		((volatile unsigned long *)(IXP23XX_TIMER_VIRT + (x))) -#define IXP23XX_TIMER_CONT		IXP23XX_TIMER_REG(0x00) -#define IXP23XX_TIMER1_TIMESTAMP	IXP23XX_TIMER_REG(0x04) -#define IXP23XX_TIMER1_RELOAD		IXP23XX_TIMER_REG(0x08) -#define IXP23XX_TIMER2_TIMESTAMP	IXP23XX_TIMER_REG(0x0c) -#define IXP23XX_TIMER2_RELOAD		IXP23XX_TIMER_REG(0x10) -#define IXP23XX_TIMER_WDOG		IXP23XX_TIMER_REG(0x14) -#define IXP23XX_TIMER_WDOG_EN		IXP23XX_TIMER_REG(0x18) -#define IXP23XX_TIMER_WDOG_KEY		IXP23XX_TIMER_REG(0x1c) -#define IXP23XX_TIMER_WDOG_KEY_MAGIC	0x482e -#define IXP23XX_TIMER_STATUS		IXP23XX_TIMER_REG(0x20) -#define IXP23XX_TIMER_SOFT_RESET	IXP23XX_TIMER_REG(0x24) -#define IXP23XX_TIMER_SOFT_RESET_EN	IXP23XX_TIMER_REG(0x28) - -#define IXP23XX_TIMER_ENABLE		(1 << 0) -#define IXP23XX_TIMER_ONE_SHOT		(1 << 1) -/* Low order bits of reload value ignored */ -#define IXP23XX_TIMER_RELOAD_MASK	(0x3) -#define IXP23XX_TIMER_DISABLED		(0x0) -#define IXP23XX_TIMER1_INT_PEND		(1 << 0) -#define IXP23XX_TIMER2_INT_PEND		(1 << 1) -#define IXP23XX_TIMER_STATUS_TS_PEND	(1 << 2) -#define IXP23XX_TIMER_STATUS_WDOG_PEND	(1 << 3) -#define IXP23XX_TIMER_STATUS_WARM_RESET	(1 << 4) - - -/**************************************************************************** - * CAP CSRs. - ****************************************************************************/ -#define IXP23XX_GLOBAL_REG(x)		((volatile unsigned long *)(IXP23XX_CAP_CSR_VIRT + 0x4a00 + (x))) -#define IXP23XX_PRODUCT_ID		IXP23XX_GLOBAL_REG(0x00) -#define IXP23XX_MISC_CONTROL		IXP23XX_GLOBAL_REG(0x04) -#define IXP23XX_MSF_CLK_CNTRL		IXP23XX_GLOBAL_REG(0x08) -#define IXP23XX_RESET0			IXP23XX_GLOBAL_REG(0x0c) -#define IXP23XX_RESET1			IXP23XX_GLOBAL_REG(0x10) -#define IXP23XX_STRAP_OPTIONS		IXP23XX_GLOBAL_REG(0x18) - -#define IXP23XX_ENABLE_WATCHDOG		(1 << 24) -#define IXP23XX_SHPC_INIT_COMP		(1 << 21) -#define IXP23XX_RST_ALL			(1 << 16) -#define IXP23XX_RESET_PCI		(1 << 2) -#define IXP23XX_PCI_UNIT_RESET		(1 << 1) -#define IXP23XX_XSCALE_RESET		(1 << 0) - -#define IXP23XX_UENGINE_CSR_VIRT_BASE	(IXP23XX_CAP_CSR_VIRT + 0x18000) - - -/**************************************************************************** - * PCI CSRs. - ****************************************************************************/ -#define IXP23XX_PCI_CREG(x)		((volatile unsigned long *)(IXP23XX_PCI_CREG_VIRT + (x))) -#define IXP23XX_PCI_CMDSTAT		IXP23XX_PCI_CREG(0x04) -#define IXP23XX_PCI_SRAM_BAR		IXP23XX_PCI_CREG(0x14) -#define IXP23XX_PCI_SDRAM_BAR		IXP23XX_PCI_CREG(0x18) - - -#define IXP23XX_PCI_CSR(x)		((volatile unsigned long *)(IXP23XX_PCI_CREG_VIRT + 0x01000000 + (x))) -#define IXP23XX_PCI_OUT_INT_STATUS	IXP23XX_PCI_CSR(0x0030) -#define IXP23XX_PCI_OUT_INT_MASK	IXP23XX_PCI_CSR(0x0034) -#define IXP23XX_PCI_SRAM_BASE_ADDR_MASK IXP23XX_PCI_CSR(0x00fc) -#define IXP23XX_PCI_DRAM_BASE_ADDR_MASK IXP23XX_PCI_CSR(0x0100) -#define IXP23XX_PCI_CONTROL		IXP23XX_PCI_CSR(0x013c) -#define IXP23XX_PCI_ADDR_EXT		IXP23XX_PCI_CSR(0x0140) -#define IXP23XX_PCI_ME_PUSH_STATUS	IXP23XX_PCI_CSR(0x0148) -#define IXP23XX_PCI_ME_PUSH_EN		IXP23XX_PCI_CSR(0x014c) -#define IXP23XX_PCI_ERR_STATUS		IXP23XX_PCI_CSR(0x0150) -#define IXP23XX_PCI_ERROR_STATUS	IXP23XX_PCI_CSR(0x0150) -#define IXP23XX_PCI_ERR_ENABLE		IXP23XX_PCI_CSR(0x0154) -#define IXP23XX_PCI_XSCALE_INT_STATUS	IXP23XX_PCI_CSR(0x0158) -#define IXP23XX_PCI_XSCALE_INT_ENABLE	IXP23XX_PCI_CSR(0x015c) -#define IXP23XX_PCI_CPP_ADDR_BITS	IXP23XX_PCI_CSR(0x0160) - - -#endif diff --git a/arch/arm/mach-ixp23xx/include/mach/memory.h b/arch/arm/mach-ixp23xx/include/mach/memory.h deleted file mode 100644 index 6ef65d813f1..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/memory.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/memory.h - * - * Copyright (c) 2003-2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include <mach/hardware.h> - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET		(0x00000000) - -#define IXP23XX_PCI_SDRAM_OFFSET (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) & 0xfffffff0) - -#define __phys_to_bus(x)	((x) + (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET)) -#define __bus_to_phys(x)	((x) - (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET)) - -#define __virt_to_bus(v)	__phys_to_bus(__virt_to_phys(v)) -#define __bus_to_virt(b)	__phys_to_virt(__bus_to_phys(b)) -#define __pfn_to_bus(p)		__phys_to_bus(__pfn_to_phys(p)) -#define __bus_to_pfn(b)		__phys_to_pfn(__bus_to_phys(b)) - -#define arch_is_coherent()	1 - -#endif diff --git a/arch/arm/mach-ixp23xx/include/mach/platform.h b/arch/arm/mach-ixp23xx/include/mach/platform.h deleted file mode 100644 index db9d9416e5e..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/platform.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/platform.h - * - * Various bits of code used by platform-level code. - * - * Author: Deepak Saxena <dsaxena@plexity.net> - * - * Copyright 2005 (c) MontaVista Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASSEMBLY__ - -static inline unsigned long ixp2000_reg_read(volatile void *reg) -{ -	return *((volatile unsigned long *)reg); -} - -static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) -{ -	*((volatile unsigned long *)reg) = val; -} - -static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) -{ -	*((volatile unsigned long *)reg) = val; -} - -struct pci_sys_data; - -void ixp23xx_map_io(void); -void ixp23xx_init_irq(void); -void ixp23xx_sys_init(void); -int ixp23xx_pci_setup(int, struct pci_sys_data *); -void ixp23xx_pci_preinit(void); -struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*); -void ixp23xx_pci_slave_init(void); - -extern struct sys_timer ixp23xx_timer; - -#define IXP23XX_UART_XTAL		14745600 - -#ifndef __ASSEMBLY__ -/* - * Is system memory on the XSI or CPP bus? - */ -static inline unsigned ixp23xx_cpp_boot(void) -{ -	return (*IXP23XX_EXP_CFG0 & IXP23XX_EXP_CFG0_XSI_NOT_PRES); -} -#endif - - -#endif diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h deleted file mode 100644 index 8920ff2dff1..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/system.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/system.h - * - * Copyright (C) 2003 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <mach/hardware.h> -#include <asm/mach-types.h> - -static inline void arch_idle(void) -{ -#if 0 -	if (!hlt_counter) -		cpu_do_idle(); -#endif -} - -static inline void arch_reset(char mode, const char *cmd) -{ -	/* First try machine specific support */ -	if (machine_is_ixdp2351()) { -		*IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC; -		(void) *IXDP2351_CPLD_RESET1_REG; -		*IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE; -	} - -	/* Use on-chip reset capability */ -	*IXP23XX_RESET0 |= IXP23XX_RST_ALL; -} diff --git a/arch/arm/mach-ixp23xx/include/mach/time.h b/arch/arm/mach-ixp23xx/include/mach/time.h deleted file mode 100644 index b61dafc884a..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/time.h +++ /dev/null @@ -1,3 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/time.h - */ diff --git a/arch/arm/mach-ixp23xx/include/mach/timex.h b/arch/arm/mach-ixp23xx/include/mach/timex.h deleted file mode 100644 index e341e9cf9c3..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/timex.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/timex.h - * - * XScale architecture timex specifications - */ - -#define CLOCK_TICK_RATE 75000000 diff --git a/arch/arm/mach-ixp23xx/include/mach/uncompress.h b/arch/arm/mach-ixp23xx/include/mach/uncompress.h deleted file mode 100644 index 8b4c358d2c0..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/uncompress.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/uncompress.h - * - * Copyright (C) 2002-2004 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H - -#include <mach/ixp23xx.h> -#include <linux/serial_reg.h> - -#define UART_BASE	((volatile u32 *)IXP23XX_UART1_PHYS) - -static inline void putc(char c) -{ -	int j; - -	for (j = 0; j < 0x1000; j++) { -		if (UART_BASE[UART_LSR] & UART_LSR_THRE) -			break; -		barrier(); -	} - -	UART_BASE[UART_TX] = c; -} - -static inline void flush(void) -{ -} - -#define arch_decomp_setup() -#define arch_decomp_wdog() - - -#endif diff --git a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h b/arch/arm/mach-ixp23xx/include/mach/vmalloc.h deleted file mode 100644 index 896c56a1c00..00000000000 --- a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/vmalloc.h - * - * Copyright (c) 2005 MontaVista Software, Inc. - * - * NPU mappings end at 0xf0000000 and we allocate 64MB for board - * specific static I/O. - */ - -#define VMALLOC_END	(0xec000000UL)  | 
