diff options
Diffstat (limited to 'arch/arm/mach-imx/mm-imx3.c')
| -rw-r--r-- | arch/arm/mach-imx/mm-imx3.c | 129 |
1 files changed, 82 insertions, 47 deletions
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 31807d2a8b7..0884ca90d15 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -19,50 +19,54 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/err.h> +#include <linux/pinctrl/machine.h> #include <asm/pgtable.h> +#include <asm/system_misc.h> #include <asm/hardware/cache-l2x0.h> #include <asm/mach/map.h> -#include <mach/common.h> -#include <mach/devices-common.h> -#include <mach/hardware.h> -#include <mach/iomux-v3.h> -#include <mach/irqs.h> +#include "common.h" +#include "crmregs-imx3.h" +#include "devices/devices-common.h" +#include "hardware.h" +#include "iomux-v3.h" + +void __iomem *mx3_ccm_base; static void imx3_idle(void) { unsigned long reg = 0; - if (!need_resched()) - __asm__ __volatile__( - /* disable I and D cache */ - "mrc p15, 0, %0, c1, c0, 0\n" - "bic %0, %0, #0x00001000\n" - "bic %0, %0, #0x00000004\n" - "mcr p15, 0, %0, c1, c0, 0\n" - /* invalidate I cache */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c5, 0\n" - /* clear and invalidate D cache */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c14, 0\n" - /* WFI */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c0, 4\n" - "nop\n" "nop\n" "nop\n" "nop\n" - "nop\n" "nop\n" "nop\n" - /* enable I and D cache */ - "mrc p15, 0, %0, c1, c0, 0\n" - "orr %0, %0, #0x00001000\n" - "orr %0, %0, #0x00000004\n" - "mcr p15, 0, %0, c1, c0, 0\n" - : "=r" (reg)); - local_irq_enable(); + mx3_cpu_lp_set(MX3_WAIT); + + __asm__ __volatile__( + /* disable I and D cache */ + "mrc p15, 0, %0, c1, c0, 0\n" + "bic %0, %0, #0x00001000\n" + "bic %0, %0, #0x00000004\n" + "mcr p15, 0, %0, c1, c0, 0\n" + /* invalidate I cache */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c5, 0\n" + /* clear and invalidate D cache */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c14, 0\n" + /* WFI */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c0, 4\n" + "nop\n" "nop\n" "nop\n" "nop\n" + "nop\n" "nop\n" "nop\n" + /* enable I and D cache */ + "mrc p15, 0, %0, c1, c0, 0\n" + "orr %0, %0, #0x00001000\n" + "orr %0, %0, #0x00000004\n" + "mcr p15, 0, %0, c1, c0, 0\n" + : "=r" (reg)); } -static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, - unsigned int mtype) +static void __iomem *imx3_ioremap_caller(phys_addr_t phys_addr, size_t size, + unsigned int mtype, void *caller) { if (mtype == MT_DEVICE) { /* @@ -75,11 +79,12 @@ static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, mtype = MT_DEVICE_NONSHARED; } - return __arm_ioremap(phys_addr, size, mtype); + return __arm_ioremap_caller(phys_addr, size, mtype, caller); } -void imx3_init_l2x0(void) +static void __init imx3_init_l2x0(void) { +#ifdef CONFIG_CACHE_L2X0 void __iomem *l2x0_base; void __iomem *clkctl_base; @@ -102,13 +107,13 @@ void imx3_init_l2x0(void) } l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096); - if (IS_ERR(l2x0_base)) { - printk(KERN_ERR "remapping L2 cache area failed with %ld\n", - PTR_ERR(l2x0_base)); + if (!l2x0_base) { + printk(KERN_ERR "remapping L2 cache area failed\n"); return; } l2x0_init(l2x0_base, 0x00030024, 0x00000000); +#endif } #ifdef CONFIG_SOC_IMX31 @@ -133,9 +138,9 @@ void __init mx31_map_io(void) void __init imx31_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX31); - mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); - pm_idle = imx3_idle; - imx_ioremap = imx3_ioremap; + arch_ioremap_caller = imx3_ioremap_caller; + arm_pm_idle = imx3_idle; + mx3_ccm_base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR); } void __init mx31_init_irq(void) @@ -158,16 +163,25 @@ static struct sdma_platform_data imx31_sdma_pdata __initdata = { .script_addrs = &imx31_to2_sdma_script, }; +static const struct resource imx31_audmux_res[] __initconst = { + DEFINE_RES_MEM(MX31_AUDMUX_BASE_ADDR, SZ_16K), +}; + void __init imx31_soc_init(void) { int to_version = mx31_revision() >> 4; imx3_init_l2x0(); + mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); + mxc_device_init(); + mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); + pinctrl_provide_dummies(); + if (to_version == 1) { strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin", strlen(imx31_sdma_pdata.fw_name)); @@ -175,6 +189,12 @@ void __init imx31_soc_init(void) } imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); + + imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS1_BASE_ADDR)); + imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS2_BASE_ADDR)); + + platform_device_register_simple("imx31-audmux", 0, imx31_audmux_res, + ARRAY_SIZE(imx31_audmux_res)); } #endif /* ifdef CONFIG_SOC_IMX31 */ @@ -196,9 +216,9 @@ void __init imx35_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX35); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); - mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); - pm_idle = imx3_idle; - imx_ioremap = imx3_ioremap; + arm_pm_idle = imx3_idle; + arch_ioremap_caller = imx3_ioremap_caller; + mx3_ccm_base = MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR); } void __init mx35_init_irq(void) @@ -241,17 +261,24 @@ static struct sdma_platform_data imx35_sdma_pdata __initdata = { .script_addrs = &imx35_to2_sdma_script, }; +static const struct resource imx35_audmux_res[] __initconst = { + DEFINE_RES_MEM(MX35_AUDMUX_BASE_ADDR, SZ_16K), +}; + void __init imx35_soc_init(void) { int to_version = mx35_revision() >> 4; imx3_init_l2x0(); - /* i.mx35 has the i.mx31 type gpio */ - mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); - mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); - mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); + mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); + mxc_device_init(); + + mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); + mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); + mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); + pinctrl_provide_dummies(); if (to_version == 1) { strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin", strlen(imx35_sdma_pdata.fw_name)); @@ -259,5 +286,13 @@ void __init imx35_soc_init(void) } imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); + + /* Setup AIPS registers */ + imx_set_aips(MX35_IO_ADDRESS(MX35_AIPS1_BASE_ADDR)); + imx_set_aips(MX35_IO_ADDRESS(MX35_AIPS2_BASE_ADDR)); + + /* i.mx35 has the i.mx31 type audmux */ + platform_device_register_simple("imx31-audmux", 0, imx35_audmux_res, + ARRAY_SIZE(imx35_audmux_res)); } #endif /* ifdef CONFIG_SOC_IMX35 */ |