diff options
Diffstat (limited to 'arch/arm/mach-gemini/gpio.c')
| -rw-r--r-- | arch/arm/mach-gemini/gpio.c | 57 |
1 files changed, 28 insertions, 29 deletions
diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c index fe3bd5ac8b1..f8cb5710d6e 100644 --- a/arch/arm/mach-gemini/gpio.c +++ b/arch/arm/mach-gemini/gpio.c @@ -23,6 +23,7 @@ #include <mach/irqs.h> #define GPIO_BASE(x) IO_ADDRESS(GEMINI_GPIO_BASE(x)) +#define irq_to_gpio(x) ((x) - GPIO_IRQ_BASE) /* GPIO registers definition */ #define GPIO_DATA_OUT 0x0 @@ -44,7 +45,7 @@ #define GPIO_PORT_NUM 3 -static void _set_gpio_irqenable(unsigned int base, unsigned int index, +static void _set_gpio_irqenable(void __iomem *base, unsigned int index, int enable) { unsigned int reg; @@ -54,35 +55,35 @@ static void _set_gpio_irqenable(unsigned int base, unsigned int index, __raw_writel(reg, base + GPIO_INT_EN); } -static void gpio_ack_irq(unsigned int irq) +static void gpio_ack_irq(struct irq_data *d) { - unsigned int gpio = irq_to_gpio(irq); - unsigned int base = GPIO_BASE(gpio / 32); + unsigned int gpio = irq_to_gpio(d->irq); + void __iomem *base = GPIO_BASE(gpio / 32); __raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR); } -static void gpio_mask_irq(unsigned int irq) +static void gpio_mask_irq(struct irq_data *d) { - unsigned int gpio = irq_to_gpio(irq); - unsigned int base = GPIO_BASE(gpio / 32); + unsigned int gpio = irq_to_gpio(d->irq); + void __iomem *base = GPIO_BASE(gpio / 32); _set_gpio_irqenable(base, gpio % 32, 0); } -static void gpio_unmask_irq(unsigned int irq) +static void gpio_unmask_irq(struct irq_data *d) { - unsigned int gpio = irq_to_gpio(irq); - unsigned int base = GPIO_BASE(gpio / 32); + unsigned int gpio = irq_to_gpio(d->irq); + void __iomem *base = GPIO_BASE(gpio / 32); _set_gpio_irqenable(base, gpio % 32, 1); } -static int gpio_set_irq_type(unsigned int irq, unsigned int type) +static int gpio_set_irq_type(struct irq_data *d, unsigned int type) { - unsigned int gpio = irq_to_gpio(irq); + unsigned int gpio = irq_to_gpio(d->irq); unsigned int gpio_mask = 1 << (gpio % 32); - unsigned int base = GPIO_BASE(gpio / 32); + void __iomem *base = GPIO_BASE(gpio / 32); unsigned int reg_both, reg_level, reg_type; reg_type = __raw_readl(base + GPIO_INT_TYPE); @@ -120,15 +121,15 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type) __raw_writel(reg_level, base + GPIO_INT_LEVEL); __raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE); - gpio_ack_irq(irq); + gpio_ack_irq(d); return 0; } static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) { + unsigned int port = (unsigned int)irq_desc_get_handler_data(desc); unsigned int gpio_irq_no, irq_stat; - unsigned int port = (unsigned int)get_irq_data(irq); irq_stat = __raw_readl(GPIO_BASE(port) + GPIO_INT_STAT); @@ -138,24 +139,22 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) if ((irq_stat & 1) == 0) continue; - BUG_ON(!(irq_desc[gpio_irq_no].handle_irq)); - irq_desc[gpio_irq_no].handle_irq(gpio_irq_no, - &irq_desc[gpio_irq_no]); + generic_handle_irq(gpio_irq_no); } } static struct irq_chip gpio_irq_chip = { .name = "GPIO", - .ack = gpio_ack_irq, - .mask = gpio_mask_irq, - .unmask = gpio_unmask_irq, - .set_type = gpio_set_irq_type, + .irq_ack = gpio_ack_irq, + .irq_mask = gpio_mask_irq, + .irq_unmask = gpio_unmask_irq, + .irq_set_type = gpio_set_irq_type, }; static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, int dir) { - unsigned int base = GPIO_BASE(offset / 32); + void __iomem *base = GPIO_BASE(offset / 32); unsigned int reg; reg = __raw_readl(base + GPIO_DIR); @@ -168,7 +167,7 @@ static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, static void gemini_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { - unsigned int base = GPIO_BASE(offset / 32); + void __iomem *base = GPIO_BASE(offset / 32); if (value) __raw_writel(1 << (offset % 32), base + GPIO_DATA_SET); @@ -178,7 +177,7 @@ static void gemini_gpio_set(struct gpio_chip *chip, unsigned offset, int value) static int gemini_gpio_get(struct gpio_chip *chip, unsigned offset) { - unsigned int base = GPIO_BASE(offset / 32); + void __iomem *base = GPIO_BASE(offset / 32); return (__raw_readl(base + GPIO_DATA_IN) >> (offset % 32)) & 1; } @@ -219,13 +218,13 @@ void __init gemini_gpio_init(void) for (j = GPIO_IRQ_BASE + i * 32; j < GPIO_IRQ_BASE + (i + 1) * 32; j++) { - set_irq_chip(j, &gpio_irq_chip); - set_irq_handler(j, handle_edge_irq); + irq_set_chip_and_handler(j, &gpio_irq_chip, + handle_edge_irq); set_irq_flags(j, IRQF_VALID); } - set_irq_chained_handler(IRQ_GPIO(i), gpio_irq_handler); - set_irq_data(IRQ_GPIO(i), (void *)i); + irq_set_chained_handler(IRQ_GPIO(i), gpio_irq_handler); + irq_set_handler_data(IRQ_GPIO(i), (void *)i); } BUG_ON(gpiochip_add(&gemini_gpio_chip)); |