diff options
Diffstat (limited to 'arch/arm/mach-dove')
| -rw-r--r-- | arch/arm/mach-dove/Kconfig | 11 | ||||
| -rw-r--r-- | arch/arm/mach-dove/Makefile | 5 | ||||
| -rw-r--r-- | arch/arm/mach-dove/board-dt.c | 92 | ||||
| -rw-r--r-- | arch/arm/mach-dove/common.c | 90 | ||||
| -rw-r--r-- | arch/arm/mach-dove/common.h | 4 | ||||
| -rw-r--r-- | arch/arm/mach-dove/include/mach/bridge-regs.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-dove/include/mach/debug-macro.S | 19 | ||||
| -rw-r--r-- | arch/arm/mach-dove/include/mach/timex.h | 9 | ||||
| -rw-r--r-- | arch/arm/mach-dove/irq.c | 36 | ||||
| -rw-r--r-- | arch/arm/mach-dove/mpp.c | 2 |
10 files changed, 95 insertions, 175 deletions
diff --git a/arch/arm/mach-dove/Kconfig b/arch/arm/mach-dove/Kconfig index 36469d81395..d8c439c89ea 100644 --- a/arch/arm/mach-dove/Kconfig +++ b/arch/arm/mach-dove/Kconfig @@ -20,17 +20,6 @@ config MACH_CM_A510 Say 'Y' here if you want your kernel to support the CompuLab CM-A510 Board. -config MACH_DOVE_DT - bool "Marvell Dove Flattened Device Tree" - select MVEBU_CLK_CORE - select MVEBU_CLK_GATING - select REGULATOR - select REGULATOR_FIXED_VOLTAGE - select USE_OF - help - Say 'Y' here if you want your kernel to support the - Marvell Dove using flattened device tree. - endmenu endif diff --git a/arch/arm/mach-dove/Makefile b/arch/arm/mach-dove/Makefile index 4d9d2ffc453..b608a21919f 100644 --- a/arch/arm/mach-dove/Makefile +++ b/arch/arm/mach-dove/Makefile @@ -1,6 +1,5 @@ -obj-y += common.o irq.o -obj-$(CONFIG_DOVE_LEGACY) += mpp.o +obj-y += common.o +obj-$(CONFIG_DOVE_LEGACY) += irq.o mpp.o obj-$(CONFIG_PCI) += pcie.o obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o -obj-$(CONFIG_MACH_DOVE_DT) += board-dt.o obj-$(CONFIG_MACH_CM_A510) += cm-a510.o diff --git a/arch/arm/mach-dove/board-dt.c b/arch/arm/mach-dove/board-dt.c deleted file mode 100644 index 0b142803b2e..00000000000 --- a/arch/arm/mach-dove/board-dt.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * arch/arm/mach-dove/board-dt.c - * - * Marvell Dove 88AP510 System On Chip FDT Board - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <linux/init.h> -#include <linux/clk-provider.h> -#include <linux/clk/mvebu.h> -#include <linux/of.h> -#include <linux/of_platform.h> -#include <linux/platform_data/usb-ehci-orion.h> -#include <asm/hardware/cache-tauros2.h> -#include <asm/mach/arch.h> -#include <mach/pm.h> -#include <plat/common.h> -#include <plat/irq.h> -#include "common.h" - -/* - * There are still devices that doesn't even know about DT, - * get clock gates here and add a clock lookup. - */ -static void __init dove_legacy_clk_init(void) -{ - struct device_node *np = of_find_compatible_node(NULL, NULL, - "marvell,dove-gating-clock"); - struct of_phandle_args clkspec; - - clkspec.np = np; - clkspec.args_count = 1; - - clkspec.args[0] = CLOCK_GATING_BIT_GBE; - orion_clkdev_add(NULL, "mv643xx_eth_port.0", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_PCIE0; - orion_clkdev_add("0", "pcie", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_PCIE1; - orion_clkdev_add("1", "pcie", - of_clk_get_from_provider(&clkspec)); -} - -static void __init dove_of_clk_init(void) -{ - mvebu_clocks_init(); - dove_legacy_clk_init(); -} - -static struct mv643xx_eth_platform_data dove_dt_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT, -}; - -static void __init dove_dt_init(void) -{ - pr_info("Dove 88AP510 SoC\n"); - -#ifdef CONFIG_CACHE_TAUROS2 - tauros2_init(0); -#endif - dove_setup_cpu_wins(); - - /* Setup root of clk tree */ - dove_of_clk_init(); - - /* Internal devices not ported to DT yet */ - dove_ge00_init(&dove_dt_ge00_data); - dove_pcie_init(1, 1); - - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); -} - -static const char * const dove_dt_board_compat[] = { - "marvell,dove", - NULL -}; - -DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)") - .map_io = dove_map_io, - .init_early = dove_init_early, - .init_irq = orion_dt_init_irq, - .init_time = dove_timer_init, - .init_machine = dove_dt_init, - .restart = dove_restart, - .dt_compat = dove_dt_board_compat, -MACHINE_END diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index e2b5da031f9..0d1a89298ec 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -9,7 +9,6 @@ */ #include <linux/clk-provider.h> -#include <linux/clk/mvebu.h> #include <linux/dma-mapping.h> #include <linux/init.h> #include <linux/of.h> @@ -28,6 +27,22 @@ #include <plat/time.h> #include "common.h" +/* These can go away once Dove uses the mvebu-mbus DT binding */ +#define DOVE_MBUS_PCIE0_MEM_TARGET 0x4 +#define DOVE_MBUS_PCIE0_MEM_ATTR 0xe8 +#define DOVE_MBUS_PCIE0_IO_TARGET 0x4 +#define DOVE_MBUS_PCIE0_IO_ATTR 0xe0 +#define DOVE_MBUS_PCIE1_MEM_TARGET 0x8 +#define DOVE_MBUS_PCIE1_MEM_ATTR 0xe8 +#define DOVE_MBUS_PCIE1_IO_TARGET 0x8 +#define DOVE_MBUS_PCIE1_IO_ATTR 0xe0 +#define DOVE_MBUS_CESA_TARGET 0x3 +#define DOVE_MBUS_CESA_ATTR 0x1 +#define DOVE_MBUS_BOOTROM_TARGET 0x1 +#define DOVE_MBUS_BOOTROM_ATTR 0xfd +#define DOVE_MBUS_SCRATCHPAD_TARGET 0xd +#define DOVE_MBUS_SCRATCHPAD_ATTR 0x0 + /***************************************************************************** * I/O Address Mapping ****************************************************************************/ @@ -109,8 +124,8 @@ static void __init dove_clk_init(void) orion_clkdev_add(NULL, "sdhci-dove.1", sdio1); orion_clkdev_add(NULL, "orion_nand", nand); orion_clkdev_add(NULL, "cafe1000-ccic.0", camera); - orion_clkdev_add(NULL, "kirkwood-i2s.0", i2s0); - orion_clkdev_add(NULL, "kirkwood-i2s.1", i2s1); + orion_clkdev_add(NULL, "mvebu-audio.0", i2s0); + orion_clkdev_add(NULL, "mvebu-audio.1", i2s1); orion_clkdev_add(NULL, "mv_crypto", crypto); orion_clkdev_add(NULL, "dove-ac97", ac97); orion_clkdev_add(NULL, "dove-pdma", pdma); @@ -147,7 +162,7 @@ void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) /***************************************************************************** * SoC RTC ****************************************************************************/ -void __init dove_rtc_init(void) +static void __init dove_rtc_init(void) { orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC); } @@ -242,18 +257,9 @@ void __init dove_timer_init(void) } /***************************************************************************** - * Cryptographic Engines and Security Accelerator (CESA) - ****************************************************************************/ -void __init dove_crypto_init(void) -{ - orion_crypto_init(DOVE_CRYPT_PHYS_BASE, DOVE_CESA_PHYS_BASE, - DOVE_CESA_SIZE, IRQ_DOVE_CRYPTO); -} - -/***************************************************************************** * XOR 0 ****************************************************************************/ -void __init dove_xor0_init(void) +static void __init dove_xor0_init(void) { orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE, IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01); @@ -262,7 +268,7 @@ void __init dove_xor0_init(void) /***************************************************************************** * XOR 1 ****************************************************************************/ -void __init dove_xor1_init(void) +static void __init dove_xor1_init(void) { orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE, IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11); @@ -333,34 +339,40 @@ void __init dove_setup_cpu_wins(void) { /* * The PCIe windows will no longer be statically allocated - * here once Dove is migrated to the pci-mvebu driver. + * here once Dove is migrated to the pci-mvebu driver. The + * non-PCIe windows will no longer be created here once Dove + * fully moves to DT. */ - mvebu_mbus_add_window_remap_flags("pcie0.0", + mvebu_mbus_add_window_remap_by_id(DOVE_MBUS_PCIE0_IO_TARGET, + DOVE_MBUS_PCIE0_IO_ATTR, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE, - DOVE_PCIE0_IO_BUS_BASE, - MVEBU_MBUS_PCI_IO); - mvebu_mbus_add_window_remap_flags("pcie1.0", + DOVE_PCIE0_IO_BUS_BASE); + mvebu_mbus_add_window_remap_by_id(DOVE_MBUS_PCIE1_IO_TARGET, + DOVE_MBUS_PCIE1_IO_ATTR, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE, - DOVE_PCIE1_IO_BUS_BASE, - MVEBU_MBUS_PCI_IO); - mvebu_mbus_add_window_remap_flags("pcie0.0", - DOVE_PCIE0_MEM_PHYS_BASE, - DOVE_PCIE0_MEM_SIZE, - MVEBU_MBUS_NO_REMAP, - MVEBU_MBUS_PCI_MEM); - mvebu_mbus_add_window_remap_flags("pcie1.0", - DOVE_PCIE1_MEM_PHYS_BASE, - DOVE_PCIE1_MEM_SIZE, - MVEBU_MBUS_NO_REMAP, - MVEBU_MBUS_PCI_MEM); - mvebu_mbus_add_window("cesa", DOVE_CESA_PHYS_BASE, - DOVE_CESA_SIZE); - mvebu_mbus_add_window("bootrom", DOVE_BOOTROM_PHYS_BASE, - DOVE_BOOTROM_SIZE); - mvebu_mbus_add_window("scratchpad", DOVE_SCRATCHPAD_PHYS_BASE, - DOVE_SCRATCHPAD_SIZE); + DOVE_PCIE1_IO_BUS_BASE); + mvebu_mbus_add_window_by_id(DOVE_MBUS_PCIE0_MEM_TARGET, + DOVE_MBUS_PCIE0_MEM_ATTR, + DOVE_PCIE0_MEM_PHYS_BASE, + DOVE_PCIE0_MEM_SIZE); + mvebu_mbus_add_window_by_id(DOVE_MBUS_PCIE1_MEM_TARGET, + DOVE_MBUS_PCIE1_MEM_ATTR, + DOVE_PCIE1_MEM_PHYS_BASE, + DOVE_PCIE1_MEM_SIZE); + mvebu_mbus_add_window_by_id(DOVE_MBUS_CESA_TARGET, + DOVE_MBUS_CESA_ATTR, + DOVE_CESA_PHYS_BASE, + DOVE_CESA_SIZE); + mvebu_mbus_add_window_by_id(DOVE_MBUS_BOOTROM_TARGET, + DOVE_MBUS_BOOTROM_ATTR, + DOVE_BOOTROM_PHYS_BASE, + DOVE_BOOTROM_SIZE); + mvebu_mbus_add_window_by_id(DOVE_MBUS_SCRATCHPAD_TARGET, + DOVE_MBUS_SCRATCHPAD_ATTR, + DOVE_SCRATCHPAD_PHYS_BASE, + DOVE_SCRATCHPAD_SIZE); } void __init dove_init(void) @@ -382,7 +394,7 @@ void __init dove_init(void) dove_xor1_init(); } -void dove_restart(char mode, const char *cmd) +void dove_restart(enum reboot_mode mode, const char *cmd) { /* * Enable soft reset to assert RSTOUTn. diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h index e86347928b6..1d725224d14 100644 --- a/arch/arm/mach-dove/common.h +++ b/arch/arm/mach-dove/common.h @@ -11,6 +11,8 @@ #ifndef __ARCH_DOVE_COMMON_H #define __ARCH_DOVE_COMMON_H +#include <linux/reboot.h> + struct mv643xx_eth_platform_data; struct mv_sata_platform_data; @@ -42,6 +44,6 @@ void dove_spi1_init(void); void dove_i2c_init(void); void dove_sdio0_init(void); void dove_sdio1_init(void); -void dove_restart(char, const char *); +void dove_restart(enum reboot_mode, const char *); #endif diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h index 99f259e8cf3..f4a5b34489b 100644 --- a/arch/arm/mach-dove/include/mach/bridge-regs.h +++ b/arch/arm/mach-dove/include/mach/bridge-regs.h @@ -21,11 +21,13 @@ #define CPU_CTRL_PCIE1_LINK 0x00000008 #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) +#define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108) #define SOFT_RESET_OUT_EN 0x00000004 #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) #define SOFT_RESET 0x00000001 +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110) #define BRIDGE_INT_TIMER1_CLR (~0x0004) #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) diff --git a/arch/arm/mach-dove/include/mach/debug-macro.S b/arch/arm/mach-dove/include/mach/debug-macro.S deleted file mode 100644 index 5929cbc5916..00000000000 --- a/arch/arm/mach-dove/include/mach/debug-macro.S +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-dove/include/mach/debug-macro.S - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <mach/bridge-regs.h> - - .macro addruart, rp, rv, tmp - ldr \rp, =DOVE_SB_REGS_PHYS_BASE - ldr \rv, =DOVE_SB_REGS_VIRT_BASE - orr \rp, \rp, #0x00012000 - orr \rv, \rv, #0x00012000 - .endm - -#define UART_SHIFT 2 -#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/mach-dove/include/mach/timex.h b/arch/arm/mach-dove/include/mach/timex.h deleted file mode 100644 index 251d538541d..00000000000 --- a/arch/arm/mach-dove/include/mach/timex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * arch/arm/mach-dove/include/mach/timex.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c index bc4344aa100..4a5a7aedcb7 100644 --- a/arch/arm/mach-dove/irq.c +++ b/arch/arm/mach-dove/irq.c @@ -108,6 +108,38 @@ static int __initdata gpio2_irqs[4] = { 0, }; +#ifdef CONFIG_MULTI_IRQ_HANDLER +/* + * Compiling with both non-DT and DT support enabled, will + * break asm irq handler used by non-DT boards. Therefore, + * we provide a C-style irq handler even for non-DT boards, + * if MULTI_IRQ_HANDLER is set. + */ + +static void __iomem *dove_irq_base = IRQ_VIRT_BASE; + +static asmlinkage void +__exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs) +{ + u32 stat; + + stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF); + stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF); + if (stat) { + unsigned int hwirq = __fls(stat); + handle_IRQ(hwirq, regs); + return; + } + stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF); + stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF); + if (stat) { + unsigned int hwirq = 32 + __fls(stat); + handle_IRQ(hwirq, regs); + return; + } +} +#endif + void __init dove_init_irq(void) { int i; @@ -115,6 +147,10 @@ void __init dove_init_irq(void) orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); +#ifdef CONFIG_MULTI_IRQ_HANDLER + set_handle_irq(dove_legacy_handle_irq); +#endif + /* * Initialize gpiolib for GPIOs 0-71. */ diff --git a/arch/arm/mach-dove/mpp.c b/arch/arm/mach-dove/mpp.c index 60bd729a1ba..8a433a51289 100644 --- a/arch/arm/mach-dove/mpp.c +++ b/arch/arm/mach-dove/mpp.c @@ -47,7 +47,7 @@ static const struct dove_mpp_grp dove_mpp_grp[] = { /* Enable gpio for a range of pins. mode should be a combination of GPIO_OUTPUT_OK | GPIO_INPUT_OK */ -static void dove_mpp_gpio_mode(int start, int end, int gpio_mode) +static void __init dove_mpp_gpio_mode(int start, int end, int gpio_mode) { int i; |
