diff options
Diffstat (limited to 'arch/arm/include/asm/hardware')
| -rw-r--r-- | arch/arm/include/asm/hardware/cache-feroceon-l2.h | 13 | ||||
| -rw-r--r-- | arch/arm/include/asm/hardware/cache-l2x0.h | 105 | ||||
| -rw-r--r-- | arch/arm/include/asm/hardware/coresight.h | 8 | ||||
| -rw-r--r-- | arch/arm/include/asm/hardware/iop3xx-adma.h | 30 | ||||
| -rw-r--r-- | arch/arm/include/asm/hardware/iop3xx-gpio.h | 75 | ||||
| -rw-r--r-- | arch/arm/include/asm/hardware/iop3xx.h | 12 | ||||
| -rw-r--r-- | arch/arm/include/asm/hardware/iop_adma.h | 4 | 
7 files changed, 90 insertions, 157 deletions
diff --git a/arch/arm/include/asm/hardware/cache-feroceon-l2.h b/arch/arm/include/asm/hardware/cache-feroceon-l2.h new file mode 100644 index 00000000000..12e1588dc4f --- /dev/null +++ b/arch/arm/include/asm/hardware/cache-feroceon-l2.h @@ -0,0 +1,13 @@ +/* + * arch/arm/include/asm/hardware/cache-feroceon-l2.h + * + * Copyright (C) 2008 Marvell Semiconductor + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +extern void __init feroceon_l2_init(int l2_wt_override); +extern int __init feroceon_of_init(void); + diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index 3b2c40b5bfa..3a5ec1c2565 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h @@ -26,8 +26,8 @@  #define L2X0_CACHE_TYPE			0x004  #define L2X0_CTRL			0x100  #define L2X0_AUX_CTRL			0x104 -#define L2X0_TAG_LATENCY_CTRL		0x108 -#define L2X0_DATA_LATENCY_CTRL		0x10C +#define L310_TAG_LATENCY_CTRL		0x108 +#define L310_DATA_LATENCY_CTRL		0x10C  #define L2X0_EVENT_CNT_CTRL		0x200  #define L2X0_EVENT_CNT1_CFG		0x204  #define L2X0_EVENT_CNT0_CFG		0x208 @@ -54,53 +54,93 @@  #define L2X0_LOCKDOWN_WAY_D_BASE	0x900  #define L2X0_LOCKDOWN_WAY_I_BASE	0x904  #define L2X0_LOCKDOWN_STRIDE		0x08 -#define L2X0_ADDR_FILTER_START		0xC00 -#define L2X0_ADDR_FILTER_END		0xC04 +#define L310_ADDR_FILTER_START		0xC00 +#define L310_ADDR_FILTER_END		0xC04  #define L2X0_TEST_OPERATION		0xF00  #define L2X0_LINE_DATA			0xF10  #define L2X0_LINE_TAG			0xF30  #define L2X0_DEBUG_CTRL			0xF40 -#define L2X0_PREFETCH_CTRL		0xF60 -#define L2X0_POWER_CTRL			0xF80 -#define   L2X0_DYNAMIC_CLK_GATING_EN	(1 << 1) -#define   L2X0_STNDBY_MODE_EN		(1 << 0) +#define L310_PREFETCH_CTRL		0xF60 +#define L310_POWER_CTRL			0xF80 +#define   L310_DYNAMIC_CLK_GATING_EN	(1 << 1) +#define   L310_STNDBY_MODE_EN		(1 << 0)  /* Registers shifts and masks */  #define L2X0_CACHE_ID_PART_MASK		(0xf << 6)  #define L2X0_CACHE_ID_PART_L210		(1 << 6) +#define L2X0_CACHE_ID_PART_L220		(2 << 6)  #define L2X0_CACHE_ID_PART_L310		(3 << 6)  #define L2X0_CACHE_ID_RTL_MASK          0x3f -#define L2X0_CACHE_ID_RTL_R0P0          0x0 -#define L2X0_CACHE_ID_RTL_R1P0          0x2 -#define L2X0_CACHE_ID_RTL_R2P0          0x4 -#define L2X0_CACHE_ID_RTL_R3P0          0x5 -#define L2X0_CACHE_ID_RTL_R3P1          0x6 -#define L2X0_CACHE_ID_RTL_R3P2          0x8 +#define L210_CACHE_ID_RTL_R0P2_02	0x00 +#define L210_CACHE_ID_RTL_R0P1		0x01 +#define L210_CACHE_ID_RTL_R0P2_01	0x02 +#define L210_CACHE_ID_RTL_R0P3		0x03 +#define L210_CACHE_ID_RTL_R0P4		0x0b +#define L210_CACHE_ID_RTL_R0P5		0x0f +#define L220_CACHE_ID_RTL_R1P7_01REL0	0x06 +#define L310_CACHE_ID_RTL_R0P0		0x00 +#define L310_CACHE_ID_RTL_R1P0		0x02 +#define L310_CACHE_ID_RTL_R2P0		0x04 +#define L310_CACHE_ID_RTL_R3P0		0x05 +#define L310_CACHE_ID_RTL_R3P1		0x06 +#define L310_CACHE_ID_RTL_R3P1_50REL0	0x07 +#define L310_CACHE_ID_RTL_R3P2		0x08 +#define L310_CACHE_ID_RTL_R3P3		0x09 -#define L2X0_AUX_CTRL_MASK			0xc0000fff +/* L2C auxiliary control register - bits common to L2C-210/220/310 */ +#define L2C_AUX_CTRL_WAY_SIZE_SHIFT		17 +#define L2C_AUX_CTRL_WAY_SIZE_MASK		(7 << 17) +#define L2C_AUX_CTRL_WAY_SIZE(n)		((n) << 17) +#define L2C_AUX_CTRL_EVTMON_ENABLE		BIT(20) +#define L2C_AUX_CTRL_PARITY_ENABLE		BIT(21) +#define L2C_AUX_CTRL_SHARED_OVERRIDE		BIT(22) +/* L2C-210/220 common bits */  #define L2X0_AUX_CTRL_DATA_RD_LATENCY_SHIFT	0 -#define L2X0_AUX_CTRL_DATA_RD_LATENCY_MASK	0x7 +#define L2X0_AUX_CTRL_DATA_RD_LATENCY_MASK	(7 << 0)  #define L2X0_AUX_CTRL_DATA_WR_LATENCY_SHIFT	3 -#define L2X0_AUX_CTRL_DATA_WR_LATENCY_MASK	(0x7 << 3) +#define L2X0_AUX_CTRL_DATA_WR_LATENCY_MASK	(7 << 3)  #define L2X0_AUX_CTRL_TAG_LATENCY_SHIFT		6 -#define L2X0_AUX_CTRL_TAG_LATENCY_MASK		(0x7 << 6) +#define L2X0_AUX_CTRL_TAG_LATENCY_MASK		(7 << 6)  #define L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT	9 -#define L2X0_AUX_CTRL_DIRTY_LATENCY_MASK	(0x7 << 9) -#define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT	16 -#define L2X0_AUX_CTRL_WAY_SIZE_SHIFT		17 -#define L2X0_AUX_CTRL_WAY_SIZE_MASK		(0x7 << 17) -#define L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT	22 -#define L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT		26 -#define L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT		27 -#define L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT	28 -#define L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT	29 -#define L2X0_AUX_CTRL_EARLY_BRESP_SHIFT		30 +#define L2X0_AUX_CTRL_DIRTY_LATENCY_MASK	(7 << 9) +#define L2X0_AUX_CTRL_ASSOC_SHIFT		13 +#define L2X0_AUX_CTRL_ASSOC_MASK		(15 << 13) +/* L2C-210 specific bits */ +#define L210_AUX_CTRL_WRAP_DISABLE		BIT(12) +#define L210_AUX_CTRL_WA_OVERRIDE		BIT(23) +#define L210_AUX_CTRL_EXCLUSIVE_ABORT		BIT(24) +/* L2C-220 specific bits */ +#define L220_AUX_CTRL_EXCLUSIVE_CACHE		BIT(12) +#define L220_AUX_CTRL_FWA_SHIFT			23 +#define L220_AUX_CTRL_FWA_MASK			(3 << 23) +#define L220_AUX_CTRL_NS_LOCKDOWN		BIT(26) +#define L220_AUX_CTRL_NS_INT_CTRL		BIT(27) +/* L2C-310 specific bits */ +#define L310_AUX_CTRL_FULL_LINE_ZERO		BIT(0)	/* R2P0+ */ +#define L310_AUX_CTRL_HIGHPRIO_SO_DEV		BIT(10)	/* R2P0+ */ +#define L310_AUX_CTRL_STORE_LIMITATION		BIT(11)	/* R2P0+ */ +#define L310_AUX_CTRL_EXCLUSIVE_CACHE		BIT(12) +#define L310_AUX_CTRL_ASSOCIATIVITY_16		BIT(16) +#define L310_AUX_CTRL_CACHE_REPLACE_RR		BIT(25)	/* R2P0+ */ +#define L310_AUX_CTRL_NS_LOCKDOWN		BIT(26) +#define L310_AUX_CTRL_NS_INT_CTRL		BIT(27) +#define L310_AUX_CTRL_DATA_PREFETCH		BIT(28) +#define L310_AUX_CTRL_INSTR_PREFETCH		BIT(29) +#define L310_AUX_CTRL_EARLY_BRESP		BIT(30)	/* R2P0+ */ -#define L2X0_LATENCY_CTRL_SETUP_SHIFT	0 -#define L2X0_LATENCY_CTRL_RD_SHIFT	4 -#define L2X0_LATENCY_CTRL_WR_SHIFT	8 +#define L310_LATENCY_CTRL_SETUP(n)		((n) << 0) +#define L310_LATENCY_CTRL_RD(n)			((n) << 4) +#define L310_LATENCY_CTRL_WR(n)			((n) << 8) -#define L2X0_ADDR_FILTER_EN		1 +#define L310_ADDR_FILTER_EN		1 + +#define L310_PREFETCH_CTRL_OFFSET_MASK		0x1f +#define L310_PREFETCH_CTRL_DBL_LINEFILL_INCR	BIT(23) +#define L310_PREFETCH_CTRL_PREFETCH_DROP	BIT(24) +#define L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP	BIT(27) +#define L310_PREFETCH_CTRL_DATA_PREFETCH	BIT(28) +#define L310_PREFETCH_CTRL_INSTR_PREFETCH	BIT(29) +#define L310_PREFETCH_CTRL_DBL_LINEFILL		BIT(30)  #define L2X0_CTRL_EN			1 @@ -131,6 +171,7 @@ struct l2x0_regs {  	unsigned long prefetch_ctrl;  	unsigned long pwr_ctrl;  	unsigned long ctrl; +	unsigned long aux2_ctrl;  };  extern struct l2x0_regs l2x0_saved_regs; diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h index 0cf7a6b842f..ad774f37c47 100644 --- a/arch/arm/include/asm/hardware/coresight.h +++ b/arch/arm/include/asm/hardware/coresight.h @@ -24,8 +24,8 @@  #define TRACER_TIMEOUT 10000  #define etm_writel(t, v, x) \ -	(__raw_writel((v), (t)->etm_regs + (x))) -#define etm_readl(t, x) (__raw_readl((t)->etm_regs + (x))) +	(writel_relaxed((v), (t)->etm_regs + (x))) +#define etm_readl(t, x) (readl_relaxed((t)->etm_regs + (x)))  /* CoreSight Management Registers */  #define CSMR_LOCKACCESS 0xfb0 @@ -142,8 +142,8 @@  #define ETBFF_TRIGFL		BIT(10)  #define etb_writel(t, v, x) \ -	(__raw_writel((v), (t)->etb_regs + (x))) -#define etb_readl(t, x) (__raw_readl((t)->etb_regs + (x))) +	(writel_relaxed((v), (t)->etb_regs + (x))) +#define etb_readl(t, x) (readl_relaxed((t)->etb_regs + (x)))  #define etm_lock(t) do { etm_writel((t), 0, CSMR_LOCKACCESS); } while (0)  #define etm_unlock(t) \ diff --git a/arch/arm/include/asm/hardware/iop3xx-adma.h b/arch/arm/include/asm/hardware/iop3xx-adma.h index 9b28f1243bd..240b29ef17d 100644 --- a/arch/arm/include/asm/hardware/iop3xx-adma.h +++ b/arch/arm/include/asm/hardware/iop3xx-adma.h @@ -393,36 +393,6 @@ static inline int iop_chan_zero_sum_slot_count(size_t len, int src_cnt,  	return slot_cnt;  } -static inline int iop_desc_is_pq(struct iop_adma_desc_slot *desc) -{ -	return 0; -} - -static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc, -					struct iop_adma_chan *chan) -{ -	union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - -	switch (chan->device->id) { -	case DMA0_ID: -	case DMA1_ID: -		return hw_desc.dma->dest_addr; -	case AAU_ID: -		return hw_desc.aau->dest_addr; -	default: -		BUG(); -	} -	return 0; -} - - -static inline u32 iop_desc_get_qdest_addr(struct iop_adma_desc_slot *desc, -					  struct iop_adma_chan *chan) -{ -	BUG(); -	return 0; -} -  static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc,  					struct iop_adma_chan *chan)  { diff --git a/arch/arm/include/asm/hardware/iop3xx-gpio.h b/arch/arm/include/asm/hardware/iop3xx-gpio.h deleted file mode 100644 index 9eda7dc92ad..00000000000 --- a/arch/arm/include/asm/hardware/iop3xx-gpio.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * arch/arm/include/asm/hardware/iop3xx-gpio.h - * - * IOP3xx GPIO wrappers - * - * Copyright (c) 2008 Arnaud Patard <arnaud.patard@rtp-net.org> - * Based on IXP4XX gpio.h file - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARM_HARDWARE_IOP3XX_GPIO_H -#define __ASM_ARM_HARDWARE_IOP3XX_GPIO_H - -#include <mach/hardware.h> -#include <asm-generic/gpio.h> - -#define __ARM_GPIOLIB_COMPLEX - -#define IOP3XX_N_GPIOS	8 - -static inline int gpio_get_value(unsigned gpio) -{ -	if (gpio > IOP3XX_N_GPIOS) -		return __gpio_get_value(gpio); - -	return gpio_line_get(gpio); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ -	if (gpio > IOP3XX_N_GPIOS) { -		__gpio_set_value(gpio, value); -		return; -	} -	gpio_line_set(gpio, value); -} - -static inline int gpio_cansleep(unsigned gpio) -{ -	if (gpio < IOP3XX_N_GPIOS) -		return 0; -	else -		return __gpio_cansleep(gpio); -} - -/* - * The GPIOs are not generating any interrupt - * Note : manuals are not clear about this - */ -static inline int gpio_to_irq(int gpio) -{ -	return -EINVAL; -} - -static inline int irq_to_gpio(int gpio) -{ -	return -EINVAL; -} - -#endif - diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h index 423744bf18e..2594a95ff19 100644 --- a/arch/arm/include/asm/hardware/iop3xx.h +++ b/arch/arm/include/asm/hardware/iop3xx.h @@ -18,16 +18,9 @@  /*   * IOP3XX GPIO handling   */ -#define GPIO_IN			0 -#define GPIO_OUT		1 -#define GPIO_LOW		0 -#define GPIO_HIGH		1  #define IOP3XX_GPIO_LINE(x)	(x)  #ifndef __ASSEMBLY__ -extern void gpio_line_config(int line, int direction); -extern int  gpio_line_get(int line); -extern void gpio_line_set(int line, int value);  extern int init_atu;  extern int iop3xx_get_init_atu(void);  #endif @@ -168,11 +161,6 @@ extern int iop3xx_get_init_atu(void);  /* PERCR0 DOESN'T EXIST - index from 1! */  #define IOP3XX_PERCR0		(volatile u32 *)IOP3XX_REG_ADDR(0x0710) -/* General Purpose I/O  */ -#define IOP3XX_GPOE		(volatile u32 *)IOP3XX_GPIO_REG(0x0000) -#define IOP3XX_GPID		(volatile u32 *)IOP3XX_GPIO_REG(0x0004) -#define IOP3XX_GPOD		(volatile u32 *)IOP3XX_GPIO_REG(0x0008) -  /* Timers  */  #define IOP3XX_TU_TMR0		(volatile u32 *)IOP3XX_TIMER_REG(0x0000)  #define IOP3XX_TU_TMR1		(volatile u32 *)IOP3XX_TIMER_REG(0x0004) diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h index 122f86d8c99..250760e0810 100644 --- a/arch/arm/include/asm/hardware/iop_adma.h +++ b/arch/arm/include/asm/hardware/iop_adma.h @@ -82,8 +82,6 @@ struct iop_adma_chan {   * @slot_cnt: total slots used in an transaction (group of operations)   * @slots_per_op: number of slots per operation   * @idx: pool index - * @unmap_src_cnt: number of xor sources - * @unmap_len: transaction bytecount   * @tx_list: list of descriptors that are associated with one operation   * @async_tx: support for the async_tx api   * @group_list: list of slots that make up a multi-descriptor transaction @@ -99,8 +97,6 @@ struct iop_adma_desc_slot {  	u16 slot_cnt;  	u16 slots_per_op;  	u16 idx; -	u16 unmap_src_cnt; -	size_t unmap_len;  	struct list_head tx_list;  	struct dma_async_tx_descriptor async_tx;  	union {  | 
