diff options
Diffstat (limited to 'arch/arm/boot/dts/r8a7790-lager.dts')
| -rw-r--r-- | arch/arm/boot/dts/r8a7790-lager.dts | 319 |
1 files changed, 319 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts new file mode 100644 index 00000000000..dd2fe46073f --- /dev/null +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -0,0 +1,319 @@ +/* + * Device Tree Source for the Lager board + * + * Copyright (C) 2013-2014 Renesas Solutions Corp. + * Copyright (C) 2014 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7790.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + model = "Lager"; + compatible = "renesas,lager", "renesas,r8a7790"; + + aliases { + serial6 = &scif0; + serial7 = &scif1; + }; + + chosen { + bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp"; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x80000000>; + }; + + memory@180000000 { + device_type = "memory"; + reg = <1 0x80000000 0 0x80000000>; + }; + + lbsc { + #address-cells = <1>; + #size-cells = <1>; + }; + + gpio_keys { + compatible = "gpio-keys"; + + button@1 { + linux,code = <KEY_1>; + label = "SW2-1"; + gpio-key,wakeup; + debounce-interval = <20>; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + }; + button@2 { + linux,code = <KEY_2>; + label = "SW2-2"; + gpio-key,wakeup; + debounce-interval = <20>; + gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; + }; + button@3 { + linux,code = <KEY_3>; + label = "SW2-3"; + gpio-key,wakeup; + debounce-interval = <20>; + gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; + }; + button@4 { + linux,code = <KEY_4>; + label = "SW2-4"; + gpio-key,wakeup; + debounce-interval = <20>; + gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + led6 { + gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; + }; + led7 { + gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>; + }; + led8 { + gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; + }; + }; + + fixedregulator3v3: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_sdhi0: regulator@1 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator@2 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi2: regulator@3 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI2 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi2: regulator@4 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI2 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; +}; + +&extal_clk { + clock-frequency = <20000000>; +}; + +&pfc { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + + du_pins: du { + renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0"; + renesas,function = "du"; + }; + + scif0_pins: serial0 { + renesas,groups = "scif0_data"; + renesas,function = "scif0"; + }; + + ether_pins: ether { + renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; + renesas,function = "eth"; + }; + + phy1_pins: phy1 { + renesas,groups = "intc_irq0"; + renesas,function = "intc"; + }; + + scif1_pins: serial1 { + renesas,groups = "scif1_data"; + renesas,function = "scif1"; + }; + + sdhi0_pins: sd0 { + renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; + renesas,function = "sdhi0"; + }; + + sdhi2_pins: sd2 { + renesas,groups = "sdhi2_data4", "sdhi2_ctrl"; + renesas,function = "sdhi2"; + }; + + mmc1_pins: mmc1 { + renesas,groups = "mmc1_data8", "mmc1_ctrl"; + renesas,function = "mmc1"; + }; + + qspi_pins: spi0 { + renesas,groups = "qspi_ctrl", "qspi_data4"; + renesas,function = "qspi"; + }; + + msiof1_pins: spi2 { + renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx", + "msiof1_tx"; + renesas,function = "msiof1"; + }; +}; + +ðer { + pinctrl-0 = <ðer_pins &phy1_pins>; + pinctrl-names = "default"; + + phy-handle = <&phy1>; + renesas,ether-link-active-low; + status = "ok"; + + phy1: ethernet-phy@1 { + reg = <1>; + interrupt-parent = <&irqc0>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; + }; +}; + +&mmcif1 { + pinctrl-0 = <&mmc1_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&fixedregulator3v3>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&sata1 { + status = "okay"; +}; + +&qspi { + pinctrl-0 = <&qspi_pins>; + pinctrl-names = "default"; + + status = "okay"; + + flash: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl512s"; + reg = <0>; + spi-max-frequency = <30000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + m25p,fast-read; + + partition@0 { + label = "loader"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition@40000 { + label = "user"; + reg = <0x00040000 0x00400000>; + read-only; + }; + partition@440000 { + label = "flash"; + reg = <0x00440000 0x03bc0000>; + }; + }; +}; + +&scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&msiof1 { + pinctrl-0 = <&msiof1_pins>; + pinctrl-names = "default"; + + status = "okay"; + + pmic: pmic@0 { + compatible = "renesas,r2a11302ft"; + reg = <0>; + spi-max-frequency = <6000000>; + spi-cpol; + spi-cpha; + }; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&sdhi2 { + pinctrl-0 = <&sdhi2_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi2>; + vqmmc-supply = <&vccq_sdhi2>; + cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; + status = "okay"; +}; |