diff options
Diffstat (limited to 'arch/arm/Kconfig')
| -rw-r--r-- | arch/arm/Kconfig | 1755 |
1 files changed, 977 insertions, 778 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 93d595a7477..290f02ee015 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1,33 +1,80 @@ config ARM bool default y - select HAVE_AOUT - select HAVE_DMA_API_DEBUG - select HAVE_IDE - select HAVE_MEMBLOCK - select RTC_LIB - select SYS_SUPPORTS_APM_EMULATION - select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) - select HAVE_OPROFILE if (HAVE_PERF_EVENTS) + select ARCH_BINFMT_ELF_RANDOMIZE_PIE + select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE + select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST + select ARCH_HAVE_CUSTOM_GPIO_H + select ARCH_MIGHT_HAVE_PC_PARPORT + select ARCH_SUPPORTS_ATOMIC_RMW + select ARCH_USE_BUILTIN_BSWAP + select ARCH_USE_CMPXCHG_LOCKREF + select ARCH_WANT_IPC_PARSE_VERSION + select BUILDTIME_EXTABLE_SORT if MMU + select CLONE_BACKWARDS + select CPU_PM if (SUSPEND || CPU_IDLE) + select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS + select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI) + select GENERIC_CLOCKEVENTS_BROADCAST if SMP + select GENERIC_IDLE_POLL_SETUP + select GENERIC_IRQ_PROBE + select GENERIC_IRQ_SHOW + select GENERIC_PCI_IOMAP + select GENERIC_SCHED_CLOCK + select GENERIC_SMP_IDLE_THREAD + select GENERIC_STRNCPY_FROM_USER + select GENERIC_STRNLEN_USER + select HARDIRQS_SW_RESEND + select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT) + select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL select HAVE_ARCH_KGDB - select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) - select HAVE_KRETPROBES if (HAVE_KPROBES) - select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) - select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) + select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) + select HAVE_ARCH_TRACEHOOK + select HAVE_BPF_JIT + select HAVE_CC_STACKPROTECTOR + select HAVE_CONTEXT_TRACKING + select HAVE_C_RECORDMCOUNT + select HAVE_DEBUG_KMEMLEAK + select HAVE_DMA_API_DEBUG + select HAVE_DMA_ATTRS + select HAVE_DMA_CONTIGUOUS if MMU select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) + select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU + select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) + select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) select HAVE_GENERIC_DMA_COHERENT + select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) + select HAVE_IDE if PCI || ISA || PCMCIA + select HAVE_IRQ_TIME_ACCOUNTING select HAVE_KERNEL_GZIP - select HAVE_KERNEL_LZO + select HAVE_KERNEL_LZ4 select HAVE_KERNEL_LZMA - select HAVE_IRQ_WORK + select HAVE_KERNEL_LZO + select HAVE_KERNEL_XZ + select HAVE_KPROBES if !XIP_KERNEL + select HAVE_KRETPROBES if (HAVE_KPROBES) + select HAVE_MEMBLOCK + select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND + select HAVE_OPROFILE if (HAVE_PERF_EVENTS) select HAVE_PERF_EVENTS - select PERF_USE_VMALLOC + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP select HAVE_REGS_AND_STACK_ACCESS_API - select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) - select HAVE_C_RECORDMCOUNT - select HAVE_GENERIC_HARDIRQS - select HAVE_SPARSE_IRQ + select HAVE_SYSCALL_TRACEPOINTS + select HAVE_UID16 + select HAVE_VIRT_CPU_ACCOUNTING_GEN + select IRQ_FORCED_THREADING + select KTIME_SCALAR + select MODULES_USE_ELF_REL + select NO_BOOTMEM + select OLD_SIGACTION + select OLD_SIGSUSPEND3 + select PERF_USE_VMALLOC + select RTC_LIB + select SYS_SUPPORTS_APM_EMULATION + # Above selects are sorted alphabetically; please add new ones + # according to that. Thanks. help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and @@ -36,36 +83,43 @@ config ARM Europe. There is an ARM Linux project with a web page at <http://www.arm.linux.org.uk/>. -config HAVE_PWM +config ARM_HAS_SG_CHAIN bool -config MIGHT_HAVE_PCI +config NEED_SG_DMA_LENGTH bool -config SYS_SUPPORTS_APM_EMULATION +config ARM_DMA_USE_IOMMU bool + select ARM_HAS_SG_CHAIN + select NEED_SG_DMA_LENGTH -config HAVE_SCHED_CLOCK - bool +if ARM_DMA_USE_IOMMU -config GENERIC_GPIO - bool +config ARM_DMA_IOMMU_ALIGNMENT + int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers" + range 4 9 + default 8 + help + DMA mapping framework by default aligns all buffers to the smallest + PAGE_SIZE order which is greater than or equal to the requested buffer + size. This works well for buffers up to a few hundreds kilobytes, but + for larger buffers it just a waste of address space. Drivers which has + relatively small addressing window (like 64Mib) might run out of + virtual space with just a few allocations. -config ARCH_USES_GETTIMEOFFSET - bool - default n + With this parameter you can specify the maximum PAGE_SIZE order for + DMA IOMMU buffers. Larger buffers will be aligned only to this + specified order. The order is expressed as a power of two multiplied + by the PAGE_SIZE. -config GENERIC_CLOCKEVENTS - bool +endif -config GENERIC_CLOCKEVENTS_BROADCAST +config MIGHT_HAVE_PCI bool - depends on GENERIC_CLOCKEVENTS - default y if SMP -config KTIME_SCALAR +config SYS_SUPPORTS_APM_EMULATION bool - default y config HAVE_TCM bool @@ -74,7 +128,7 @@ config HAVE_TCM config HAVE_PROC_CPU bool -config NO_IOPORT +config NO_IOPORT_MAP bool config EISA @@ -95,14 +149,6 @@ config EISA config SBUS bool -config MCA - bool - help - MicroChannel Architecture is found in some IBM PS/2 machines and - laptops. It is a bus system similar to PCI or ISA. See - <file:Documentation/mca.txt> (and especially the web page given - there) before attempting to build an MCA bus kernel. - config STACKTRACE_SUPPORT bool default y @@ -120,25 +166,9 @@ config TRACE_IRQFLAGS_SUPPORT bool default y -config HARDIRQS_SW_RESEND - bool - default y - -config GENERIC_IRQ_PROBE - bool - default y - -config GENERIC_LOCKBREAK - bool - default y - depends on SMP && PREEMPT - -config RWSEM_GENERIC_SPINLOCK - bool - default y - config RWSEM_XCHGADD_ALGORITHM bool + default y config ARCH_HAS_ILOG2_U32 bool @@ -146,15 +176,8 @@ config ARCH_HAS_ILOG2_U32 config ARCH_HAS_ILOG2_U64 bool -config ARCH_HAS_CPUFREQ +config ARCH_HAS_BANDGAP bool - help - Internal node to signify that the ARCH has CPUFREQ support - and that the relevant menu configurations are displayed for - it. - -config ARCH_HAS_CPU_IDLE_WAIT - def_bool y config GENERIC_HWEIGHT bool @@ -173,12 +196,21 @@ config ZONE_DMA config NEED_DMA_MAP_STATE def_bool y +config ARCH_SUPPORTS_UPROBES + def_bool y + +config ARCH_HAS_DMA_SET_COHERENT_MASK + bool + config GENERIC_ISA_DMA bool config FIQ bool +config NEED_RET_TO_USER + bool + config ARCH_MTD_XIP bool @@ -188,23 +220,58 @@ config VECTORS_BASE default DRAM_BASE if REMAP_VECTORS_TO_RAM default 0x00000000 help - The base address of exception vectors. + The base address of exception vectors. This must be two pages + in size. config ARM_PATCH_PHYS_VIRT - bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)" - depends on EXPERIMENTAL + bool "Patch physical to virtual translations at runtime" if EMBEDDED + default y depends on !XIP_KERNEL && MMU depends on !ARCH_REALVIEW || !SPARSEMEM help - Patch phys-to-virt translation functions at runtime according to - the position of the kernel in system memory. + Patch phys-to-virt and virt-to-phys translation functions at + boot and module load time according to the position of the + kernel in system memory. + + This can only be used with non-XIP MMU kernels where the base + of physical memory is at a 16MB boundary. - This can only be used with non-XIP with MMU kernels where - the base of physical memory is at a 16MB boundary. + Only disable this option if you know that you do not require + this feature (eg, building a kernel for a single machine) and + you need to shrink the kernel to the minimal size. -config ARM_PATCH_PHYS_VIRT_16BIT +config NEED_MACH_GPIO_H + bool + help + Select this when mach/gpio.h is required to provide special + definitions for this platform. The need for mach/gpio.h should + be avoided when possible. + +config NEED_MACH_IO_H + bool + help + Select this when mach/io.h is required to provide special + definitions for this platform. The need for mach/io.h should + be avoided when possible. + +config NEED_MACH_MEMORY_H + bool + help + Select this when mach/memory.h is required to provide special + definitions for this platform. The need for mach/memory.h should + be avoided when possible. + +config PHYS_OFFSET + hex "Physical address of main memory" if MMU + depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H + default DRAM_BASE if !MMU + help + Please provide the physical address corresponding to the + location of main memory in your system. + +config GENERIC_BUG def_bool y - depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM + depends on BUG source "init/Kconfig" @@ -225,129 +292,151 @@ config MMU # choice prompt "ARM system type" - default ARCH_VERSATILE + default ARCH_VERSATILE if !MMU + default ARCH_MULTIPLATFORM if MMU + +config ARCH_MULTIPLATFORM + bool "Allow multiple platforms to be selected" + depends on MMU + select ARCH_WANT_OPTIONAL_GPIOLIB + select ARM_HAS_SG_CHAIN + select ARM_PATCH_PHYS_VIRT + select AUTO_ZRELADDR + select CLKSRC_OF + select COMMON_CLK + select GENERIC_CLOCKEVENTS + select MIGHT_HAVE_PCI + select MULTI_IRQ_HANDLER + select SPARSE_IRQ + select USE_OF config ARCH_INTEGRATOR bool "ARM Ltd. Integrator family" select ARM_AMBA - select ARCH_HAS_CPUFREQ - select CLKDEV_LOOKUP - select ICST + select ARM_PATCH_PHYS_VIRT if MMU + select AUTO_ZRELADDR + select COMMON_CLK + select COMMON_CLK_VERSATILE select GENERIC_CLOCKEVENTS + select HAVE_TCM + select ICST + select MULTI_IRQ_HANDLER + select NEED_MACH_MEMORY_H select PLAT_VERSATILE - select PLAT_VERSATILE_FPGA_IRQ + select SPARSE_IRQ + select USE_OF + select VERSATILE_FPGA_IRQ help Support for ARM's Integrator platform. config ARCH_REALVIEW bool "ARM Ltd. RealView family" + select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_AMBA - select CLKDEV_LOOKUP - select ICST + select ARM_TIMER_SP804 + select COMMON_CLK + select COMMON_CLK_VERSATILE select GENERIC_CLOCKEVENTS - select ARCH_WANT_OPTIONAL_GPIOLIB + select GPIO_PL061 if GPIOLIB + select ICST + select NEED_MACH_MEMORY_H select PLAT_VERSATILE select PLAT_VERSATILE_CLCD - select ARM_TIMER_SP804 - select GPIO_PL061 if GPIOLIB help This enables support for ARM Ltd RealView boards. config ARCH_VERSATILE bool "ARM Ltd. Versatile family" - select ARM_AMBA - select ARM_VIC - select CLKDEV_LOOKUP - select ICST - select GENERIC_CLOCKEVENTS - select ARCH_WANT_OPTIONAL_GPIOLIB - select PLAT_VERSATILE - select PLAT_VERSATILE_CLCD - select PLAT_VERSATILE_FPGA_IRQ - select ARM_TIMER_SP804 - help - This enables support for ARM Ltd Versatile board. - -config ARCH_VEXPRESS - bool "ARM Ltd. Versatile Express family" select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_AMBA select ARM_TIMER_SP804 + select ARM_VIC select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS - select HAVE_CLK - select HAVE_PATA_PLATFORM + select HAVE_MACH_CLKDEV select ICST select PLAT_VERSATILE select PLAT_VERSATILE_CLCD + select PLAT_VERSATILE_CLOCK + select VERSATILE_FPGA_IRQ help - This enables support for the ARM Ltd Versatile Express boards. + This enables support for ARM Ltd Versatile board. config ARCH_AT91 bool "Atmel AT91" select ARCH_REQUIRE_GPIOLIB - select HAVE_CLK - help - This enables support for systems based on the Atmel AT91RM9200, - AT91SAM9 and AT91CAP9 processors. - -config ARCH_BCMRING - bool "Broadcom BCMRING" - depends on MMU - select CPU_V6 - select ARM_AMBA select CLKDEV_LOOKUP - select GENERIC_CLOCKEVENTS - select ARCH_WANT_OPTIONAL_GPIOLIB + select IRQ_DOMAIN + select NEED_MACH_IO_H if PCCARD + select PINCTRL + select PINCTRL_AT91 if USE_OF help - Support for Broadcom's BCMRing platform. + This enables support for systems based on Atmel + AT91RM9200 and AT91SAM9* processors. config ARCH_CLPS711X - bool "Cirrus Logic CLPS711x/EP721x-based" + bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" + select ARCH_REQUIRE_GPIOLIB + select AUTO_ZRELADDR + select CLKSRC_MMIO + select COMMON_CLK select CPU_ARM720T - select ARCH_USES_GETTIMEOFFSET - help - Support for Cirrus Logic 711x/721x based boards. - -config ARCH_CNS3XXX - bool "Cavium Networks CNS3XXX family" - select CPU_V6 select GENERIC_CLOCKEVENTS - select ARM_GIC - select MIGHT_HAVE_PCI - select PCI_DOMAINS if PCI + select MFD_SYSCON help - Support for Cavium Networks CNS3XXX platform. + Support for Cirrus Logic 711x/721x/731x based boards. config ARCH_GEMINI bool "Cortina Systems Gemini" - select CPU_FA526 select ARCH_REQUIRE_GPIOLIB - select ARCH_USES_GETTIMEOFFSET + select CLKSRC_MMIO + select CPU_FA526 + select GENERIC_CLOCKEVENTS help Support for the Cortina Systems Gemini family SoCs config ARCH_EBSA110 bool "EBSA-110" + select ARCH_USES_GETTIMEOFFSET select CPU_SA110 select ISA - select NO_IOPORT - select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_IO_H + select NEED_MACH_MEMORY_H + select NO_IOPORT_MAP help This is an evaluation board for the StrongARM processor available from Digital. It has limited hardware on-board, including an Ethernet interface, two PCMCIA sockets, two serial ports and a parallel port. +config ARCH_EFM32 + bool "Energy Micro efm32" + depends on !MMU + select ARCH_REQUIRE_GPIOLIB + select ARM_NVIC + select AUTO_ZRELADDR + select CLKSRC_OF + select COMMON_CLK + select CPU_V7M + select GENERIC_CLOCKEVENTS + select NO_DMA + select NO_IOPORT_MAP + select SPARSE_IRQ + select USE_OF + help + Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko + processors. + config ARCH_EP93XX bool "EP93xx-based" - select CPU_ARM920T + select ARCH_HAS_HOLES_MEMORYMODEL + select ARCH_REQUIRE_GPIOLIB + select ARCH_USES_GETTIMEOFFSET select ARM_AMBA select ARM_VIC select CLKDEV_LOOKUP - select ARCH_REQUIRE_GPIOLIB - select ARCH_HAS_HOLES_MEMORYMODEL - select ARCH_USES_GETTIMEOFFSET + select CPU_ARM920T + select NEED_MACH_MEMORY_H help This enables support for the Cirrus EP93xx series of CPUs. @@ -356,70 +445,44 @@ config ARCH_FOOTBRIDGE select CPU_SA110 select FOOTBRIDGE select GENERIC_CLOCKEVENTS + select HAVE_IDE + select NEED_MACH_IO_H if !MMU + select NEED_MACH_MEMORY_H help Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. -config ARCH_MXC - bool "Freescale MXC/iMX-based" - select GENERIC_CLOCKEVENTS - select ARCH_REQUIRE_GPIOLIB - select CLKDEV_LOOKUP - help - Support for Freescale MXC/iMX-based family of processors - -config ARCH_MXS - bool "Freescale MXS-based" - select GENERIC_CLOCKEVENTS - select ARCH_REQUIRE_GPIOLIB - select CLKDEV_LOOKUP - help - Support for Freescale MXS-based family of processors - -config ARCH_STMP3XXX - bool "Freescale STMP3xxx" - select CPU_ARM926T - select CLKDEV_LOOKUP - select ARCH_REQUIRE_GPIOLIB - select GENERIC_CLOCKEVENTS - select USB_ARCH_HAS_EHCI - help - Support for systems based on the Freescale 3xxx CPUs. - config ARCH_NETX bool "Hilscher NetX based" - select CPU_ARM926T select ARM_VIC + select CLKSRC_MMIO + select CPU_ARM926T select GENERIC_CLOCKEVENTS help This enables support for systems based on the Hilscher NetX Soc -config ARCH_H720X - bool "Hynix HMS720x-based" - select CPU_ARM720T - select ISA_DMA_API - select ARCH_USES_GETTIMEOFFSET - help - This enables support for systems based on the Hynix HMS720x - config ARCH_IOP13XX bool "IOP13xx-based" depends on MMU select CPU_XSC3 - select PLAT_IOP + select NEED_MACH_MEMORY_H + select NEED_RET_TO_USER select PCI - select ARCH_SUPPORTS_MSI + select PLAT_IOP select VMSPLIT_1G + select SPARSE_IRQ help Support for Intel's IOP13XX (XScale) family of processors. config ARCH_IOP32X bool "IOP32x-based" depends on MMU + select ARCH_REQUIRE_GPIOLIB select CPU_XSCALE - select PLAT_IOP + select GPIO_IOP + select NEED_RET_TO_USER select PCI - select ARCH_REQUIRE_GPIOLIB + select PLAT_IOP help Support for Intel's 80219 and IOP32X (XScale) family of processors. @@ -427,92 +490,68 @@ config ARCH_IOP32X config ARCH_IOP33X bool "IOP33x-based" depends on MMU - select CPU_XSCALE - select PLAT_IOP - select PCI select ARCH_REQUIRE_GPIOLIB - help - Support for Intel's IOP33X (XScale) family of processors. - -config ARCH_IXP23XX - bool "IXP23XX-based" - depends on MMU - select CPU_XSC3 - select PCI - select ARCH_USES_GETTIMEOFFSET - help - Support for Intel's IXP23xx (XScale) family of processors. - -config ARCH_IXP2000 - bool "IXP2400/2800-based" - depends on MMU select CPU_XSCALE + select GPIO_IOP + select NEED_RET_TO_USER select PCI - select ARCH_USES_GETTIMEOFFSET + select PLAT_IOP help - Support for Intel's IXP2400/2800 (XScale) family of processors. + Support for Intel's IOP33X (XScale) family of processors. config ARCH_IXP4XX bool "IXP4xx-based" depends on MMU + select ARCH_HAS_DMA_SET_COHERENT_MASK + select ARCH_REQUIRE_GPIOLIB + select ARCH_SUPPORTS_BIG_ENDIAN + select CLKSRC_MMIO select CPU_XSCALE - select GENERIC_GPIO + select DMABOUNCE if PCI select GENERIC_CLOCKEVENTS - select HAVE_SCHED_CLOCK select MIGHT_HAVE_PCI - select DMABOUNCE if PCI + select NEED_MACH_IO_H + select USB_EHCI_BIG_ENDIAN_DESC + select USB_EHCI_BIG_ENDIAN_MMIO help Support for Intel's IXP4XX (XScale) family of processors. config ARCH_DOVE bool "Marvell Dove" - select CPU_V6K - select PCI select ARCH_REQUIRE_GPIOLIB + select CPU_PJ4 select GENERIC_CLOCKEVENTS - select PLAT_ORION + select MIGHT_HAVE_PCI + select MVEBU_MBUS + select PINCTRL + select PINCTRL_DOVE + select PLAT_ORION_LEGACY help Support for the Marvell Dove SoC 88AP510 config ARCH_KIRKWOOD bool "Marvell Kirkwood" - select CPU_FEROCEON - select PCI select ARCH_REQUIRE_GPIOLIB + select CPU_FEROCEON select GENERIC_CLOCKEVENTS - select PLAT_ORION + select MVEBU_MBUS + select PCI + select PCI_QUIRKS + select PINCTRL + select PINCTRL_KIRKWOOD + select PLAT_ORION_LEGACY help Support for the following Marvell Kirkwood series SoCs: 88F6180, 88F6192 and 88F6281. -config ARCH_LOKI - bool "Marvell Loki (88RC8480)" - select CPU_FEROCEON - select GENERIC_CLOCKEVENTS - select PLAT_ORION - help - Support for the Marvell Loki (88RC8480) SoC. - -config ARCH_LPC32XX - bool "NXP LPC32XX" - select CPU_ARM926T - select ARCH_REQUIRE_GPIOLIB - select HAVE_IDE - select ARM_AMBA - select USB_ARCH_HAS_OHCI - select CLKDEV_LOOKUP - select GENERIC_TIME - select GENERIC_CLOCKEVENTS - help - Support for the NXP LPC32XX family of processors - config ARCH_MV78XX0 bool "Marvell MV78xx0" - select CPU_FEROCEON - select PCI select ARCH_REQUIRE_GPIOLIB + select CPU_FEROCEON select GENERIC_CLOCKEVENTS - select PLAT_ORION + select MVEBU_MBUS + select PCI + select PLAT_ORION_LEGACY help Support for the following Marvell MV78xx0 series SoCs: MV781x0, MV782x0. @@ -520,11 +559,12 @@ config ARCH_MV78XX0 config ARCH_ORION5X bool "Marvell Orion" depends on MMU - select CPU_FEROCEON - select PCI select ARCH_REQUIRE_GPIOLIB + select CPU_FEROCEON select GENERIC_CLOCKEVENTS - select PLAT_ORION + select MVEBU_MBUS + select PCI + select PLAT_ORION_LEGACY help Support for the following Marvell Orion 5x series SoCs: Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), @@ -535,9 +575,12 @@ config ARCH_MMP depends on MMU select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP + select GENERIC_ALLOCATOR select GENERIC_CLOCKEVENTS - select HAVE_SCHED_CLOCK - select TICK_ONESHOT + select GPIO_PXA + select IRQ_DOMAIN + select MULTI_IRQ_HANDLER + select PINCTRL select PLAT_PXA select SPARSE_IRQ help @@ -545,30 +588,21 @@ config ARCH_MMP config ARCH_KS8695 bool "Micrel/Kendin KS8695" - select CPU_ARM922T select ARCH_REQUIRE_GPIOLIB - select ARCH_USES_GETTIMEOFFSET + select CLKSRC_MMIO + select CPU_ARM922T + select GENERIC_CLOCKEVENTS + select NEED_MACH_MEMORY_H help Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based System-on-Chip devices. -config ARCH_NS9XXX - bool "NetSilicon NS9xxx" - select CPU_ARM926T - select GENERIC_GPIO - select GENERIC_CLOCKEVENTS - select HAVE_CLK - help - Say Y here if you intend to run this kernel on a NetSilicon NS9xxx - System. - - <http://www.digi.com/products/microprocessors/index.jsp> - config ARCH_W90X900 bool "Nuvoton W90X900 CPU" - select CPU_ARM926T select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP + select CLKSRC_MMIO + select CPU_ARM926T select GENERIC_CLOCKEVENTS help Support for Nuvoton (Winbond logic dept.) ARM9 processor, @@ -579,57 +613,42 @@ config ARCH_W90X900 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> -config ARCH_NUC93X - bool "Nuvoton NUC93X CPU" - select CPU_ARM926T - select CLKDEV_LOOKUP - help - Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a - low-power and high performance MPEG-4/JPEG multimedia controller chip. - -config ARCH_TEGRA - bool "NVIDIA Tegra" +config ARCH_LPC32XX + bool "NXP LPC32XX" + select ARCH_REQUIRE_GPIOLIB + select ARM_AMBA select CLKDEV_LOOKUP - select GENERIC_TIME - select GENERIC_CLOCKEVENTS - select GENERIC_GPIO - select HAVE_CLK - select HAVE_SCHED_CLOCK - select ARCH_HAS_BARRIERS if CACHE_L2X0 - select ARCH_HAS_CPUFREQ - help - This enables support for NVIDIA Tegra based systems (Tegra APX, - Tegra 6xx and Tegra 2 series). - -config ARCH_PNX4008 - bool "Philips Nexperia PNX4008 Mobile" + select CLKSRC_MMIO select CPU_ARM926T - select CLKDEV_LOOKUP - select ARCH_USES_GETTIMEOFFSET + select GENERIC_CLOCKEVENTS + select HAVE_IDE + select USE_OF help - This enables support for Philips PNX4008 mobile platform. + Support for the NXP LPC32XX family of processors config ARCH_PXA bool "PXA2xx/PXA3xx-based" depends on MMU select ARCH_MTD_XIP - select ARCH_HAS_CPUFREQ - select CLKDEV_LOOKUP select ARCH_REQUIRE_GPIOLIB + select ARM_CPU_SUSPEND if PM + select AUTO_ZRELADDR + select CLKDEV_LOOKUP + select CLKSRC_MMIO select GENERIC_CLOCKEVENTS - select HAVE_SCHED_CLOCK - select TICK_ONESHOT + select GPIO_PXA + select HAVE_IDE + select MULTI_IRQ_HANDLER select PLAT_PXA select SPARSE_IRQ help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. config ARCH_MSM - bool "Qualcomm MSM" - select HAVE_CLK - select GENERIC_CLOCKEVENTS + bool "Qualcomm MSM (non-multiplatform)" select ARCH_REQUIRE_GPIOLIB - select CLKDEV_LOOKUP + select COMMON_CLK + select GENERIC_CLOCKEVENTS help Support for Qualcomm MSM/QSD based systems. This runs on the apps processor of the MSM/QSD and depends on a shared memory @@ -637,266 +656,271 @@ config ARCH_MSM stack and controls some vital subsystems (clock and power control, etc). -config ARCH_SHMOBILE - bool "Renesas SH-Mobile / R-Mobile" - select HAVE_CLK +config ARCH_SHMOBILE_LEGACY + bool "Renesas ARM SoCs (non-multiplatform)" + select ARCH_SHMOBILE + select ARM_PATCH_PHYS_VIRT if MMU select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS - select NO_IOPORT - select SPARSE_IRQ + select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if SMP + select HAVE_MACH_CLKDEV + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 select MULTI_IRQ_HANDLER + select NO_IOPORT_MAP + select PINCTRL + select PM_GENERIC_DOMAINS if PM + select SPARSE_IRQ help - Support for Renesas's SH-Mobile and R-Mobile ARM platforms. + Support for Renesas ARM SoC platforms using a non-multiplatform + kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car + and RZ families. config ARCH_RPC bool "RiscPC" select ARCH_ACORN - select FIQ - select TIMER_ACORN select ARCH_MAY_HAVE_PC_FDC - select HAVE_PATA_PLATFORM - select ISA_DMA_API - select NO_IOPORT select ARCH_SPARSEMEM_ENABLE select ARCH_USES_GETTIMEOFFSET + select CPU_SA110 + select FIQ + select HAVE_IDE + select HAVE_PATA_PLATFORM + select ISA_DMA_API + select NEED_MACH_IO_H + select NEED_MACH_MEMORY_H + select NO_IOPORT_MAP + select VIRT_TO_BUS help On the Acorn Risc-PC, Linux can support the internal IDE disk and CD-ROM interface, serial and parallel port, and the floppy drive. config ARCH_SA1100 bool "SA1100-based" - select CPU_SA1100 - select ISA - select ARCH_SPARSEMEM_ENABLE select ARCH_MTD_XIP - select ARCH_HAS_CPUFREQ + select ARCH_REQUIRE_GPIOLIB + select ARCH_SPARSEMEM_ENABLE + select CLKDEV_LOOKUP + select CLKSRC_MMIO select CPU_FREQ + select CPU_SA1100 select GENERIC_CLOCKEVENTS - select HAVE_CLK - select HAVE_SCHED_CLOCK - select TICK_ONESHOT - select ARCH_REQUIRE_GPIOLIB + select HAVE_IDE + select ISA + select NEED_MACH_MEMORY_H + select SPARSE_IRQ help Support for StrongARM 11x0 based boards. -config ARCH_S3C2410 - bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" - select GENERIC_GPIO - select ARCH_HAS_CPUFREQ - select HAVE_CLK - select ARCH_USES_GETTIMEOFFSET +config ARCH_S3C24XX + bool "Samsung S3C24XX SoCs" + select ARCH_REQUIRE_GPIOLIB + select ATAGS + select CLKDEV_LOOKUP + select CLKSRC_SAMSUNG_PWM + select GENERIC_CLOCKEVENTS + select GPIO_SAMSUNG select HAVE_S3C2410_I2C if I2C + select HAVE_S3C2410_WATCHDOG if WATCHDOG + select HAVE_S3C_RTC if RTC_CLASS + select MULTI_IRQ_HANDLER + select NEED_MACH_IO_H + select SAMSUNG_ATAGS help - Samsung S3C2410X CPU based systems, such as the Simtec Electronics - BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or - the Samsung SMDK2410 development board (and derivatives). - - Note, the S3C2416 and the S3C2450 are so close that they even share - the same SoC ID code. This means that there is no seperate machine - directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. + Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 + and S3C2450 SoCs based systems, such as the Simtec Electronics BAST + (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the + Samsung SMDK2410 development board (and derivatives). config ARCH_S3C64XX bool "Samsung S3C64XX" - select PLAT_SAMSUNG - select CPU_V6 - select ARM_VIC - select HAVE_CLK - select NO_IOPORT - select ARCH_USES_GETTIMEOFFSET - select ARCH_HAS_CPUFREQ select ARCH_REQUIRE_GPIOLIB - select SAMSUNG_CLKSRC - select SAMSUNG_IRQ_VIC_TIMER - select SAMSUNG_IRQ_UART - select S3C_GPIO_TRACK - select S3C_GPIO_PULL_UPDOWN - select S3C_GPIO_CFG_S3C24XX - select S3C_GPIO_CFG_S3C64XX - select S3C_DEV_NAND - select USB_ARCH_HAS_OHCI - select SAMSUNG_GPIOLIB_4BIT + select ARM_AMBA + select ARM_VIC + select ATAGS + select CLKDEV_LOOKUP + select CLKSRC_SAMSUNG_PWM + select COMMON_CLK_SAMSUNG + select CPU_V6K + select GENERIC_CLOCKEVENTS + select GPIO_SAMSUNG select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG + select HAVE_TCM + select NO_IOPORT_MAP + select PLAT_SAMSUNG + select PM_GENERIC_DOMAINS if PM + select S3C_DEV_NAND + select S3C_GPIO_TRACK + select SAMSUNG_ATAGS + select SAMSUNG_WAKEMASK + select SAMSUNG_WDT_RESET help Samsung S3C64XX series based systems config ARCH_S5P64X0 bool "Samsung S5P6440 S5P6450" + select ATAGS + select CLKDEV_LOOKUP + select CLKSRC_SAMSUNG_PWM select CPU_V6 - select GENERIC_GPIO - select HAVE_CLK - select HAVE_S3C2410_WATCHDOG if WATCHDOG select GENERIC_CLOCKEVENTS - select HAVE_SCHED_CLOCK + select GPIO_SAMSUNG select HAVE_S3C2410_I2C if I2C + select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_S3C_RTC if RTC_CLASS + select NEED_MACH_GPIO_H + select SAMSUNG_ATAGS + select SAMSUNG_WDT_RESET help Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, SMDK6450. -config ARCH_S5P6442 - bool "Samsung S5P6442" - select CPU_V6 - select GENERIC_GPIO - select HAVE_CLK - select ARCH_USES_GETTIMEOFFSET - select HAVE_S3C2410_WATCHDOG if WATCHDOG - help - Samsung S5P6442 CPU based systems - config ARCH_S5PC100 bool "Samsung S5PC100" - select GENERIC_GPIO - select HAVE_CLK + select ARCH_REQUIRE_GPIOLIB + select ATAGS + select CLKDEV_LOOKUP + select CLKSRC_SAMSUNG_PWM select CPU_V7 - select ARM_L1_CACHE_SHIFT_6 - select ARCH_USES_GETTIMEOFFSET + select GENERIC_CLOCKEVENTS + select GPIO_SAMSUNG select HAVE_S3C2410_I2C if I2C - select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG + select HAVE_S3C_RTC if RTC_CLASS + select NEED_MACH_GPIO_H + select SAMSUNG_ATAGS + select SAMSUNG_WDT_RESET help Samsung S5PC100 series based systems config ARCH_S5PV210 bool "Samsung S5PV210/S5PC110" - select CPU_V7 + select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_SPARSEMEM_ENABLE - select GENERIC_GPIO - select HAVE_CLK - select ARM_L1_CACHE_SHIFT_6 - select ARCH_HAS_CPUFREQ - select GENERIC_CLOCKEVENTS - select HAVE_SCHED_CLOCK - select HAVE_S3C2410_I2C if I2C - select HAVE_S3C_RTC if RTC_CLASS - select HAVE_S3C2410_WATCHDOG if WATCHDOG - help - Samsung S5PV210/S5PC110 series based systems - -config ARCH_EXYNOS4 - bool "Samsung EXYNOS4" + select ATAGS + select CLKDEV_LOOKUP + select CLKSRC_SAMSUNG_PWM select CPU_V7 - select ARCH_SPARSEMEM_ENABLE - select GENERIC_GPIO - select HAVE_CLK - select ARCH_HAS_CPUFREQ select GENERIC_CLOCKEVENTS - select HAVE_S3C_RTC if RTC_CLASS + select GPIO_SAMSUNG select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG + select HAVE_S3C_RTC if RTC_CLASS + select NEED_MACH_GPIO_H + select NEED_MACH_MEMORY_H + select SAMSUNG_ATAGS help - Samsung EXYNOS4 series based systems - -config ARCH_SHARK - bool "Shark" - select CPU_SA110 - select ISA - select ISA_DMA - select ZONE_DMA - select PCI - select ARCH_USES_GETTIMEOFFSET - help - Support for the StrongARM based Digital DNARD machine, also known - as "Shark" (<http://www.shark-linux.de/shark.html>). - -config ARCH_TCC_926 - bool "Telechips TCC ARM926-based systems" - select CPU_ARM926T - select HAVE_CLK - select CLKDEV_LOOKUP - select GENERIC_CLOCKEVENTS - help - Support for Telechips TCC ARM926-based systems. - -config ARCH_U300 - bool "ST-Ericsson U300 Series" - depends on MMU - select CPU_ARM926T - select HAVE_SCHED_CLOCK - select HAVE_TCM - select ARM_AMBA - select ARM_VIC - select GENERIC_CLOCKEVENTS - select CLKDEV_LOOKUP - select GENERIC_GPIO - help - Support for ST-Ericsson U300 series mobile platforms. - -config ARCH_U8500 - bool "ST-Ericsson U8500 Series" - select CPU_V7 - select ARM_AMBA - select GENERIC_CLOCKEVENTS - select CLKDEV_LOOKUP - select ARCH_REQUIRE_GPIOLIB - select ARCH_HAS_CPUFREQ - help - Support for ST-Ericsson's Ux500 architecture - -config ARCH_NOMADIK - bool "STMicroelectronics Nomadik" - select ARM_AMBA - select ARM_VIC - select CPU_ARM926T - select CLKDEV_LOOKUP - select GENERIC_CLOCKEVENTS - select ARCH_REQUIRE_GPIOLIB - help - Support for the Nomadik platform by ST-Ericsson + Samsung S5PV210/S5PC110 series based systems config ARCH_DAVINCI bool "TI DaVinci" - select GENERIC_CLOCKEVENTS + select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_REQUIRE_GPIOLIB - select ZONE_DMA - select HAVE_IDE select CLKDEV_LOOKUP select GENERIC_ALLOCATOR - select ARCH_HAS_HOLES_MEMORYMODEL + select GENERIC_CLOCKEVENTS + select GENERIC_IRQ_CHIP + select HAVE_IDE + select TI_PRIV_EDMA + select USE_OF + select ZONE_DMA help Support for TI's DaVinci platform. -config ARCH_OMAP - bool "TI OMAP" - select HAVE_CLK - select ARCH_REQUIRE_GPIOLIB - select ARCH_HAS_CPUFREQ - select GENERIC_CLOCKEVENTS - select HAVE_SCHED_CLOCK +config ARCH_OMAP1 + bool "TI OMAP1" + depends on MMU select ARCH_HAS_HOLES_MEMORYMODEL - help - Support for TI's OMAP platform (OMAP1/2/3/4). - -config PLAT_SPEAR - bool "ST SPEAr" - select ARM_AMBA + select ARCH_OMAP select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP + select CLKSRC_MMIO select GENERIC_CLOCKEVENTS - select HAVE_CLK + select GENERIC_IRQ_CHIP + select HAVE_IDE + select IRQ_DOMAIN + select NEED_MACH_IO_H if PCCARD + select NEED_MACH_MEMORY_H help - Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). + Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx) -config ARCH_VT8500 - bool "VIA/WonderMedia 85xx" - select CPU_ARM926T - select GENERIC_GPIO - select ARCH_HAS_CPUFREQ - select GENERIC_CLOCKEVENTS - select ARCH_REQUIRE_GPIOLIB - select HAVE_PWM - help - Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. endchoice +menu "Multiple platform selection" + depends on ARCH_MULTIPLATFORM + +comment "CPU Core family selection" + +config ARCH_MULTI_V4 + bool "ARMv4 based platforms (FA526)" + depends on !ARCH_MULTI_V6_V7 + select ARCH_MULTI_V4_V5 + select CPU_FA526 + +config ARCH_MULTI_V4T + bool "ARMv4T based platforms (ARM720T, ARM920T, ...)" + depends on !ARCH_MULTI_V6_V7 + select ARCH_MULTI_V4_V5 + select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \ + CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \ + CPU_ARM925T || CPU_ARM940T) + +config ARCH_MULTI_V5 + bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)" + depends on !ARCH_MULTI_V6_V7 + select ARCH_MULTI_V4_V5 + select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \ + CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \ + CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON) + +config ARCH_MULTI_V4_V5 + bool + +config ARCH_MULTI_V6 + bool "ARMv6 based platforms (ARM11)" + select ARCH_MULTI_V6_V7 + select CPU_V6K + +config ARCH_MULTI_V7 + bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)" + default y + select ARCH_MULTI_V6_V7 + select CPU_V7 + select HAVE_SMP + +config ARCH_MULTI_V6_V7 + bool + select MIGHT_HAVE_CACHE_L2X0 + +config ARCH_MULTI_CPU_AUTO + def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7) + select ARCH_MULTI_V5 + +endmenu + +config ARCH_VIRT + bool "Dummy Virtual Machine" if ARCH_MULTI_V7 + select ARM_AMBA + select ARM_GIC + select ARM_PSCI + select HAVE_ARM_ARCH_TIMER + # # This is sorted alphabetically by mach-* pathname. However, plat-* # Kconfigs may be included either alphabetically (according to the # plat- suffix) or along side the corresponding mach-* source. # +source "arch/arm/mach-mvebu/Kconfig" + source "arch/arm/mach-at91/Kconfig" -source "arch/arm/mach-bcmring/Kconfig" +source "arch/arm/mach-axxia/Kconfig" + +source "arch/arm/mach-bcm/Kconfig" + +source "arch/arm/mach-berlin/Kconfig" source "arch/arm/mach-clps711x/Kconfig" @@ -912,7 +936,9 @@ source "arch/arm/mach-footbridge/Kconfig" source "arch/arm/mach-gemini/Kconfig" -source "arch/arm/mach-h720x/Kconfig" +source "arch/arm/mach-highbank/Kconfig" + +source "arch/arm/mach-hisi/Kconfig" source "arch/arm/mach-integrator/Kconfig" @@ -924,34 +950,27 @@ source "arch/arm/mach-iop13xx/Kconfig" source "arch/arm/mach-ixp4xx/Kconfig" -source "arch/arm/mach-ixp2000/Kconfig" - -source "arch/arm/mach-ixp23xx/Kconfig" +source "arch/arm/mach-keystone/Kconfig" source "arch/arm/mach-kirkwood/Kconfig" source "arch/arm/mach-ks8695/Kconfig" -source "arch/arm/mach-loki/Kconfig" - -source "arch/arm/mach-lpc32xx/Kconfig" - source "arch/arm/mach-msm/Kconfig" +source "arch/arm/mach-moxart/Kconfig" + source "arch/arm/mach-mv78xx0/Kconfig" -source "arch/arm/plat-mxc/Kconfig" +source "arch/arm/mach-imx/Kconfig" source "arch/arm/mach-mxs/Kconfig" source "arch/arm/mach-netx/Kconfig" source "arch/arm/mach-nomadik/Kconfig" -source "arch/arm/plat-nomadik/Kconfig" - -source "arch/arm/mach-ns9xxx/Kconfig" -source "arch/arm/mach-nuc93x/Kconfig" +source "arch/arm/mach-nspire/Kconfig" source "arch/arm/plat-omap/Kconfig" @@ -961,49 +980,45 @@ source "arch/arm/mach-omap2/Kconfig" source "arch/arm/mach-orion5x/Kconfig" +source "arch/arm/mach-picoxcell/Kconfig" + source "arch/arm/mach-pxa/Kconfig" source "arch/arm/plat-pxa/Kconfig" source "arch/arm/mach-mmp/Kconfig" +source "arch/arm/mach-qcom/Kconfig" + source "arch/arm/mach-realview/Kconfig" +source "arch/arm/mach-rockchip/Kconfig" + source "arch/arm/mach-sa1100/Kconfig" -source "arch/arm/plat-samsung/Kconfig" -source "arch/arm/plat-s3c24xx/Kconfig" -source "arch/arm/plat-s5p/Kconfig" +source "arch/arm/mach-socfpga/Kconfig" -source "arch/arm/plat-spear/Kconfig" +source "arch/arm/mach-spear/Kconfig" -source "arch/arm/plat-tcc/Kconfig" +source "arch/arm/mach-sti/Kconfig" -if ARCH_S3C2410 -source "arch/arm/mach-s3c2400/Kconfig" -source "arch/arm/mach-s3c2410/Kconfig" -source "arch/arm/mach-s3c2412/Kconfig" -source "arch/arm/mach-s3c2416/Kconfig" -source "arch/arm/mach-s3c2440/Kconfig" -source "arch/arm/mach-s3c2443/Kconfig" -endif +source "arch/arm/mach-s3c24xx/Kconfig" -if ARCH_S3C64XX source "arch/arm/mach-s3c64xx/Kconfig" -endif source "arch/arm/mach-s5p64x0/Kconfig" -source "arch/arm/mach-s5p6442/Kconfig" - source "arch/arm/mach-s5pc100/Kconfig" source "arch/arm/mach-s5pv210/Kconfig" -source "arch/arm/mach-exynos4/Kconfig" +source "arch/arm/mach-exynos/Kconfig" +source "arch/arm/plat-samsung/Kconfig" source "arch/arm/mach-shmobile/Kconfig" -source "arch/arm/plat-stmp3xxx/Kconfig" +source "arch/arm/mach-sunxi/Kconfig" + +source "arch/arm/mach-prima2/Kconfig" source "arch/arm/mach-tegra/Kconfig" @@ -1020,6 +1035,8 @@ source "arch/arm/mach-vt8500/Kconfig" source "arch/arm/mach-w90x900/Kconfig" +source "arch/arm/mach-zynq/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool @@ -1027,11 +1044,17 @@ config ARCH_ACORN config PLAT_IOP bool select GENERIC_CLOCKEVENTS - select HAVE_SCHED_CLOCK config PLAT_ORION bool - select HAVE_SCHED_CLOCK + select CLKSRC_MMIO + select COMMON_CLK + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + +config PLAT_ORION_LEGACY + bool + select PLAT_ORION config PLAT_PXA bool @@ -1041,29 +1064,21 @@ config PLAT_VERSATILE config ARM_TIMER_SP804 bool + select CLKSRC_MMIO + select CLKSRC_OF if OF + +source "arch/arm/firmware/Kconfig" source arch/arm/mm/Kconfig config IWMMXT bool "Enable iWMMXt support" - depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 - default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP + depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B + default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B help Enable support for iWMMXt context switching at run time if running on a CPU that supports it. -# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER -config XSCALE_PMU - bool - depends on CPU_XSCALE && !XSCALE_PMU_TIMER - default y - -config CPU_HAS_PMU - depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ - (!ARCH_OMAP3 || OMAP3_EMU) - default y - bool - config MULTI_IRQ_HANDLER bool help @@ -1073,6 +1088,29 @@ if !MMU source "arch/arm/Kconfig-nommu" endif +config PJ4B_ERRATA_4742 + bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation" + depends on CPU_PJ4B && MACH_ARMADA_370 + default y + help + When coming out of either a Wait for Interrupt (WFI) or a Wait for + Event (WFE) IDLE states, a specific timing sensitivity exists between + the retiring WFI/WFE instructions and the newly issued subsequent + instructions. This sensitivity can result in a CPU hang scenario. + Workaround: + The software must insert either a Data Synchronization Barrier (DSB) + or Data Memory Barrier (DMB) command immediately after the WFI/WFE + instruction + +config ARM_ERRATA_326103 + bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory" + depends on CPU_V6 + help + Executing a SWP instruction to read-only memory does not set bit 11 + of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to + treat the access as a read, preventing a COW from occurring and + causing the faulting task to livelock. + config ARM_ERRATA_411920 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" depends on CPU_V6 || CPU_V6K @@ -1101,6 +1139,7 @@ config ARM_ERRATA_430973 config ARM_ERRATA_458693 bool "ARM errata: Processor deadlock when a false hazard is created" depends on CPU_V7 + depends on !ARCH_MULTIPLATFORM help This option enables the workaround for the 458693 Cortex-A8 (r2p0) erratum. For very specific sequences of memory operations, it is @@ -1114,6 +1153,7 @@ config ARM_ERRATA_458693 config ARM_ERRATA_460075 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" depends on CPU_V7 + depends on !ARCH_MULTIPLATFORM help This option enables the workaround for the 460075 Cortex-A8 (r2p0) erratum. Any asynchronous access to the L2 cache may encounter a @@ -1126,6 +1166,7 @@ config ARM_ERRATA_460075 config ARM_ERRATA_742230 bool "ARM errata: DMB operation may be faulty" depends on CPU_V7 && SMP + depends on !ARCH_MULTIPLATFORM help This option enables the workaround for the 742230 Cortex-A9 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction @@ -1138,6 +1179,7 @@ config ARM_ERRATA_742230 config ARM_ERRATA_742231 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" depends on CPU_V7 && SMP + depends on !ARCH_MULTIPLATFORM help This option enables the workaround for the 742231 Cortex-A9 (r2p0..r2p2) erratum. Under certain conditions, specific to the @@ -1149,22 +1191,19 @@ config ARM_ERRATA_742231 register of the Cortex-A9 which reduces the linefill issuing capabilities of the processor. -config PL310_ERRATA_588369 - bool "Clean & Invalidate maintenance operations do not invalidate clean lines" - depends on CACHE_L2X0 +config ARM_ERRATA_643719 + bool "ARM errata: LoUIS bit field in CLIDR register is incorrect" + depends on CPU_V7 && SMP help - The PL310 L2 cache controller implements three types of Clean & - Invalidate maintenance operations: by Physical Address - (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). - They are architecturally defined to behave as the execution of a - clean operation followed immediately by an invalidate operation, - both performing to the same memory location. This functionality - is not correctly implemented in PL310 as clean lines are not - invalidated as a result of these operations. + This option enables the workaround for the 643719 Cortex-A9 (prior to + r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR + register returns zero when it should return one. The workaround + corrects this value, ensuring cache maintenance operations which use + it behave as intended and avoiding data corruption. config ARM_ERRATA_720789 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" - depends on CPU_V7 && SMP + depends on CPU_V7 help This option enables the workaround for the 720789 Cortex-A9 (prior to r2p0) erratum. A faulty ASID can be sent to the other CPUs for the @@ -1174,23 +1213,13 @@ config ARM_ERRATA_720789 tables. The workaround changes the TLB flushing routines to invalidate entries regardless of the ASID. -config PL310_ERRATA_727915 - bool "Background Clean & Invalidate by Way operation can cause data corruption" - depends on CACHE_L2X0 - help - PL310 implements the Clean & Invalidate by Way L2 cache maintenance - operation (offset 0x7FC). This operation runs in background so that - PL310 can handle normal accesses while it is in progress. Under very - rare circumstances, due to this erratum, write data can be lost when - PL310 treats a cacheable write transaction during a Clean & - Invalidate by Way operation. - config ARM_ERRATA_743622 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" depends on CPU_V7 + depends on !ARCH_MULTIPLATFORM help This option enables the workaround for the 743622 Cortex-A9 - (r2p0..r2p2) erratum. Under very rare conditions, a faulty + (r2p*) erratum. Under very rare conditions, a faulty optimisation in the Cortex-A9 Store Buffer may lead to data corruption. This workaround sets a specific bit in the diagnostic register of the Cortex-A9 which disables the Store Buffer @@ -1200,7 +1229,8 @@ config ARM_ERRATA_743622 config ARM_ERRATA_751472 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" - depends on CPU_V7 && SMP + depends on CPU_V7 + depends on !ARCH_MULTIPLATFORM help This option enables the workaround for the 751472 Cortex-A9 (prior to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the @@ -1208,21 +1238,6 @@ config ARM_ERRATA_751472 operation is received by a CPU before the ICIALLUIS has completed, potentially leading to corrupted entries in the cache or TLB. -config ARM_ERRATA_753970 - bool "ARM errata: cache sync operation may be faulty" - depends on CACHE_PL310 - help - This option enables the workaround for the 753970 PL310 (r3p0) erratum. - - Under some condition the effect of cache sync operation on - the store buffer still remains when the operation completes. - This means that the store buffer is always asked to drain and - this prevents it from merging any further writes. The workaround - is to replace the normal offset of cache sync operation (0x730) - by another offset targeting an unmapped PL310 register 0x740. - This has the same effect as the cache sync operation: store buffer - drain and waiting for all buffers empty. - config ARM_ERRATA_754322 bool "ARM errata: possible faulty MMU translations following an ASID switch" depends on CPU_V7 @@ -1245,6 +1260,61 @@ config ARM_ERRATA_754327 This workaround defines cpu_relax() as smp_mb(), preventing correctly written polling loops from denying visibility of updates to memory. +config ARM_ERRATA_364296 + bool "ARM errata: Possible cache data corruption with hit-under-miss enabled" + depends on CPU_V6 + help + This options enables the workaround for the 364296 ARM1136 + r0p2 erratum (possible cache data corruption with + hit-under-miss enabled). It sets the undocumented bit 31 in + the auxiliary control register and the FI bit in the control + register, thus disabling hit-under-miss without putting the + processor into full low interrupt latency mode. ARM11MPCore + is not affected. + +config ARM_ERRATA_764369 + bool "ARM errata: Data cache line maintenance operation by MVA may not succeed" + depends on CPU_V7 && SMP + help + This option enables the workaround for erratum 764369 + affecting Cortex-A9 MPCore with two or more processors (all + current revisions). Under certain timing circumstances, a data + cache line maintenance operation by MVA targeting an Inner + Shareable memory region may fail to proceed up to either the + Point of Coherency or to the Point of Unification of the + system. This workaround adds a DSB instruction before the + relevant cache maintenance functions and sets a specific bit + in the diagnostic control register of the SCU. + +config ARM_ERRATA_775420 + bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock" + depends on CPU_V7 + help + This option enables the workaround for the 775420 Cortex-A9 (r2p2, + r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance + operation aborts with MMU exception, it might cause the processor + to deadlock. This workaround puts DSB before executing ISB if + an abort may occur on cache maintenance. + +config ARM_ERRATA_798181 + bool "ARM errata: TLBI/DSB failure on Cortex-A15" + depends on CPU_V7 && SMP + help + On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not + adequately shooting down all use of the old entries. This + option enables the Linux kernel workaround for this erratum + which sends an IPI to the CPUs that are running the same ASID + as the one being invalidated. + +config ARM_ERRATA_773022 + bool "ARM errata: incorrect instructions may be executed from loop buffer" + depends on CPU_V7 + help + This option enables the workaround for the 773022 Cortex-A15 + (up to r0p4) erratum. In certain rare sequences of code, the + loop buffer may deliver incorrect instructions. This + workaround disables the loop buffer to avoid the erratum. + endmenu source "arch/arm/common/Kconfig" @@ -1293,12 +1363,6 @@ config PCI_NANOENGINE config PCI_SYSCALL def_bool PCI -# Select the host bridge type -config PCI_HOST_VIA82C505 - bool - depends on PCI && ARCH_SHARK - default y - config PCI_HOST_ITE8152 bool depends on PCI && MACH_ARMCORE @@ -1306,6 +1370,7 @@ config PCI_HOST_ITE8152 select DMABOUNCE source "drivers/pci/Kconfig" +source "drivers/pci/pcie/Kconfig" source "drivers/pcmcia/Kconfig" @@ -1313,31 +1378,33 @@ endmenu menu "Kernel Features" -source "kernel/time/Kconfig" +config HAVE_SMP + bool + help + This option should be selected by machines which have an SMP- + capable CPU. + + The only effect of this option is to make the SMP-related + options available to the user for configuration. config SMP - bool "Symmetric Multi-Processing (EXPERIMENTAL)" - depends on EXPERIMENTAL + bool "Symmetric Multi-Processing" depends on CPU_V6K || CPU_V7 depends on GENERIC_CLOCKEVENTS - depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ - MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ - ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ - ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE - select USE_GENERIC_SMP_HELPERS - select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP + depends on HAVE_SMP + depends on MMU || ARM_MPU help This enables support for systems with more than one CPU. If you have - a system with only one CPU, like most personal computers, say N. If - you have a system with more than one CPU, say Y. + a system with only one CPU, say N. If you have a system with more + than one CPU, say Y. - If you say N here, the kernel will run on single and multiprocessor + If you say N here, the kernel will run on uni- and multiprocessor machines, but will use only one CPU of a multiprocessor machine. If - you say Y here, the kernel will run on many, but not all, single - processor machines. On a single processor machine, the kernel will - run faster if you say N here. + you say Y here, the kernel will run on many, but not all, + uniprocessor machines. On a uniprocessor machine, the kernel + will run faster if you say N here. - See also <file:Documentation/i386/IO-APIC.txt>, + See also <file:Documentation/x86/i386/IO-APIC.txt>, <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at <http://tldp.org/HOWTO/SMP-HOWTO.html>. @@ -1345,8 +1412,7 @@ config SMP config SMP_ON_UP bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" - depends on EXPERIMENTAL - depends on SMP && !XIP_KERNEL + depends on SMP && !XIP_KERNEL && MMU default y help SMP kernels contain instructions which fail on non-SMP processors. @@ -1356,21 +1422,88 @@ config SMP_ON_UP If you don't know what to do here, say Y. +config ARM_CPU_TOPOLOGY + bool "Support cpu topology definition" + depends on SMP && CPU_V7 + default y + help + Support ARM cpu topology definition. The MPIDR register defines + affinity between processors which is then used to describe the cpu + topology of an ARM System. + +config SCHED_MC + bool "Multi-core scheduler support" + depends on ARM_CPU_TOPOLOGY + help + Multi-core scheduler support improves the CPU scheduler's decision + making when dealing with multi-core CPU chips at a cost of slightly + increased overhead in some places. If unsure say N here. + +config SCHED_SMT + bool "SMT scheduler support" + depends on ARM_CPU_TOPOLOGY + help + Improves the CPU scheduler's decision making when dealing with + MultiThreading at a cost of slightly increased overhead in some + places. If unsure say N here. + config HAVE_ARM_SCU bool - depends on SMP help This option enables support for the ARM system coherency unit +config HAVE_ARM_ARCH_TIMER + bool "Architected timer support" + depends on CPU_V7 + select ARM_ARCH_TIMER + select GENERIC_CLOCKEVENTS + help + This option enables support for the ARM architected timer + config HAVE_ARM_TWD bool depends on SMP - select TICK_ONESHOT + select CLKSRC_OF if OF help This options enables support for the ARM timer and watchdog unit +config MCPM + bool "Multi-Cluster Power Management" + depends on CPU_V7 && SMP + help + This option provides the common power management infrastructure + for (multi-)cluster based systems, such as big.LITTLE based + systems. + +config BIG_LITTLE + bool "big.LITTLE support (Experimental)" + depends on CPU_V7 && SMP + select MCPM + help + This option enables support selections for the big.LITTLE + system architecture. + +config BL_SWITCHER + bool "big.LITTLE switcher support" + depends on BIG_LITTLE && MCPM && HOTPLUG_CPU + select ARM_CPU_SUSPEND + select CPU_PM + help + The big.LITTLE "switcher" provides the core functionality to + transparently handle transition between a cluster of A15's + and a cluster of A7's in a big.LITTLE system. + +config BL_SWITCHER_DUMMY_IF + tristate "Simple big.LITTLE switcher user interface" + depends on BL_SWITCHER && DEBUG_KERNEL + help + This is a simple and dummy char dev interface to control + the big.LITTLE switcher core code. It is meant for + debugging purposes only. + choice prompt "Memory split" + depends on MMU default VMSPLIT_3G help Select the desired split between kernel and user memory. @@ -1388,6 +1521,7 @@ endchoice config PAGE_OFFSET hex + default PHYS_OFFSET if !MMU default 0x40000000 if VMSPLIT_1G default 0x80000000 if VMSPLIT_2G default 0xC0000000 @@ -1399,40 +1533,93 @@ config NR_CPUS default "4" config HOTPLUG_CPU - bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" - depends on SMP && HOTPLUG && EXPERIMENTAL - depends on !ARCH_MSM + bool "Support for hot-pluggable CPUs" + depends on SMP help Say Y here to experiment with turning CPUs off and on. CPUs can be controlled through /sys/devices/system/cpu. -config LOCAL_TIMERS - bool "Use local timer interrupts" - depends on SMP - default y - select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) +config ARM_PSCI + bool "Support for the ARM Power State Coordination Interface (PSCI)" + depends on CPU_V7 help - Enable support for local timers on SMP platforms, rather then the - legacy IPI broadcast method. Local timers allows the system - accounting to be spread across the timer interval, preventing a - "thundering herd" at every timer tick. + Say Y here if you want Linux to communicate with system firmware + implementing the PSCI specification for CPU-centric power + management operations described in ARM document number ARM DEN + 0022A ("Power State Coordination Interface System Software on + ARM processors"). + +# The GPIO number here must be sorted by descending number. In case of +# a multiplatform kernel, we just want the highest value required by the +# selected platforms. +config ARCH_NR_GPIO + int + default 1024 if ARCH_SHMOBILE || ARCH_TEGRA + default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX + default 416 if ARCH_SUNXI + default 392 if ARCH_U8500 + default 352 if ARCH_VT8500 + default 264 if MACH_H4700 + default 0 + help + Maximum number of GPIOs in the system. + + If unsure, leave the default value. source kernel/Kconfig.preempt -config HZ +config HZ_FIXED int - default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ - ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4 - default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER + default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \ + ARCH_S5PV210 || ARCH_EXYNOS4 default AT91_TIMER_HZ if ARCH_AT91 - default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE - default 100 + default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY + default 0 + +choice + depends on HZ_FIXED = 0 + prompt "Timer frequency" + +config HZ_100 + bool "100 Hz" + +config HZ_200 + bool "200 Hz" + +config HZ_250 + bool "250 Hz" + +config HZ_300 + bool "300 Hz" + +config HZ_500 + bool "500 Hz" + +config HZ_1000 + bool "1000 Hz" + +endchoice + +config HZ + int + default HZ_FIXED if HZ_FIXED != 0 + default 100 if HZ_100 + default 200 if HZ_200 + default 250 if HZ_250 + default 300 if HZ_300 + default 500 if HZ_500 + default 1000 + +config SCHED_HRTICK + def_bool HIGH_RES_TIMERS config THUMB2_KERNEL - bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" - depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL + bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY + depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K + default y if CPU_THUMBONLY select AEABI select ARM_ASM_UNIFIED + select ARM_UNWIND help By enabling this option, the kernel will be compiled in Thumb-2 mode. A compiler/assembler that understand the unified @@ -1491,8 +1678,7 @@ config AEABI config OABI_COMPAT bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" - depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL - default y + depends on AEABI && !THUMB2_KERNEL help This option preserves the old syscall interface along with the new (ARM EABI) one. It also provides a compatibility layer to @@ -1500,11 +1686,16 @@ config OABI_COMPAT in memory differs between the legacy ABI and the new ARM EABI (only for non "thumb" binaries). This option adds a tiny overhead to all syscalls and produces a slightly larger kernel. + + The seccomp filter system will not be available when this is + selected, since there is no way yet to sensibly distinguish + between calling conventions during filtering. + If you know you'll be using only pure EABI user space then you can say N here. If this option is not selected and you attempt to execute a legacy ABI binary then the result will be UNPREDICTABLE (in fact it can be predicted that it won't work - at all). If in doubt say Y. + at all). If in doubt say N. config ARCH_HAS_HOLES_MEMORYMODEL bool @@ -1518,9 +1709,12 @@ config ARCH_SPARSEMEM_DEFAULT config ARCH_SELECT_MEMORY_MODEL def_bool ARCH_SPARSEMEM_ENABLE +config HAVE_ARCH_PFN_VALID + def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM + config HIGHMEM - bool "High Memory Support (EXPERIMENTAL)" - depends on MMU && EXPERIMENTAL + bool "High Memory Support" + depends on MMU help The address space of ARM processors is only 4 Gigabytes large and it has to accommodate user address space, kernel address @@ -1538,22 +1732,33 @@ config HIGHMEM config HIGHPTE bool "Allocate 2nd-level pagetables from highmem" depends on HIGHMEM - depends on !OUTER_CACHE config HW_PERF_EVENTS bool "Enable hardware performance counter support for perf events" - depends on PERF_EVENTS && CPU_HAS_PMU + depends on PERF_EVENTS default y help Enable hardware performance counter support for perf events. If disabled, perf events will use software events only. +config SYS_SUPPORTS_HUGETLBFS + def_bool y + depends on ARM_LPAE + +config HAVE_ARCH_TRANSPARENT_HUGEPAGE + def_bool y + depends on ARM_LPAE + +config ARCH_WANT_GENERAL_HUGETLB + def_bool y + source "mm/Kconfig" config FORCE_MAX_ZONEORDER - int "Maximum zone order" if ARCH_SHMOBILE - range 11 64 if ARCH_SHMOBILE - default "9" if SA1111 + int "Maximum zone order" if ARCH_SHMOBILE_LEGACY + range 11 64 if ARCH_SHMOBILE_LEGACY + default "12" if SOC_AM33XX + default "9" if SA1111 || ARCH_EFM32 default "11" help The kernel memory allocator divides physically contiguous memory @@ -1566,59 +1771,6 @@ config FORCE_MAX_ZONEORDER This config option is actually maximum order plus one. For example, a value of 11 means that the largest free memory block is 2^10 pages. -config LEDS - bool "Timer and CPU usage LEDs" - depends on ARCH_CDB89712 || ARCH_EBSA110 || \ - ARCH_EBSA285 || ARCH_INTEGRATOR || \ - ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ - ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ - ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ - ARCH_AT91 || ARCH_DAVINCI || \ - ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW - help - If you say Y here, the LEDs on your machine will be used - to provide useful information about your current system status. - - If you are compiling a kernel for a NetWinder or EBSA-285, you will - be able to select which LEDs are active using the options below. If - you are compiling a kernel for the EBSA-110 or the LART however, the - red LED will simply flash regularly to indicate that the system is - still functional. It is safe to say Y here if you have a CATS - system, but the driver will do nothing. - -config LEDS_TIMER - bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ - OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ - || MACH_OMAP_PERSEUS2 - depends on LEDS - depends on !GENERIC_CLOCKEVENTS - default y if ARCH_EBSA110 - help - If you say Y here, one of the system LEDs (the green one on the - NetWinder, the amber one on the EBSA285, or the red one on the LART) - will flash regularly to indicate that the system is still - operational. This is mainly useful to kernel hackers who are - debugging unstable kernels. - - The LART uses the same LED for both Timer LED and CPU usage LED - functions. You may choose to use both, but the Timer LED function - will overrule the CPU usage LED. - -config LEDS_CPU - bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ - !ARCH_OMAP) \ - || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ - || MACH_OMAP_PERSEUS2 - depends on LEDS - help - If you say Y here, the red LED will be used to give a good real - time indication of CPU usage, by lighting whenever the idle task - is not currently executing. - - The LART uses the same LED for both Timer LED and CPU usage LED - functions. You may choose to use both, but the Timer LED function - will overrule the CPU usage LED. - config ALIGNMENT_TRAP bool depends on CPU_CP15_MMU @@ -1634,8 +1786,8 @@ config ALIGNMENT_TRAP configuration it is safe to say N, otherwise say Y. config UACCESS_WITH_MEMCPY - bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" - depends on MMU && EXPERIMENTAL + bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()" + depends on MMU default y if CPU_FEROCEON help Implement faster copy_to_user and clear_user methods for CPU @@ -1663,29 +1815,58 @@ config SECCOMP and the task is only allowed to execute a few safe syscalls defined by each seccomp mode. -config CC_STACKPROTECTOR - bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" - depends on EXPERIMENTAL +config SWIOTLB + def_bool y + +config IOMMU_HELPER + def_bool SWIOTLB + +config XEN_DOM0 + def_bool y + depends on XEN + +config XEN + bool "Xen guest support on ARM (EXPERIMENTAL)" + depends on ARM && AEABI && OF + depends on CPU_V7 && !CPU_V6 + depends on !GENERIC_ATOMIC64 + depends on MMU + select ARCH_DMA_ADDR_T_64BIT + select ARM_PSCI + select SWIOTLB_XEN + help + Say Y if you want to run Linux in a Virtual Machine on Xen on ARM. + +endmenu + +menu "Boot options" + +config USE_OF + bool "Flattened Device Tree support" + select IRQ_DOMAIN + select OF + select OF_EARLY_FLATTREE + select OF_RESERVED_MEM help - This option turns on the -fstack-protector GCC feature. This - feature puts, at the beginning of functions, a canary value on - the stack just before the return address, and validates - the value just before actually returning. Stack based buffer - overflows (that need to overwrite this return address) now also - overwrite the canary, which gets detected and the attack is then - neutralized via a kernel panic. - This feature requires gcc version 4.2 or above. + Include support for flattened device tree machine descriptions. + +config ATAGS + bool "Support for the traditional ATAGS boot data passing" if USE_OF + default y + help + This is the traditional way of passing data to the kernel at boot + time. If you are solely relying on the flattened device tree (or + the ARM_ATAG_DTB_COMPAT option) then you may unselect this option + to remove ATAGS support from your kernel binary. If unsure, + leave this to y. config DEPRECATED_PARAM_STRUCT bool "Provide old way to pass kernel parameters" + depends on ATAGS help This was deprecated in 2001 and announced to live on for 5 years. Some old boot loaders still use this way. -endmenu - -menu "Boot options" - # Compressed boot loader in ROM. Yes, we really want to ask about # TEXT and BSS so we preserve their values in the config files. config ZBOOT_ROM_TEXT @@ -1715,21 +1896,90 @@ config ZBOOT_ROM_BSS config ZBOOT_ROM bool "Compressed boot loader in ROM/flash" depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS + depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR help Say Y here if you intend to execute your compressed kernel image (zImage) directly from ROM or flash. If unsure, say N. +choice + prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)" + depends on ZBOOT_ROM && ARCH_SH7372 + default ZBOOT_ROM_NONE + help + Include experimental SD/MMC loading code in the ROM-able zImage. + With this enabled it is possible to write the ROM-able zImage + kernel image to an MMC or SD card and boot the kernel straight + from the reset vector. At reset the processor Mask ROM will load + the first part of the ROM-able zImage which in turn loads the + rest the kernel image to RAM. + +config ZBOOT_ROM_NONE + bool "No SD/MMC loader in zImage (EXPERIMENTAL)" + help + Do not load image from SD or MMC + config ZBOOT_ROM_MMCIF bool "Include MMCIF loader in zImage (EXPERIMENTAL)" - depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL help - Say Y here to include experimental MMCIF loading code in the - ROM-able zImage. With this enabled it is possible to write the - the ROM-able zImage kernel image to an MMC card and boot the - kernel straight from the reset vector. At reset the processor - Mask ROM will load the first part of the the ROM-able zImage - which in turn loads the rest the kernel image to RAM using the - MMCIF hardware block. + Load image from MMCIF hardware block. + +config ZBOOT_ROM_SH_MOBILE_SDHI + bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)" + help + Load image from SDHI hardware block + +endchoice + +config ARM_APPENDED_DTB + bool "Use appended device tree blob to zImage (EXPERIMENTAL)" + depends on OF + help + With this option, the boot code will look for a device tree binary + (DTB) appended to zImage + (e.g. cat zImage <filename>.dtb > zImage_w_dtb). + + This is meant as a backward compatibility convenience for those + systems with a bootloader that can't be upgraded to accommodate + the documented boot protocol using a device tree. + + Beware that there is very little in terms of protection against + this option being confused by leftover garbage in memory that might + look like a DTB header after a reboot if no actual DTB is appended + to zImage. Do not leave this option active in a production kernel + if you don't intend to always append a DTB. Proper passing of the + location into r2 of a bootloader provided DTB is always preferable + to this option. + +config ARM_ATAG_DTB_COMPAT + bool "Supplement the appended DTB with traditional ATAG information" + depends on ARM_APPENDED_DTB + help + Some old bootloaders can't be updated to a DTB capable one, yet + they provide ATAGs with memory configuration, the ramdisk address, + the kernel cmdline string, etc. Such information is dynamically + provided by the bootloader and can't always be stored in a static + DTB. To allow a device tree enabled kernel to be used with such + bootloaders, this option allows zImage to extract the information + from the ATAG list and store it at run time into the appended DTB. + +choice + prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT + default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER + +config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER + bool "Use bootloader kernel arguments if available" + help + Uses the command-line options passed by the boot loader instead of + the device tree bootargs property. If the boot loader doesn't provide + any, the device tree bootargs property will be used. + +config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND + bool "Extend with bootloader kernel arguments" + help + The command-line arguments provided by the boot loader will be + appended to the the device tree bootargs property. + +endchoice config CMDLINE string "Default kernel command string" @@ -1741,20 +1991,36 @@ config CMDLINE time by entering them here. As a minimum, you should specify the memory size and the root device (e.g., mem=64M root=/dev/nfs). +choice + prompt "Kernel command line type" if CMDLINE != "" + default CMDLINE_FROM_BOOTLOADER + depends on ATAGS + +config CMDLINE_FROM_BOOTLOADER + bool "Use bootloader kernel arguments if available" + help + Uses the command-line options passed by the boot loader. If + the boot loader doesn't provide any, the default kernel command + string provided in CMDLINE will be used. + +config CMDLINE_EXTEND + bool "Extend bootloader kernel arguments" + help + The command-line arguments provided by the boot loader will be + appended to the default kernel command string. + config CMDLINE_FORCE bool "Always use the default kernel command string" - depends on CMDLINE != "" help Always use the default kernel command string, even if the boot loader passes other arguments to the kernel. This is useful if you cannot or don't want to change the command-line options your boot loader passes to the kernel. - - If unsure, say N. +endchoice config XIP_KERNEL bool "Kernel Execute-In-Place from ROM" - depends on !ZBOOT_ROM + depends on !ARM_LPAE && !ARCH_MULTIPLATFORM help Execute-In-Place allows the kernel to run from non-volatile storage directly addressable by the CPU, such as NOR flash. This saves RAM @@ -1784,7 +2050,7 @@ config XIP_PHYS_ADDR config KEXEC bool "Kexec system call (EXPERIMENTAL)" - depends on EXPERIMENTAL + depends on (!SMP || PM_SLEEP_SMP) help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot @@ -1793,12 +2059,11 @@ config KEXEC It is an ongoing process to be certain the hardware in a machine is properly shutdown, so do not be surprised if this code does not - initially work for you. It may help to enable device hotplugging - support. + initially work for you. config ATAGS_PROC bool "Export atags in procfs" - depends on KEXEC + depends on ATAGS && KEXEC default y help Should the atags used to boot the kernel be exported in an "atags" @@ -1806,7 +2071,6 @@ config ATAGS_PROC config CRASH_DUMP bool "Build kdump crash kernel (EXPERIMENTAL)" - depends on EXPERIMENTAL help Generate crash dump after being started by kexec. This should be normally only set in special crash dump kernels which are @@ -1819,7 +2083,6 @@ config CRASH_DUMP config AUTO_ZRELADDR bool "Auto calculation of the decompressed kernel image address" - depends on !ZBOOT_ROM && !ARCH_U300 help ZRELADDR is the physical address where the decompressed kernel image will be placed. If AUTO_ZRELADDR is selected, the address @@ -1831,91 +2094,8 @@ endmenu menu "CPU Power Management" -if ARCH_HAS_CPUFREQ - source "drivers/cpufreq/Kconfig" -config CPU_FREQ_IMX - tristate "CPUfreq driver for i.MX CPUs" - depends on ARCH_MXC && CPU_FREQ - help - This enables the CPUfreq driver for i.MX CPUs. - -config CPU_FREQ_SA1100 - bool - -config CPU_FREQ_SA1110 - bool - -config CPU_FREQ_INTEGRATOR - tristate "CPUfreq driver for ARM Integrator CPUs" - depends on ARCH_INTEGRATOR && CPU_FREQ - default y - help - This enables the CPUfreq driver for ARM Integrator CPUs. - - For details, take a look at <file:Documentation/cpu-freq>. - - If in doubt, say Y. - -config CPU_FREQ_PXA - bool - depends on CPU_FREQ && ARCH_PXA && PXA25x - default y - select CPU_FREQ_DEFAULT_GOV_USERSPACE - -config CPU_FREQ_S3C64XX - bool "CPUfreq support for Samsung S3C64XX CPUs" - depends on CPU_FREQ && CPU_S3C6410 - -config CPU_FREQ_S3C - bool - help - Internal configuration node for common cpufreq on Samsung SoC - -config CPU_FREQ_S3C24XX - bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" - depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL - select CPU_FREQ_S3C - help - This enables the CPUfreq driver for the Samsung S3C24XX family - of CPUs. - - For details, take a look at <file:Documentation/cpu-freq>. - - If in doubt, say N. - -config CPU_FREQ_S3C24XX_PLL - bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" - depends on CPU_FREQ_S3C24XX && EXPERIMENTAL - help - Compile in support for changing the PLL frequency from the - S3C24XX series CPUfreq driver. The PLL takes time to settle - after a frequency change, so by default it is not enabled. - - This also means that the PLL tables for the selected CPU(s) will - be built which may increase the size of the kernel image. - -config CPU_FREQ_S3C24XX_DEBUG - bool "Debug CPUfreq Samsung driver core" - depends on CPU_FREQ_S3C24XX - help - Enable s3c_freq_dbg for the Samsung S3C CPUfreq core - -config CPU_FREQ_S3C24XX_IODEBUG - bool "Debug CPUfreq Samsung driver IO timing" - depends on CPU_FREQ_S3C24XX - help - Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core - -config CPU_FREQ_S3C24XX_DEBUGFS - bool "Export debugfs for CPUFreq" - depends on CPU_FREQ_S3C24XX && DEBUG_FS - help - Export status information via debugfs. - -endif - source "drivers/cpuidle/Kconfig" endmenu @@ -1950,7 +2130,7 @@ config FPE_NWFPE_XP config FPE_FASTFPE bool "FastFPE math emulation (EXPERIMENTAL)" - depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL + depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 ---help--- Say Y here to include the FAST floating point emulator in the kernel. This is an experimental much faster emulator which now also has full @@ -1986,6 +2166,12 @@ config NEON Say Y to include support code for NEON, the ARMv7 Advanced SIMD Extension. +config KERNEL_MODE_NEON + bool "Support for NEON in kernel mode" + depends on NEON && AEABI + help + Say Y to include support for NEON in kernel mode. + endmenu menu "Userspace binary formats" @@ -2009,8 +2195,19 @@ menu "Power management options" source "kernel/power/Kconfig" config ARCH_SUSPEND_POSSIBLE + depends on !ARCH_S5PC100 + depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \ + CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK def_bool y +config ARM_CPU_SUSPEND + def_bool PM_SLEEP + +config ARCH_HIBERNATION_POSSIBLE + bool + depends on MMU + default y if ARCH_SUSPEND_POSSIBLE + endmenu source "net/Kconfig" @@ -2026,3 +2223,5 @@ source "security/Kconfig" source "crypto/Kconfig" source "lib/Kconfig" + +source "arch/arm/kvm/Kconfig" |