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-rw-r--r--Documentation/kbuild/makefiles.txt411
1 files changed, 313 insertions, 98 deletions
diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt
index 51104f9194a..c600e2f44a6 100644
--- a/Documentation/kbuild/makefiles.txt
+++ b/Documentation/kbuild/makefiles.txt
@@ -18,6 +18,7 @@ This document describes the Linux kernel Makefiles.
--- 3.9 Dependency tracking
--- 3.10 Special Rules
--- 3.11 $(CC) support functions
+ --- 3.12 $(LD) support functions
=== 4 Host Program support
--- 4.1 Simple Host Program
@@ -32,18 +33,26 @@ This document describes the Linux kernel Makefiles.
=== 6 Architecture Makefiles
--- 6.1 Set variables to tweak the build to the architecture
- --- 6.2 Add prerequisites to archprepare:
- --- 6.3 List directories to visit when descending
- --- 6.4 Architecture-specific boot images
- --- 6.5 Building non-kbuild targets
- --- 6.6 Commands useful for building a boot image
- --- 6.7 Custom kbuild commands
- --- 6.8 Preprocessing linker scripts
-
- === 7 Kbuild Variables
- === 8 Makefile language
- === 9 Credits
- === 10 TODO
+ --- 6.2 Add prerequisites to archheaders:
+ --- 6.3 Add prerequisites to archprepare:
+ --- 6.4 List directories to visit when descending
+ --- 6.5 Architecture-specific boot images
+ --- 6.6 Building non-kbuild targets
+ --- 6.7 Commands useful for building a boot image
+ --- 6.8 Custom kbuild commands
+ --- 6.9 Preprocessing linker scripts
+ --- 6.10 Generic header files
+
+ === 7 Kbuild syntax for exported headers
+ --- 7.1 header-y
+ --- 7.2 genhdr-y
+ --- 7.3 destination-y
+ --- 7.4 generic-y
+
+ === 8 Kbuild Variables
+ === 9 Makefile language
+ === 10 Credits
+ === 11 TODO
=== 1 Overview
@@ -161,7 +170,7 @@ more details, with real examples.
#drivers/isdn/i4l/Makefile
# Makefile for the kernel ISDN subsystem and device drivers.
# Each configuration option enables a list of files.
- obj-$(CONFIG_ISDN) += isdn.o
+ obj-$(CONFIG_ISDN_I4L) += isdn.o
obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
--- 3.3 Loadable module goals - obj-m
@@ -180,34 +189,35 @@ more details, with real examples.
Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
If a kernel module is built from several source files, you specify
- that you want to build a module in the same way as above.
-
- Kbuild needs to know which the parts that you want to build your
- module from, so you have to tell it by setting an
- $(<module_name>-objs) variable.
+ that you want to build a module in the same way as above; however,
+ kbuild needs to know which object files you want to build your
+ module from, so you have to tell it by setting a $(<module_name>-y)
+ variable.
Example:
#drivers/isdn/i4l/Makefile
- obj-$(CONFIG_ISDN) += isdn.o
- isdn-objs := isdn_net_lib.o isdn_v110.o isdn_common.o
+ obj-$(CONFIG_ISDN_I4L) += isdn.o
+ isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o
In this example, the module name will be isdn.o. Kbuild will
- compile the objects listed in $(isdn-objs) and then run
+ compile the objects listed in $(isdn-y) and then run
"$(LD) -r" on the list of these files to generate isdn.o.
- Kbuild recognises objects used for composite objects by the suffix
- -objs, and the suffix -y. This allows the Makefiles to use
- the value of a CONFIG_ symbol to determine if an object is part
- of a composite object.
+ Due to kbuild recognizing $(<module_name>-y) for composite objects,
+ you can use the value of a CONFIG_ symbol to optionally include an
+ object file as part of a composite object.
Example:
#fs/ext2/Makefile
- obj-$(CONFIG_EXT2_FS) += ext2.o
- ext2-y := balloc.o bitmap.o
- ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o
+ obj-$(CONFIG_EXT2_FS) += ext2.o
+ ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \
+ namei.o super.o symlink.o
+ ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \
+ xattr_trusted.o
- In this example, xattr.o is only part of the composite object
- ext2.o if $(CONFIG_EXT2_FS_XATTR) evaluates to 'y'.
+ In this example, xattr.o, xattr_user.o and xattr_trusted.o are only
+ part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)
+ evaluates to 'y'.
Note: Of course, when you are building objects into the kernel,
the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
@@ -237,13 +247,13 @@ more details, with real examples.
may contain both a built-in.o and a lib.a file.
Example:
- #arch/i386/lib/Makefile
- lib-y := checksum.o delay.o
+ #arch/x86/lib/Makefile
+ lib-y := delay.o
- This will create a library lib.a based on checksum.o and delay.o.
- For kbuild to actually recognize that there is a lib.a being built,
- the directory shall be listed in libs-y.
- See also "6.3 List directories to visit when descending".
+ This will create a library lib.a based on delay.o. For kbuild to
+ actually recognize that there is a lib.a being built, the directory
+ shall be listed in libs-y.
+ See also "6.4 List directories to visit when descending".
Use of lib-y is normally restricted to lib/ and arch/*/lib.
@@ -277,38 +287,45 @@ more details, with real examples.
--- 3.7 Compilation flags
ccflags-y, asflags-y and ldflags-y
- The three flags listed above applies only to the kbuild makefile
- where they are assigned. They are used for all the normal
- cc, as and ld invocation happenign during a recursive build.
+ These three flags apply only to the kbuild makefile in which they
+ are assigned. They are used for all the normal cc, as and ld
+ invocations happening during a recursive build.
Note: Flags with the same behaviour were previously named:
EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.
- They are yet supported but their use are deprecated.
+ They are still supported but their usage is deprecated.
- ccflags-y specifies options for compiling C files with $(CC).
+ ccflags-y specifies options for compiling with $(CC).
Example:
- # drivers/sound/emu10k1/Makefile
- ccflags-y += -I$(obj)
- ccflags-$(DEBUG) += -DEMU10K1_DEBUG
-
+ # drivers/acpi/Makefile
+ ccflags-y := -Os
+ ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT
This variable is necessary because the top Makefile owns the
variable $(KBUILD_CFLAGS) and uses it for compilation flags for the
entire tree.
- asflags-y is a similar string for per-directory options
- when compiling assembly language source.
+ asflags-y specifies options for assembling with $(AS).
Example:
- #arch/x86_64/kernel/Makefile
- asflags-y := -traditional
+ #arch/sparc/kernel/Makefile
+ asflags-y := -ansi
+ ldflags-y specifies options for linking with $(LD).
- ldflags-y is a string for per-directory options to $(LD).
+ Example:
+ #arch/cris/boot/compressed/Makefile
+ ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds
+
+ subdir-ccflags-y, subdir-asflags-y
+ The two flags listed above are similar to ccflags-y and asflags-y.
+ The difference is that the subdir- variants have effect for the kbuild
+ file where they are present and all subdirectories.
+ Options specified using subdir-* are added to the commandline before
+ the options specified using the non-subdir variants.
Example:
- #arch/m68k/fpsp040/Makefile
- ldflags-y := -x
+ subdir-ccflags-y := -Werror
CFLAGS_$@, AFLAGS_$@
@@ -323,18 +340,18 @@ more details, with real examples.
CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF
CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
-DGDTH_STATISTICS
- CFLAGS_seagate.o = -DARBITRATE -DPARITY -DSEAGATE_USE_ASM
- These three lines specify compilation flags for aha152x.o,
- gdth.o, and seagate.o
+ These two lines specify compilation flags for aha152x.o and gdth.o.
$(AFLAGS_$@) is a similar feature for source files in assembly
languages.
Example:
# arch/arm/kernel/Makefile
- AFLAGS_head-armv.o := -DTEXTADDR=$(TEXTADDR) -traditional
- AFLAGS_head-armo.o := -DTEXTADDR=$(TEXTADDR) -traditional
+ AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
+ AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
+ AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
+
--- 3.9 Dependency tracking
@@ -419,14 +436,14 @@ more details, with real examples.
The second argument is optional, and if supplied will be used
if first argument is not supported.
- ld-option
- ld-option is used to check if $(CC) when used to link object files
+ cc-ldoption
+ cc-ldoption is used to check if $(CC) when used to link object files
supports the given option. An optional second option may be
specified if first option are not supported.
Example:
- #arch/i386/kernel/Makefile
- vsyscall-flags += $(call ld-option, -Wl$(comma)--hash-style=sysv)
+ #arch/x86/kernel/Makefile
+ vsyscall-flags += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
In the above example, vsyscall-flags will be assigned the option
-Wl$(comma)--hash-style=sysv if it is supported by $(CC).
@@ -444,7 +461,7 @@ more details, with real examples.
supported to use an optional second option.
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
In the above example, cflags-y will be assigned the option
@@ -485,6 +502,18 @@ more details, with real examples.
gcc >= 3.00. For gcc < 3.00, -malign-functions=4 is used.
Note: cc-option-align uses KBUILD_CFLAGS for $(CC) options
+ cc-disable-warning
+ cc-disable-warning checks if gcc supports a given warning and returns
+ the commandline switch to disable it. This special function is needed,
+ because gcc 4.4 and later accept any unknown -Wno-* option and only
+ warn about it if there is another warning in the source file.
+
+ Example:
+ KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
+
+ In the above example, -Wno-unused-but-set-variable will be added to
+ KBUILD_CFLAGS only if gcc really accepts it.
+
cc-version
cc-version returns a numerical version of the $(CC) compiler version.
The format is <major><minor> where both are two digits. So for example
@@ -494,7 +523,7 @@ more details, with real examples.
even though the option was accepted by gcc.
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
cflags-y += $(shell \
if [ $(call cc-version) -ge 0300 ] ; then \
echo "-mregparm=3"; fi ;)
@@ -554,6 +583,19 @@ more details, with real examples.
endif
endif
+--- 3.12 $(LD) support functions
+
+ ld-option
+ ld-option is used to check if $(LD) supports the supplied option.
+ ld-option takes two options as arguments.
+ The second argument is an optional option that can be used if the
+ first option is not supported by $(LD).
+
+ Example:
+ #Makefile
+ LDFLAGS_vmlinux += $(call ld-option, -X)
+
+
=== 4 Host Program support
Kbuild supports building executables on the host for use during the
@@ -749,12 +791,19 @@ This will delete the directory debian, including all subdirectories.
Kbuild will assume the directories to be in the same relative path as the
Makefile if no absolute path is specified (path does not start with '/').
+To exclude certain files from make clean, use the $(no-clean-files) variable.
+This is only a special case used in the top level Kbuild file:
+
+ Example:
+ #Kbuild
+ no-clean-files := $(bounds-file) $(offsets-file)
+
Usually kbuild descends down in subdirectories due to "obj-* := dir/",
but in the architecture makefiles where the kbuild infrastructure
is not sufficient this sometimes needs to be explicit.
Example:
- #arch/i386/boot/Makefile
+ #arch/x86/boot/Makefile
subdir- := compressed/
The above assignment instructs kbuild to descend down in the
@@ -764,12 +813,12 @@ To support the clean infrastructure in the Makefiles that builds the
final bootimage there is an optional target named archclean:
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
archclean:
- $(Q)$(MAKE) $(clean)=arch/i386/boot
+ $(Q)$(MAKE) $(clean)=arch/x86/boot
-When "make clean" is executed, make will descend down in arch/i386/boot,
-and clean as usual. The Makefile located in arch/i386/boot/ may use
+When "make clean" is executed, make will descend down in arch/x86/boot,
+and clean as usual. The Makefile located in arch/x86/boot/ may use
the subdir- trick to descend further down.
Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
@@ -834,7 +883,7 @@ When kbuild executes, the following steps are followed (roughly):
LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
LDFLAGS_vmlinux := -e stext
OBJCOPYFLAGS objcopy flags
@@ -872,14 +921,15 @@ When kbuild executes, the following steps are followed (roughly):
Often, the KBUILD_CFLAGS variable depends on the configuration.
Example:
- #arch/i386/Makefile
- cflags-$(CONFIG_M386) += -march=i386
+ #arch/x86/boot/compressed/Makefile
+ cflags-$(CONFIG_X86_32) := -march=i386
+ cflags-$(CONFIG_X86_64) := -mcmodel=small
KBUILD_CFLAGS += $(cflags-y)
Many arch Makefiles dynamically run the target C compiler to
probe supported options:
- #arch/i386/Makefile
+ #arch/x86/Makefile
...
cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\
@@ -893,18 +943,53 @@ When kbuild executes, the following steps are followed (roughly):
The first example utilises the trick that a config option expands
to 'y' when selected.
- CFLAGS_KERNEL $(CC) options specific for built-in
+ KBUILD_AFLAGS_KERNEL $(AS) options specific for built-in
+
+ $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile
+ resident kernel code.
+
+ KBUILD_AFLAGS_MODULE Options for $(AS) when building modules
+
+ $(KBUILD_AFLAGS_MODULE) is used to add arch specific options that
+ are used for $(AS).
+ From commandline AFLAGS_MODULE shall be used (see kbuild.txt).
+
+ KBUILD_CFLAGS_KERNEL $(CC) options specific for built-in
- $(CFLAGS_KERNEL) contains extra C compiler flags used to compile
+ $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile
resident kernel code.
- CFLAGS_MODULE $(CC) options specific for modules
+ KBUILD_CFLAGS_MODULE Options for $(CC) when building modules
- $(CFLAGS_MODULE) contains extra C compiler flags used to compile code
- for loadable kernel modules.
+ $(KBUILD_CFLAGS_MODULE) is used to add arch specific options that
+ are used for $(CC).
+ From commandline CFLAGS_MODULE shall be used (see kbuild.txt).
+ KBUILD_LDFLAGS_MODULE Options for $(LD) when linking modules
---- 6.2 Add prerequisites to archprepare:
+ $(KBUILD_LDFLAGS_MODULE) is used to add arch specific options
+ used when linking modules. This is often a linker script.
+ From commandline LDFLAGS_MODULE shall be used (see kbuild.txt).
+
+ KBUILD_ARFLAGS Options for $(AR) when creating archives
+
+ $(KBUILD_ARFLAGS) set by the top level Makefile to "D" (deterministic
+ mode) if this option is supported by $(AR).
+
+--- 6.2 Add prerequisites to archheaders:
+
+ The archheaders: rule is used to generate header files that
+ may be installed into user space by "make header_install" or
+ "make headers_install_all". In order to support
+ "make headers_install_all", this target has to be able to run
+ on an unconfigured tree, or a tree configured for another
+ architecture.
+
+ It is run before "make archprepare" when run on the
+ architecture itself.
+
+
+--- 6.3 Add prerequisites to archprepare:
The archprepare: rule is used to list prerequisites that need to be
built before starting to descend down in the subdirectories.
@@ -920,7 +1005,7 @@ When kbuild executes, the following steps are followed (roughly):
generating offset header files.
---- 6.3 List directories to visit when descending
+--- 6.4 List directories to visit when descending
An arch Makefile cooperates with the top Makefile to define variables
which specify how to build the vmlinux file. Note that there is no
@@ -949,7 +1034,7 @@ When kbuild executes, the following steps are followed (roughly):
drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
---- 6.4 Architecture-specific boot images
+--- 6.5 Architecture-specific boot images
An arch Makefile specifies goals that take the vmlinux file, compress
it, wrap it in bootstrapping code, and copy the resulting files
@@ -968,8 +1053,8 @@ When kbuild executes, the following steps are followed (roughly):
into the arch/$(ARCH)/boot/Makefile.
Example:
- #arch/i386/Makefile
- boot := arch/i386/boot
+ #arch/x86/Makefile
+ boot := arch/x86/boot
bzImage: vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
@@ -981,7 +1066,7 @@ When kbuild executes, the following steps are followed (roughly):
To support this, $(archhelp) must be defined.
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
define archhelp
echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
endif
@@ -995,12 +1080,12 @@ When kbuild executes, the following steps are followed (roughly):
from vmlinux.
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
all: bzImage
When "make" is executed without arguments, bzImage will be built.
---- 6.5 Building non-kbuild targets
+--- 6.6 Building non-kbuild targets
extra-y
@@ -1013,14 +1098,14 @@ When kbuild executes, the following steps are followed (roughly):
2) kbuild knows what files to delete during "make clean"
Example:
- #arch/i386/kernel/Makefile
+ #arch/x86/kernel/Makefile
extra-y := head.o init_task.o
In this example, extra-y is used to list object files that
shall be built, but shall not be linked as part of built-in.o.
---- 6.6 Commands useful for building a boot image
+--- 6.7 Commands useful for building a boot image
Kbuild provides a few macros that are useful when building a
boot image.
@@ -1042,7 +1127,7 @@ When kbuild executes, the following steps are followed (roughly):
always be built.
Assignments to $(targets) are without $(obj)/ prefix.
if_changed may be used in conjunction with custom commands as
- defined in 6.7 "Custom kbuild commands".
+ defined in 6.8 "Custom kbuild commands".
Note: It is a typical mistake to forget the FORCE prerequisite.
Another common pitfall is that whitespace is sometimes
@@ -1063,7 +1148,7 @@ When kbuild executes, the following steps are followed (roughly):
Compress target. Use maximum compression to compress target.
Example:
- #arch/i386/boot/Makefile
+ #arch/x86/boot/Makefile
LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
@@ -1085,8 +1170,47 @@ When kbuild executes, the following steps are followed (roughly):
resulting in the target file being recompiled for no
obvious reason.
+ dtc
+ Create flattened device tree blob object suitable for linking
+ into vmlinux. Device tree blobs linked into vmlinux are placed
+ in an init section in the image. Platform code *must* copy the
+ blob to non-init memory prior to calling unflatten_device_tree().
+
+ To use this command, simply add *.dtb into obj-y or targets, or make
+ some other target depend on %.dtb
---- 6.7 Custom kbuild commands
+ A central rule exists to create $(obj)/%.dtb from $(src)/%.dts;
+ architecture Makefiles do no need to explicitly write out that rule.
+
+ Example:
+ targets += $(dtb-y)
+ clean-files += *.dtb
+ DTC_FLAGS ?= -p 1024
+
+ dtc_cpp
+ This is just like dtc as describe above, except that the C pre-
+ processor is invoked upon the .dtsp file before compiling the result
+ with dtc.
+
+ In order for build dependencies to work, all files compiled using
+ dtc_cpp must use the C pre-processor's #include functionality and not
+ dtc's /include/ functionality.
+
+ Using the C pre-processor allows use of #define to create named
+ constants. In turn, the #defines will typically appear in a header
+ file, which may be shared with regular C code. Since the dtc language
+ represents a data structure rather than code in C syntax, similar
+ restrictions are placed on a header file included by a device tree
+ file as for a header file included by an assembly language file.
+ In particular, the C pre-processor is passed -x assembler-with-cpp,
+ which sets macro __ASSEMBLY__. __DTS__ is also set. These allow header
+ files to restrict their content to that compatible with device tree
+ source.
+
+ A central rule exists to create $(obj)/%.dtb from $(src)/%.dtsp;
+ architecture Makefiles do no need to explicitly write out that rule.
+
+--- 6.8 Custom kbuild commands
When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
of a command is normally displayed.
@@ -1108,12 +1232,12 @@ When kbuild executes, the following steps are followed (roughly):
When updating the $(obj)/bzImage target, the line
- BUILD arch/i386/boot/bzImage
+ BUILD arch/x86/boot/bzImage
will be displayed with "make KBUILD_VERBOSE=0".
---- 6.8 Preprocessing linker scripts
+--- 6.9 Preprocessing linker scripts
When the vmlinux image is built, the linker script
arch/$(ARCH)/kernel/vmlinux.lds is used.
@@ -1122,7 +1246,7 @@ When kbuild executes, the following steps are followed (roughly):
kbuild knows .lds files and includes a rule *lds.S -> *lds.
Example:
- #arch/i386/kernel/Makefile
+ #arch/x86/kernel/Makefile
always := vmlinux.lds
#Makefile
@@ -1143,8 +1267,98 @@ When kbuild executes, the following steps are followed (roughly):
The kbuild infrastructure for *lds file are used in several
architecture-specific files.
+--- 6.10 Generic header files
+
+ The directory include/asm-generic contains the header files
+ that may be shared between individual architectures.
+ The recommended approach how to use a generic header file is
+ to list the file in the Kbuild file.
+ See "7.4 generic-y" for further info on syntax etc.
+
+=== 7 Kbuild syntax for exported headers
+
+The kernel include a set of headers that is exported to userspace.
+Many headers can be exported as-is but other headers require a
+minimal pre-processing before they are ready for user-space.
+The pre-processing does:
+- drop kernel specific annotations
+- drop include of compiler.h
+- drop all sections that are kernel internal (guarded by ifdef __KERNEL__)
+
+Each relevant directory contains a file name "Kbuild" which specifies the
+headers to be exported.
+See subsequent chapter for the syntax of the Kbuild file.
+
+ --- 7.1 header-y
+
+ header-y specify header files to be exported.
+
+ Example:
+ #include/linux/Kbuild
+ header-y += usb/
+ header-y += aio_abi.h
+
+ The convention is to list one file per line and
+ preferably in alphabetic order.
+
+ header-y also specify which subdirectories to visit.
+ A subdirectory is identified by a trailing '/' which
+ can be seen in the example above for the usb subdirectory.
+
+ Subdirectories are visited before their parent directories.
+
+ --- 7.2 genhdr-y
+
+ genhdr-y specifies generated files to be exported.
+ Generated files are special as they need to be looked
+ up in another directory when doing 'make O=...' builds.
+
+ Example:
+ #include/linux/Kbuild
+ genhdr-y += version.h
+
+ --- 7.3 destination-y
+
+ When an architecture have a set of exported headers that needs to be
+ exported to a different directory destination-y is used.
+ destination-y specify the destination directory for all exported
+ headers in the file where it is present.
+
+ Example:
+ #arch/xtensa/platforms/s6105/include/platform/Kbuild
+ destination-y := include/linux
+
+ In the example above all exported headers in the Kbuild file
+ will be located in the directory "include/linux" when exported.
+
+ --- 7.4 generic-y
+
+ If an architecture uses a verbatim copy of a header from
+ include/asm-generic then this is listed in the file
+ arch/$(ARCH)/include/asm/Kbuild like this:
+
+ Example:
+ #arch/x86/include/asm/Kbuild
+ generic-y += termios.h
+ generic-y += rtc.h
+
+ During the prepare phase of the build a wrapper include
+ file is generated in the directory:
+
+ arch/$(ARCH)/include/generated/asm
+
+ When a header is exported where the architecture uses
+ the generic header a similar wrapper is generated as part
+ of the set of exported headers in the directory:
+
+ usr/include/asm
+
+ The generated wrapper will in both cases look like the following:
+
+ Example: termios.h
+ #include <asm-generic/termios.h>
-=== 7 Kbuild Variables
+=== 8 Kbuild Variables
The top Makefile exports the following variables:
@@ -1203,10 +1417,11 @@ The top Makefile exports the following variables:
If this variable is specified, will cause modules to be stripped
after they are installed. If INSTALL_MOD_STRIP is '1', then the
default option --strip-debug will be used. Otherwise,
- INSTALL_MOD_STRIP will used as the option(s) to the strip command.
+ INSTALL_MOD_STRIP value will be used as the option(s) to the strip
+ command.
-=== 8 Makefile language
+=== 9 Makefile language
The kernel Makefiles are designed to be run with GNU Make. The Makefiles
use only the documented features of GNU Make, but they do use many
@@ -1225,14 +1440,14 @@ time the left-hand side is used.
There are some cases where "=" is appropriate. Usually, though, ":="
is the right choice.
-=== 9 Credits
+=== 10 Credits
Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
Updates by Sam Ravnborg <sam@ravnborg.org>
Language QA by Jan Engelhardt <jengelh@gmx.de>
-=== 10 TODO
+=== 11 TODO
- Describe how kbuild supports shipped files with _shipped.
- Generating offset header files.