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-rw-r--r--Documentation/kbuild/makefiles.txt143
1 files changed, 91 insertions, 52 deletions
diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt
index 47435e56c5d..c600e2f44a6 100644
--- a/Documentation/kbuild/makefiles.txt
+++ b/Documentation/kbuild/makefiles.txt
@@ -33,18 +33,19 @@ This document describes the Linux kernel Makefiles.
=== 6 Architecture Makefiles
--- 6.1 Set variables to tweak the build to the architecture
- --- 6.2 Add prerequisites to archprepare:
- --- 6.3 List directories to visit when descending
- --- 6.4 Architecture-specific boot images
- --- 6.5 Building non-kbuild targets
- --- 6.6 Commands useful for building a boot image
- --- 6.7 Custom kbuild commands
- --- 6.8 Preprocessing linker scripts
- --- 6.9 Generic header files
+ --- 6.2 Add prerequisites to archheaders:
+ --- 6.3 Add prerequisites to archprepare:
+ --- 6.4 List directories to visit when descending
+ --- 6.5 Architecture-specific boot images
+ --- 6.6 Building non-kbuild targets
+ --- 6.7 Commands useful for building a boot image
+ --- 6.8 Custom kbuild commands
+ --- 6.9 Preprocessing linker scripts
+ --- 6.10 Generic header files
=== 7 Kbuild syntax for exported headers
--- 7.1 header-y
- --- 7.2 objhdr-y
+ --- 7.2 genhdr-y
--- 7.3 destination-y
--- 7.4 generic-y
@@ -252,7 +253,7 @@ more details, with real examples.
This will create a library lib.a based on delay.o. For kbuild to
actually recognize that there is a lib.a being built, the directory
shall be listed in libs-y.
- See also "6.3 List directories to visit when descending".
+ See also "6.4 List directories to visit when descending".
Use of lib-y is normally restricted to lib/ and arch/*/lib.
@@ -441,7 +442,7 @@ more details, with real examples.
specified if first option are not supported.
Example:
- #arch/i386/kernel/Makefile
+ #arch/x86/kernel/Makefile
vsyscall-flags += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
In the above example, vsyscall-flags will be assigned the option
@@ -460,7 +461,7 @@ more details, with real examples.
supported to use an optional second option.
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
In the above example, cflags-y will be assigned the option
@@ -522,7 +523,7 @@ more details, with real examples.
even though the option was accepted by gcc.
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
cflags-y += $(shell \
if [ $(call cc-version) -ge 0300 ] ; then \
echo "-mregparm=3"; fi ;)
@@ -592,7 +593,7 @@ more details, with real examples.
Example:
#Makefile
- LDFLAGS_vmlinux += $(call really-ld-option, -X)
+ LDFLAGS_vmlinux += $(call ld-option, -X)
=== 4 Host Program support
@@ -802,7 +803,7 @@ but in the architecture makefiles where the kbuild infrastructure
is not sufficient this sometimes needs to be explicit.
Example:
- #arch/i386/boot/Makefile
+ #arch/x86/boot/Makefile
subdir- := compressed/
The above assignment instructs kbuild to descend down in the
@@ -812,12 +813,12 @@ To support the clean infrastructure in the Makefiles that builds the
final bootimage there is an optional target named archclean:
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
archclean:
- $(Q)$(MAKE) $(clean)=arch/i386/boot
+ $(Q)$(MAKE) $(clean)=arch/x86/boot
-When "make clean" is executed, make will descend down in arch/i386/boot,
-and clean as usual. The Makefile located in arch/i386/boot/ may use
+When "make clean" is executed, make will descend down in arch/x86/boot,
+and clean as usual. The Makefile located in arch/x86/boot/ may use
the subdir- trick to descend further down.
Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
@@ -882,7 +883,7 @@ When kbuild executes, the following steps are followed (roughly):
LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
LDFLAGS_vmlinux := -e stext
OBJCOPYFLAGS objcopy flags
@@ -920,14 +921,15 @@ When kbuild executes, the following steps are followed (roughly):
Often, the KBUILD_CFLAGS variable depends on the configuration.
Example:
- #arch/i386/Makefile
- cflags-$(CONFIG_M386) += -march=i386
+ #arch/x86/boot/compressed/Makefile
+ cflags-$(CONFIG_X86_32) := -march=i386
+ cflags-$(CONFIG_X86_64) := -mcmodel=small
KBUILD_CFLAGS += $(cflags-y)
Many arch Makefiles dynamically run the target C compiler to
probe supported options:
- #arch/i386/Makefile
+ #arch/x86/Makefile
...
cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\
@@ -974,7 +976,20 @@ When kbuild executes, the following steps are followed (roughly):
$(KBUILD_ARFLAGS) set by the top level Makefile to "D" (deterministic
mode) if this option is supported by $(AR).
---- 6.2 Add prerequisites to archprepare:
+--- 6.2 Add prerequisites to archheaders:
+
+ The archheaders: rule is used to generate header files that
+ may be installed into user space by "make header_install" or
+ "make headers_install_all". In order to support
+ "make headers_install_all", this target has to be able to run
+ on an unconfigured tree, or a tree configured for another
+ architecture.
+
+ It is run before "make archprepare" when run on the
+ architecture itself.
+
+
+--- 6.3 Add prerequisites to archprepare:
The archprepare: rule is used to list prerequisites that need to be
built before starting to descend down in the subdirectories.
@@ -990,7 +1005,7 @@ When kbuild executes, the following steps are followed (roughly):
generating offset header files.
---- 6.3 List directories to visit when descending
+--- 6.4 List directories to visit when descending
An arch Makefile cooperates with the top Makefile to define variables
which specify how to build the vmlinux file. Note that there is no
@@ -1019,7 +1034,7 @@ When kbuild executes, the following steps are followed (roughly):
drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
---- 6.4 Architecture-specific boot images
+--- 6.5 Architecture-specific boot images
An arch Makefile specifies goals that take the vmlinux file, compress
it, wrap it in bootstrapping code, and copy the resulting files
@@ -1038,8 +1053,8 @@ When kbuild executes, the following steps are followed (roughly):
into the arch/$(ARCH)/boot/Makefile.
Example:
- #arch/i386/Makefile
- boot := arch/i386/boot
+ #arch/x86/Makefile
+ boot := arch/x86/boot
bzImage: vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
@@ -1051,7 +1066,7 @@ When kbuild executes, the following steps are followed (roughly):
To support this, $(archhelp) must be defined.
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
define archhelp
echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
endif
@@ -1065,12 +1080,12 @@ When kbuild executes, the following steps are followed (roughly):
from vmlinux.
Example:
- #arch/i386/Makefile
+ #arch/x86/Makefile
all: bzImage
When "make" is executed without arguments, bzImage will be built.
---- 6.5 Building non-kbuild targets
+--- 6.6 Building non-kbuild targets
extra-y
@@ -1083,14 +1098,14 @@ When kbuild executes, the following steps are followed (roughly):
2) kbuild knows what files to delete during "make clean"
Example:
- #arch/i386/kernel/Makefile
+ #arch/x86/kernel/Makefile
extra-y := head.o init_task.o
In this example, extra-y is used to list object files that
shall be built, but shall not be linked as part of built-in.o.
---- 6.6 Commands useful for building a boot image
+--- 6.7 Commands useful for building a boot image
Kbuild provides a few macros that are useful when building a
boot image.
@@ -1112,7 +1127,7 @@ When kbuild executes, the following steps are followed (roughly):
always be built.
Assignments to $(targets) are without $(obj)/ prefix.
if_changed may be used in conjunction with custom commands as
- defined in 6.7 "Custom kbuild commands".
+ defined in 6.8 "Custom kbuild commands".
Note: It is a typical mistake to forget the FORCE prerequisite.
Another common pitfall is that whitespace is sometimes
@@ -1133,7 +1148,7 @@ When kbuild executes, the following steps are followed (roughly):
Compress target. Use maximum compression to compress target.
Example:
- #arch/i386/boot/Makefile
+ #arch/x86/boot/Makefile
LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
@@ -1156,22 +1171,46 @@ When kbuild executes, the following steps are followed (roughly):
obvious reason.
dtc
- Create flattend device tree blob object suitable for linking
+ Create flattened device tree blob object suitable for linking
into vmlinux. Device tree blobs linked into vmlinux are placed
in an init section in the image. Platform code *must* copy the
blob to non-init memory prior to calling unflatten_device_tree().
- Example:
- #arch/x86/platform/ce4100/Makefile
- clean-files := *dtb.S
-
- DTC_FLAGS := -p 1024
- obj-y += foo.dtb.o
+ To use this command, simply add *.dtb into obj-y or targets, or make
+ some other target depend on %.dtb
- $(obj)/%.dtb: $(src)/%.dts
- $(call cmd,dtc)
+ A central rule exists to create $(obj)/%.dtb from $(src)/%.dts;
+ architecture Makefiles do no need to explicitly write out that rule.
---- 6.7 Custom kbuild commands
+ Example:
+ targets += $(dtb-y)
+ clean-files += *.dtb
+ DTC_FLAGS ?= -p 1024
+
+ dtc_cpp
+ This is just like dtc as describe above, except that the C pre-
+ processor is invoked upon the .dtsp file before compiling the result
+ with dtc.
+
+ In order for build dependencies to work, all files compiled using
+ dtc_cpp must use the C pre-processor's #include functionality and not
+ dtc's /include/ functionality.
+
+ Using the C pre-processor allows use of #define to create named
+ constants. In turn, the #defines will typically appear in a header
+ file, which may be shared with regular C code. Since the dtc language
+ represents a data structure rather than code in C syntax, similar
+ restrictions are placed on a header file included by a device tree
+ file as for a header file included by an assembly language file.
+ In particular, the C pre-processor is passed -x assembler-with-cpp,
+ which sets macro __ASSEMBLY__. __DTS__ is also set. These allow header
+ files to restrict their content to that compatible with device tree
+ source.
+
+ A central rule exists to create $(obj)/%.dtb from $(src)/%.dtsp;
+ architecture Makefiles do no need to explicitly write out that rule.
+
+--- 6.8 Custom kbuild commands
When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
of a command is normally displayed.
@@ -1193,12 +1232,12 @@ When kbuild executes, the following steps are followed (roughly):
When updating the $(obj)/bzImage target, the line
- BUILD arch/i386/boot/bzImage
+ BUILD arch/x86/boot/bzImage
will be displayed with "make KBUILD_VERBOSE=0".
---- 6.8 Preprocessing linker scripts
+--- 6.9 Preprocessing linker scripts
When the vmlinux image is built, the linker script
arch/$(ARCH)/kernel/vmlinux.lds is used.
@@ -1207,7 +1246,7 @@ When kbuild executes, the following steps are followed (roughly):
kbuild knows .lds files and includes a rule *lds.S -> *lds.
Example:
- #arch/i386/kernel/Makefile
+ #arch/x86/kernel/Makefile
always := vmlinux.lds
#Makefile
@@ -1228,7 +1267,7 @@ When kbuild executes, the following steps are followed (roughly):
The kbuild infrastructure for *lds file are used in several
architecture-specific files.
---- 6.9 Generic header files
+--- 6.10 Generic header files
The directory include/asm-generic contains the header files
that may be shared between individual architectures.
@@ -1268,15 +1307,15 @@ See subsequent chapter for the syntax of the Kbuild file.
Subdirectories are visited before their parent directories.
- --- 7.2 objhdr-y
+ --- 7.2 genhdr-y
- objhdr-y specifies generated files to be exported.
+ genhdr-y specifies generated files to be exported.
Generated files are special as they need to be looked
up in another directory when doing 'make O=...' builds.
Example:
#include/linux/Kbuild
- objhdr-y += version.h
+ genhdr-y += version.h
--- 7.3 destination-y