diff options
| author | Stéphane Marchesin <marcheu@chromium.org> | 2014-05-22 20:32:46 -0700 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-06-09 12:02:31 +0200 |
| commit | ccb8b12c4b72a5034a1e04efb68fe9a4682c1de0 (patch) | |
| tree | 61c16862d2e9539a59ee7533cd5405ef98060423 /tools/perf/scripts/python/futex-contention.py | |
| parent | 1b0c7b48409c7faf241813bbf24588f3d676208f (diff) | |
drm/tegra: sor - Remove pixel clock rounding
The code currently rounds up the clock to the next MHZ, which is
rounding up a 69.5MHz clock to 70MHz on my machine. This in turn
prevents the display from syncing. Removing this rounding fixes eDP
for me.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/futex-contention.py')
0 files changed, 0 insertions, 0 deletions