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| author | Boris BREZILLON <boris.brezillon@free-electrons.com> | 2014-04-22 15:12:34 +0200 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-05-07 18:27:52 +0200 |
| commit | 4753219dd3df5cc069336ff419c06c2a1e84ca5d (patch) | |
| tree | 4d3a6f2c55f3f0c5c9f2d7bf0f847cb9f1a61796 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 4d735e548cdf6e8d92849a6dac2b4d5a9d2145f3 (diff) | |
ARM: at91/dt: move sama5d3 SoC to the new main/slow clk model
Replace the old main and clk definitions (fixed rate clk) by the new main and
slow clk subtree definition (ck = mux(rc_osc, osc)).
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions