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authorDavid Woodhouse <David.Woodhouse@intel.com>2010-06-15 10:57:57 +0100
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-09 15:55:37 -0700
commit400036c2e53672323a7dd743146017995ffecb27 (patch)
tree0ae1e27cee7908ca947e8a86fde3cc684927e485 /net/lapb/lapb_subr.c
parente281433b151dad34ac1556adc5d276e4cf077b43 (diff)
intel-iommu: Force-disable IOMMU for iGFX on broken Cantiga revisions.
commit 2d9e667efdfb4e986074d98e7d9a424003c7c43b upstream. Certain revisions of this chipset appear to be broken. There is a shadow GTT which mirrors the real GTT but contains pre-translated physical addresses, for performance reasons. When a GTT update happens, the translations are done once and the resulting physical addresses written back to the shadow GTT. Except sometimes, the physical address is actually written back to the _real_ GTT, not the shadow GTT. Thus we start to see faults when that physical address is fed through translation again. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'net/lapb/lapb_subr.c')
0 files changed, 0 insertions, 0 deletions