diff options
| author | Vincent Minet <vincent@vincent-minet.net> | 2014-07-05 01:51:33 +0200 |
|---|---|---|
| committer | Jiri Slaby <jslaby@suse.cz> | 2014-07-18 15:51:24 +0200 |
| commit | 07c07190d1632a504f6f1e504e784651986d16fd (patch) | |
| tree | 214ff02d718bb3d6ed63f615c5d4713495b48aed /lib/cpu-notifier-error-inject.c | |
| parent | 86def8656e3133d68f91cbccd30e74deea9edb7c (diff) | |
intel_pstate: Set CPU number before accessing MSRs
commit 179e8471673ce0249cd4ecda796008f7757e5bad upstream.
Ensure that cpu->cpu is set before writing MSR_IA32_PERF_CTL during CPU
initialization. Otherwise only cpu0 has its P-state set and all other
cores are left with their values unchanged.
In most cases, this is not too serious because the P-states will be set
correctly when the timer function is run. But when the default governor
is set to performance, the per-CPU current_pstate stays the same forever
and no attempts are made to write the MSRs again.
Signed-off-by: Vincent Minet <vincent@vincent-minet.net>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'lib/cpu-notifier-error-inject.c')
0 files changed, 0 insertions, 0 deletions