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authorMatthew Leach <matthew.leach@arm.com>2012-09-11 17:56:57 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-10-02 10:30:08 -0700
commitdca2dd18c62e3b90cb71534e0a715d246ce7196d (patch)
tree4cfcbca9466bbc0314b372eaa11ac0d11adb1410 /include/trace/events
parent9f8a301630c67302cab77da0c4cb06272a95459d (diff)
ARM: 7532/1: decompressor: reset SCTLR.TRE for VMSA ARMv7 cores
commit e1e5b7e4251c7538ca08c2c5545b0c2fbd8a6635 upstream. This patch zeroes the SCTLR.TRE bit prior to setting the mapping as cacheable for ARMv7 cores in the decompressor, ensuring that the memory region attributes are obtained from the C and B bits, not from the page tables. Cc: Nicolas Pitre <nico@fluxnic.net> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Matthew Leach <matthew.leach@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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