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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-20 21:14:00 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-20 21:14:00 -0700 |
| commit | d13ff0559fea73f237a01669887d2c10e11d7662 (patch) | |
| tree | 427d40cc8b1a89cd4344a8aed539fa75f0cfa5da /include/asm-mips/bitops.h | |
| parent | f076ab8d048f152b968bb1c6313fed88abb037fe (diff) | |
| parent | cb7f39d2bc5a20615d016dd86fca0fd233c13b5d (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (21 commits)
[MIPS] Remove unused maltasmp.h.
[MIPS] Remove unused saa9730_uart.h.
[MIPS] Rename MIPS sys_pipe syscall entry point to something MIPS-specific.
[MIPS] 32-bit compat: Delete unused sys_truncate64 and sys_ftruncate64.
[MIPS] TXx9: Fix some sparse warnings
[MIPS] TXx9: Add 64-bit support
[MIPS] TXx9: Cleanups for 64-bit support
[MIPS] Cobalt: Fix I/O port resource range
[MIPS] don't leak setup_early_printk() in userspace header
[MIPS] Remove include/asm-mips/mips-boards/sead{,int}.h
[MIPS] Remove asm-mips/mips-boards/atlas{,int}.h
[MIPS] mips/sgi-ip22/ip28-berr.c: fix the build
[MIPS] TXx9: Miscellaneous build fixes
[MIPS] Routerboard 532: Support for base system
[MIPS] IP32: Use common SGI button driver
[MIPS] IP22: Use common SGI button driver
[MIPS] IP22, IP28: Fix merge bug
[MIPS] Tinker with constraints in <asm/atomic.h> to fix build error.
[MIPS] Add missing prototypes to asm/page.h
[MIPS] Fix missing prototypes in asm/fpu.h
...
Diffstat (limited to 'include/asm-mips/bitops.h')
| -rw-r--r-- | include/asm-mips/bitops.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index 9a7274ba6a0..49df8c4c9d2 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -82,7 +82,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) "2: b 1b \n" " .previous \n" : "=&r" (temp), "=m" (*m) - : "i" (bit), "m" (*m), "r" (~0)); + : "ir" (bit), "m" (*m), "r" (~0)); #endif /* CONFIG_CPU_MIPSR2 */ } else if (cpu_has_llsc) { __asm__ __volatile__( @@ -147,7 +147,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) "2: b 1b \n" " .previous \n" : "=&r" (temp), "=m" (*m) - : "i" (bit), "m" (*m)); + : "ir" (bit), "m" (*m)); #endif /* CONFIG_CPU_MIPSR2 */ } else if (cpu_has_llsc) { __asm__ __volatile__( @@ -428,7 +428,7 @@ static inline int test_and_clear_bit(unsigned long nr, "2: b 1b \n" " .previous \n" : "=&r" (temp), "=m" (*m), "=&r" (res) - : "i" (bit), "m" (*m) + : "ir" (bit), "m" (*m) : "memory"); #endif } else if (cpu_has_llsc) { |