diff options
author | Matthew Wilcox <matthew@wil.cx> | 2006-10-10 08:01:19 -0600 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2006-12-01 14:36:56 -0800 |
commit | 3efe2d84c8d909567c7976a7106114127b8c3470 (patch) | |
tree | 28b93040c032fe5b90bf4fc61fc656eea45832dc /include/asm-ia64/pci.h | |
parent | 368c73d4f689dae0807d0a2aa74c61fd2b9b075f (diff) |
PCI: Use pci_generic_prep_mwi on ia64
The pci_generic_prep_mwi() code does everything that pcibios_prep_mwi()
does on ia64. All we need to do is be sure that pci_cache_line_size
is set appropriately, and we can delete pcibios_prep_mwi().
Using SMP_CACHE_BYTES as the default was wrong on uniprocessor machines
as it is only 8 bytes. The default in the generic code of L1_CACHE_BYTES
is at least as good.
Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Acked-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/asm-ia64/pci.h')
-rw-r--r-- | include/asm-ia64/pci.h | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h index ef616fd4cb1..825eb7d882e 100644 --- a/include/asm-ia64/pci.h +++ b/include/asm-ia64/pci.h @@ -26,16 +26,18 @@ void pcibios_config_init(void); struct pci_dev; /* - * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct correspondence - * between device bus addresses and CPU physical addresses. Platforms with a hardware I/O - * MMU _must_ turn this off to suppress the bounce buffer handling code in the block and - * network device layers. Platforms with separate bus address spaces _must_ turn this off - * and provide a device DMA mapping implementation that takes care of the necessary + * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct + * correspondence between device bus addresses and CPU physical addresses. + * Platforms with a hardware I/O MMU _must_ turn this off to suppress the + * bounce buffer handling code in the block and network device layers. + * Platforms with separate bus address spaces _must_ turn this off and provide + * a device DMA mapping implementation that takes care of the necessary * address translation. * - * For now, the ia64 platforms which may have separate/multiple bus address spaces all - * have I/O MMUs which support the merging of physically discontiguous buffers, so we can - * use that as the sole factor to determine the setting of PCI_DMA_BUS_IS_PHYS. + * For now, the ia64 platforms which may have separate/multiple bus address + * spaces all have I/O MMUs which support the merging of physically + * discontiguous buffers, so we can use that as the sole factor to determine + * the setting of PCI_DMA_BUS_IS_PHYS. */ extern unsigned long ia64_max_iommu_merge_mask; #define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) @@ -52,9 +54,6 @@ pcibios_penalize_isa_irq (int irq, int active) /* We don't do dynamic PCI IRQ allocation */ } -#define HAVE_ARCH_PCI_MWI 1 -extern int pcibios_prep_mwi (struct pci_dev *); - #include <asm-generic/pci-dma-compat.h> /* pci_unmap_{single,page} is not a nop, thus... */ |