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authorChris Wilson <chris@chris-wilson.co.uk>2011-11-08 23:17:34 +0000
committerBen Hutchings <ben@decadent.org.uk>2012-06-10 14:42:01 +0100
commit7a735af2d50190b6c612509c6dcad1b5aa0be828 (patch)
tree4c90527540089e34424211110b16fa5e734703ff /drivers
parentcf0c2375d258e829777ae648500f6a6eeaecce5d (diff)
drm/i915:: Disable FBC on SandyBridge
commit d56d8b28e9247e7e35e02fbb12b12239a2c33ad1 upstream. Enabling FBC is causing the BLT ring to run between 10-100x slower than normal and frequently lockup. The interim solution is disable FBC once more until we know why. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 41bbe78bb59..472039769dd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1864,7 +1864,7 @@ static void intel_update_fbc(struct drm_device *dev)
if (enable_fbc < 0) {
DRM_DEBUG_KMS("fbc set to per-chip default\n");
enable_fbc = 1;
- if (INTEL_INFO(dev)->gen <= 5)
+ if (INTEL_INFO(dev)->gen <= 6)
enable_fbc = 0;
}
if (!enable_fbc) {