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authorAlek Du <alek.du@intel.com>2010-07-13 10:56:25 +0100
committerMatthew Garrett <mjg@redhat.com>2010-08-03 09:49:09 -0400
commit8950778704cf8483cc5cc0140f557adf0d3f45a5 (patch)
treea08258cb55161df94f724ebfc4c031e45a7004b7 /drivers/platform/x86/Kconfig
parentb52e04216fcd86968c01ad0cfdb249375f19134d (diff)
gpio: Add PMIC GPIO block support
Moorestown has PMIC chip which contains GPIO blocks. The PMIC chip is connected to Langwell by SPI interface. So this GPIO driver will be regarded as SPI GPIO expander though the actual GPIO access is through IPC and SRAM. The SPI master contoller will probe this device driver by parsing SPIB table. Cleaned up for new IPC, GPE removed and some printk and other tidying by Alan Cox. Fixes for points noted by Matthew Garrett Signed-off-by: Alek Du <alek.du@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Matthew Garrett <mjg@redhat.com>
Diffstat (limited to 'drivers/platform/x86/Kconfig')
-rw-r--r--drivers/platform/x86/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 2189565d9e0..ca30e561859 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -540,6 +540,13 @@ config INTEL_SCU_IPC
some embedded Intel x86 platforms. This is not needed for PC-type
machines.
+config GPIO_INTEL_PMIC
+ bool "Intel PMIC GPIO support"
+ depends on INTEL_SCU_IPC && GPIOLIB
+ ---help---
+ Say Y here to support GPIO via the SCU IPC interface
+ on Intel MID platforms.
+
config RAR_REGISTER
bool "Restricted Access Region Register Driver"
depends on PCI && X86_MRST