diff options
| author | Tomasz Figa <t.figa@samsung.com> | 2012-10-11 10:11:17 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2012-10-15 09:10:12 +0200 |
| commit | d3a7b9e3a168df881a0ae3bd0d582f44a5d5aca3 (patch) | |
| tree | a6942be03dde1b58d2fe49f3c246f97ed3739d93 /drivers/pinctrl/pinctrl-samsung.h | |
| parent | 595be7268a85735d229451821b56f122d09d7bdc (diff) | |
pinctrl: samsung: Use one GPIO chip per pin bank
This patch modifies the pinctrl-samsung driver to register one GPIO chip
per pin bank, instead of a single chip for all pin banks of the
controller.
It simplifies GPIO accesses a lot (constant time instead of looping
through the list of banks to find the right one) and should have a good
effect on performance of any bit-banging driver.
In addition it allows to reference GPIO pins by a phandle to the bank
node and a local pin offset inside of the bank (similar to previous
gpiolib driver), which is more clear and readable than using indices
relative to the whole pin controller.
Example:
device {
/* ... */
gpios = <&gpk0 4 0>;
/* ... */
};
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-samsung.h')
| -rw-r--r-- | drivers/pinctrl/pinctrl-samsung.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/pinctrl/pinctrl-samsung.h b/drivers/pinctrl/pinctrl-samsung.h index e56be22302c..dac40ffd5e6 100644 --- a/drivers/pinctrl/pinctrl-samsung.h +++ b/drivers/pinctrl/pinctrl-samsung.h @@ -23,6 +23,8 @@ #include <linux/pinctrl/consumer.h> #include <linux/pinctrl/machine.h> +#include <linux/gpio.h> + /* register offsets within a pin bank */ #define DAT_REG 0x4 #define PUD_REG 0x8 @@ -113,6 +115,8 @@ struct samsung_pinctrl_drv_data; * @of_node: OF node of the bank. * @drvdata: link to controller driver data * @irq_domain: IRQ domain of the bank. + * @gpio_chip: GPIO chip of the bank. + * @grange: linux gpio pin range supported by this bank. */ struct samsung_pin_bank { u32 pctl_offset; @@ -129,6 +133,8 @@ struct samsung_pin_bank { struct device_node *of_node; struct samsung_pinctrl_drv_data *drvdata; struct irq_domain *irq_domain; + struct gpio_chip gpio_chip; + struct pinctrl_gpio_range grange; }; /** @@ -186,8 +192,6 @@ struct samsung_pin_ctrl { * @nr_groups: number of such pin groups. * @pmx_functions: list of pin functions available to the driver. * @nr_function: number of such pin functions. - * @gc: gpio_chip instance registered with gpiolib. - * @grange: linux gpio pin range supported by this controller. */ struct samsung_pinctrl_drv_data { void __iomem *virt_base; @@ -204,9 +208,6 @@ struct samsung_pinctrl_drv_data { unsigned int nr_functions; struct irq_domain *wkup_irqd; - - struct gpio_chip *gc; - struct pinctrl_gpio_range grange; }; /** |