diff options
| author | H. Peter Anvin <hpa@zytor.com> | 2010-02-22 16:20:34 -0800 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2010-02-22 16:20:34 -0800 |
| commit | d02e30c31c57683a66ed68a1bcff900ca78f6d56 (patch) | |
| tree | c3ce99a00061bcc1199b50fa838147d876c56717 /drivers/pci/pcie/aspm.c | |
| parent | 0fdc7a8022c3eaff6b5ee27ffb9e913e5e58d8e9 (diff) | |
| parent | aef55d4922e62a0d887e60d87319f3718aec6ced (diff) | |
Merge branch 'x86/irq' into x86/apic
Merge reason:
Conflicts in arch/x86/kernel/apic/io_apic.c
Resolved Conflicts:
arch/x86/kernel/apic/io_apic.c
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'drivers/pci/pcie/aspm.c')
| -rw-r--r-- | drivers/pci/pcie/aspm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 5a01fc7fbf0..be53d98fa38 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -1,6 +1,6 @@ /* * File: drivers/pci/pcie/aspm.c - * Enabling PCIE link L0s/L1 state and Clock Power Management + * Enabling PCIe link L0s/L1 state and Clock Power Management * * Copyright (C) 2007 Intel * Copyright (C) Zhang Yanmin (yanmin.zhang@intel.com) @@ -499,7 +499,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev) int pos; u32 reg32; /* - * Some functions in a slot might not all be PCIE functions, + * Some functions in a slot might not all be PCIe functions, * very strange. Disable ASPM for the whole slot */ list_for_each_entry(child, &pdev->subordinate->devices, bus_list) { |