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| author | Takashi Iwai <tiwai@suse.de> | 2009-03-17 09:28:13 +0100 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2009-03-17 09:28:13 +0100 |
| commit | 37ba1b62836d2440980cf553c49556393b05c6cd (patch) | |
| tree | 3bbd9b76117d484d5a624db1b2b9ec0181c7ff55 /drivers/mmc/core/mmc_ops.c | |
| parent | 1713c0d508fbbb42aa5f90039195e5ac31a50625 (diff) | |
| parent | dde332b660cf0bc2baaba678b52768a0fb6e6da2 (diff) | |
Merge branch 'fix/opl3sa2-suspend' into topic/isa-misc
Diffstat (limited to 'drivers/mmc/core/mmc_ops.c')
| -rw-r--r-- | drivers/mmc/core/mmc_ops.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c index 9c50e6f1c23..34ce2703d29 100644 --- a/drivers/mmc/core/mmc_ops.c +++ b/drivers/mmc/core/mmc_ops.c @@ -248,12 +248,15 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host, sg_init_one(&sg, data_buf, len); - /* - * The spec states that CSR and CID accesses have a timeout - * of 64 clock cycles. - */ - data.timeout_ns = 0; - data.timeout_clks = 64; + if (opcode == MMC_SEND_CSD || opcode == MMC_SEND_CID) { + /* + * The spec states that CSR and CID accesses have a timeout + * of 64 clock cycles. + */ + data.timeout_ns = 0; + data.timeout_clks = 64; + } else + mmc_set_data_timeout(&data, card); mmc_wait_for_req(host, &mrq); |