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| author | Dave Airlie <airlied@redhat.com> | 2013-05-21 09:42:55 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2013-05-21 09:42:55 +1000 |
| commit | cc3e06a57d4314ca0582fcf7d6b56dea5ca11f77 (patch) | |
| tree | 9e873aa6e1fdd4dbb72211ba259462c1262352f9 /drivers/gpu/drm/radeon/sid.h | |
| parent | a3f6902672c9fa3868722ef6ab8a7dd9141def6a (diff) | |
| parent | 2a0f90551a76a626fd6a606877c8635f52f066e6 (diff) | |
Merge branch 'drm-fixes-3.10-sun' of git://people.freedesktop.org/~agd5f/linux into drm-next
This is the pull request for AMD Sun/Hainan support. I've
split it out separately from my regular fixes stream. Hainan
is a new SI asic with no UVD or DCE hardware. The patches are
minimally invasive; basically just pci ids and skipping UVD and
DCE init for this family. Most of the changes to si.c are just
the golden register tables for the family.
* 'drm-fixes-3.10-sun' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon: add Hainan pci ids
drm/radeon: add golden register settings for Hainan (v2)
drm/radeon: sun/hainan chips do not have UVD (v2)
drm/radeon: track which asics have UVD
drm/radeon: radeon-asic updates for Hainan
drm/radeon: fill in ucode loading support for Hainan
drm/radeon: don't touch DCE or VGA regs on Hainan (v3)
drm/radeon: fill in GPU init for Hainan (v2)
drm/radeon: add chip family for Hainan
Diffstat (limited to 'drivers/gpu/drm/radeon/sid.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/sid.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 222877ba6cf..8f2d7d4f9b2 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h @@ -28,6 +28,7 @@ #define TAHITI_GB_ADDR_CONFIG_GOLDEN 0x12011003 #define VERDE_GB_ADDR_CONFIG_GOLDEN 0x12010002 +#define HAINAN_GB_ADDR_CONFIG_GOLDEN 0x02010001 /* discrete uvd clocks */ #define CG_UPLL_FUNC_CNTL 0x634 |