diff options
| author | Dave Airlie <airlied@redhat.com> | 2012-02-23 14:11:53 +0000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2012-02-23 14:11:53 +0000 |
| commit | e5bcf23443740f741df8e5461ccdad0f10d1a75b (patch) | |
| tree | 18867fdd805f1beefd3592bca76f4794bdc094b8 /drivers/gpu/drm/i915/intel_i2c.c | |
| parent | 019d96cb55ade38a4b4a52bba0304e8cd681f30a (diff) | |
| parent | ff5f4b0585620e5c158ecaad84d91c5bf3c5d0a1 (diff) | |
Merge tag 'drm-intel-next-2012-02-16-merge-resolved' of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next
* tag 'drm-intel-next-2012-02-16-merge-resolved' of git://people.freedesktop.org/~danvet/drm-intel: (45 commits)
Revert "drivers/gpu/drm/i915/intel_overlay.c needs seq_file.h"
drm/i915/lvds: Always use the presence pin for LVDS on PCH
drm/i915: Record the position of the request upon error
drm/i915: Record the in-flight requests at the time of a hang
drm/i915: Record the tail at each request and use it to estimate the head
drm/i915: add missing SDVO bits for interlaced modes on ILK
drm/i915: Fix race condition in accessing GMBUS
drm/i915: add a "force-dvi" HDMI audio mode
drm/i915: Don't lock panel registers when downclocking
drm/i915: fix up locking inconsistency around gem_do_init
drm/i915: enable forcewake voodoo also for gen6
drm/i915: fixup seqno allocation logic for lazy_request
drm/i915: outstanding_lazy_request is a u32
drm/i915: check gtfifodbg after possibly failed writes
drm/i915: catch gtfifo errors on forcewake_put
drm/i915: use gtfifodbg
drm/i915: set interlaced bits for TRANSCONF
drm/i915: fixup overlay checks for interlaced modes
drm/i915: allow interlaced mode output on the HDMI connector
drm/i915: allow interlaced mode output on the SDVO connector
...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_i2c.c | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 03573e00471..068617f7256 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -233,11 +233,15 @@ gmbus_xfer(struct i2c_adapter *adapter, struct intel_gmbus, adapter); struct drm_i915_private *dev_priv = adapter->algo_data; - int i, reg_offset; + int i, reg_offset, ret; - if (bus->force_bit) - return intel_i2c_quirk_xfer(dev_priv, + mutex_lock(&dev_priv->gmbus_mutex); + + if (bus->force_bit) { + ret = intel_i2c_quirk_xfer(dev_priv, bus->force_bit, msgs, num); + goto out; + } reg_offset = HAS_PCH_SPLIT(dev_priv->dev) ? PCH_GMBUS0 - GMBUS0 : 0; @@ -321,7 +325,8 @@ done: * start of the next xfer, till then let it sleep. */ I915_WRITE(GMBUS0 + reg_offset, 0); - return i; + ret = i; + goto out; timeout: DRM_INFO("GMBUS timed out, falling back to bit banging on pin %d [%s]\n", @@ -331,9 +336,12 @@ timeout: /* Hardware may not support GMBUS over these pins? Try GPIO bitbanging instead. */ bus->force_bit = intel_gpio_create(dev_priv, bus->reg0 & 0xff); if (!bus->force_bit) - return -ENOMEM; - - return intel_i2c_quirk_xfer(dev_priv, bus->force_bit, msgs, num); + ret = -ENOMEM; + else + ret = intel_i2c_quirk_xfer(dev_priv, bus->force_bit, msgs, num); +out: + mutex_unlock(&dev_priv->gmbus_mutex); + return ret; } static u32 gmbus_func(struct i2c_adapter *adapter) @@ -380,6 +388,8 @@ int intel_setup_gmbus(struct drm_device *dev) if (dev_priv->gmbus == NULL) return -ENOMEM; + mutex_init(&dev_priv->gmbus_mutex); + for (i = 0; i < GMBUS_NUM_PORTS; i++) { struct intel_gmbus *bus = &dev_priv->gmbus[i]; |