diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-03-15 13:49:36 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-03-15 13:49:42 +0000 |
| commit | 695d82fae9160406acb9de204c471248abcc2a9f (patch) | |
| tree | 1a3b3f48e3e0d1783fc75fa50dc77b41a1a88b88 /drivers/gpu/drm/i915/intel_display.c | |
| parent | 74c46469a5f70a29ac961cfaa90a0422f1d09230 (diff) | |
| parent | 1dde9f75b658edcd4fb7e00259206d727702ce61 (diff) | |
Merge tag 'imx25-iomux-ds' of git://git.pengutronix.de/git/imx/linux-2.6 into next/fixes-non-critical
* tag 'imx25-iomux-ds' of git://git.pengutronix.de/git/imx/linux-2.6:
iomux-mx25.h slew rate adjusted for LCD __LD pins
(update to v3.3-rc6)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f425b23e380..f851db7be2c 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4680,8 +4680,17 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane, crtc = intel_get_crtc_for_plane(dev, plane); clock = crtc->mode.clock; + if (!clock) { + *sprite_wm = 0; + return false; + } line_time_us = (sprite_width * 1000) / clock; + if (!line_time_us) { + *sprite_wm = 0; + return false; + } + line_count = (latency_ns / line_time_us + 1000) / 1000; line_size = sprite_width * pixel_size; @@ -6175,7 +6184,7 @@ void intel_crtc_load_lut(struct drm_crtc *crtc) int i; /* The clocks have to be on to load the palette. */ - if (!crtc->enabled) + if (!crtc->enabled || !intel_crtc->active) return; /* use legacy palette for Ironlake */ @@ -6561,7 +6570,7 @@ intel_framebuffer_create_for_mode(struct drm_device *dev, mode_cmd.height = mode->vdisplay; mode_cmd.pitches[0] = intel_framebuffer_pitch_for_width(mode_cmd.width, bpp); - mode_cmd.pixel_format = 0; + mode_cmd.pixel_format = drm_mode_legacy_fb_format(bpp, depth); return intel_framebuffer_create(dev, &mode_cmd, obj); } @@ -8185,7 +8194,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) if (intel_enable_rc6(dev_priv->dev)) rc6_mask = GEN6_RC_CTL_RC6_ENABLE | - (IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0; + ((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0); I915_WRITE(GEN6_RC_CONTROL, rc6_mask | |