diff options
| author | Olof Johansson <olof@lixom.net> | 2012-09-16 18:50:30 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-09-16 18:50:30 -0700 |
| commit | d192f93cfca6a0aedbf10fa548d8bc17b86275d6 (patch) | |
| tree | 357a4106ec49747bd78550a79d68f7b6d1f642a3 /drivers/gpu/drm/i915/i915_gem_execbuffer.c | |
| parent | adcb079f28ec08165897e2450a4a60b219274008 (diff) | |
| parent | d5703bd35a4c76b0717ea51e2e8aabce341828a1 (diff) | |
Merge tag 'tegra-for-3.7-maintainers' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/maintainers
* tag 'tegra-for-3.7-maintainers' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
MAINTAINERS: tegra: remove Olof/Colin, add device tree files
MAINTAINERS: add defconfig file to TEGRA section
+ sync with 3.6-rc4
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_execbuffer.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_execbuffer.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 5af631e788c..ff2819ea081 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -291,6 +291,16 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj, target_i915_obj = to_intel_bo(target_obj); target_offset = target_i915_obj->gtt_offset; + /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and + * pipe_control writes because the gpu doesn't properly redirect them + * through the ppgtt for non_secure batchbuffers. */ + if (unlikely(IS_GEN6(dev) && + reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && + !target_i915_obj->has_global_gtt_mapping)) { + i915_gem_gtt_bind_object(target_i915_obj, + target_i915_obj->cache_level); + } + /* The target buffer should have appeared before us in the * exec_object list, so it should have a GTT space bound by now. */ @@ -399,16 +409,6 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj, io_mapping_unmap_atomic(reloc_page); } - /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and - * pipe_control writes because the gpu doesn't properly redirect them - * through the ppgtt for non_secure batchbuffers. */ - if (unlikely(IS_GEN6(dev) && - reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && - !target_i915_obj->has_global_gtt_mapping)) { - i915_gem_gtt_bind_object(target_i915_obj, - target_i915_obj->cache_level); - } - /* and update the user's relocation entry */ reloc->presumed_offset = target_offset; |