aboutsummaryrefslogtreecommitdiff
path: root/arch/xtensa
diff options
context:
space:
mode:
authorVenki Pallipadi <venkatesh.pallipadi@intel.com>2007-07-16 16:57:38 -0400
committerWilly Tarreau <w@1wt.eu>2007-08-25 17:24:12 +0200
commit78534eed45a917b1a1a933915eb5e742b400649f (patch)
treeef0cf36ae609d2a4ce533ab1d59a23f1e3147335 /arch/xtensa
parent8cea2c72a013b0c34faeb4d32a0037dd4b2261b3 (diff)
[PATCH] acpi-cpufreq: Proper ReadModifyWrite of PERF_CTL MSR
[CPUFREQ] acpi-cpufreq: Proper ReadModifyWrite of PERF_CTL MSR During recent acpi-cpufreq changes, writing to PERF_CTL msr changed from RMW of entire 64 bit to RMW of low 32 bit and clearing of upper 32 bit. Fix it back to do a proper RMW of the MSR. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Dave Jones <davej@redhat.com> Cc: Chuck Ebbert <cebbert@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Willy Tarreau <w@1wt.eu>
Diffstat (limited to 'arch/xtensa')
0 files changed, 0 insertions, 0 deletions