diff options
author | Olof Johansson <olof@lixom.net> | 2012-03-07 14:52:43 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2012-03-07 14:53:14 -0800 |
commit | 591e7afd2e686394912d65a6faeb933b76b26b5d (patch) | |
tree | 5e992381e6d9456d6293d16ad1c2ed36efcb7bd3 /arch/x86/kernel/cpu/perf_event_amd.c | |
parent | ff0ea1ee058e3906502452eba60fd220ece4401d (diff) | |
parent | c9f46a850a07dcf45ee195b958593fae1b78c221 (diff) |
Merge branch 'maintainers' of git://gitorious.org/linux-davinci/linux-davinci into next/maintainers
* 'maintainers' of git://gitorious.org/linux-davinci/linux-davinci: (2 commits)
MAINTAINERS: add TI DaVinci git tree information
MAINTAINERS: mark TI DaVinci list as "moderated"
(also included an update to 3.3-rc6)
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_amd.c')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_amd.c | 37 |
1 files changed, 35 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c index 0397b23be8e..67250a52430 100644 --- a/arch/x86/kernel/cpu/perf_event_amd.c +++ b/arch/x86/kernel/cpu/perf_event_amd.c @@ -1,4 +1,5 @@ #include <linux/perf_event.h> +#include <linux/export.h> #include <linux/types.h> #include <linux/init.h> #include <linux/slab.h> @@ -357,7 +358,9 @@ static void amd_pmu_cpu_starting(int cpu) struct amd_nb *nb; int i, nb_id; - if (boot_cpu_data.x86_max_cores < 2) + cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY; + + if (boot_cpu_data.x86_max_cores < 2 || boot_cpu_data.x86 == 0x15) return; nb_id = amd_get_nb_id(cpu); @@ -587,9 +590,9 @@ static __initconst const struct x86_pmu amd_pmu_f15h = { .put_event_constraints = amd_put_event_constraints, .cpu_prepare = amd_pmu_cpu_prepare, - .cpu_starting = amd_pmu_cpu_starting, .cpu_dead = amd_pmu_cpu_dead, #endif + .cpu_starting = amd_pmu_cpu_starting, }; __init int amd_pmu_init(void) @@ -621,3 +624,33 @@ __init int amd_pmu_init(void) return 0; } + +void amd_pmu_enable_virt(void) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + + cpuc->perf_ctr_virt_mask = 0; + + /* Reload all events */ + x86_pmu_disable_all(); + x86_pmu_enable_all(0); +} +EXPORT_SYMBOL_GPL(amd_pmu_enable_virt); + +void amd_pmu_disable_virt(void) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + + /* + * We only mask out the Host-only bit so that host-only counting works + * when SVM is disabled. If someone sets up a guest-only counter when + * SVM is disabled the Guest-only bits still gets set and the counter + * will not count anything. + */ + cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY; + + /* Reload all events */ + x86_pmu_disable_all(); + x86_pmu_enable_all(0); +} +EXPORT_SYMBOL_GPL(amd_pmu_disable_virt); |