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authorYong Zhang <yong.zhang@windriver.com>2012-07-19 09:13:53 +0200
committerRalf Baechle <ralf@linux-mips.org>2012-07-19 11:23:44 +0200
commit1bcfecc028686ea32e49b0f4f6e8a665917cb49a (patch)
tree9c6a33234c67ce8065e0a8cf0c2f753b2c26a994 /arch/mips
parent68b6352cdcdaa743b38ca5705601f65ef9bd662f (diff)
MIPS: Octeon: delay enable irq to ->smp_finish()
To prepare for smoothing set_cpu_[active|online]() mess up Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3845/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/cavium-octeon/smp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 4b93048044e..ee1fb9f7f51 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -185,7 +185,6 @@ static void __cpuinit octeon_init_secondary(void)
octeon_init_cvmcount();
octeon_irq_setup_secondary();
- raw_local_irq_enable();
}
/**
@@ -233,6 +232,7 @@ static void octeon_smp_finish(void)
/* to generate the first CPU timer interrupt */
write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);
+ local_irq_enable();
}
/**