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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-18 10:36:37 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-18 10:36:37 -0700 |
| commit | 3c6a279ffccd0c414ecd1d5eb4670ed70072c526 (patch) | |
| tree | 261e352318b779d7643cdcf79bb95a909389531e /arch/mips/kernel/traps.c | |
| parent | 8f05bde9bd6da80365495369738ab869c1f8bcac (diff) | |
| parent | 2792d42fe69e098a6e08ed814f49953b52874805 (diff) | |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle:
"Patching up across the field. The reversion of the two ASID patches
is particularly important as it was breaking many platforms."
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: ralink: use the dwc2 driver for the rt305x USB controller
MIPS: Extract schedule_mfi info from __schedule
MIPS: Fix sibling call handling in get_frame_info
MIPS: MSP71xx: remove inline marking of EXPORT_SYMBOL functions
MIPS: Make virt_to_phys() work for all unmapped addresses.
MIPS: Fix build error for crash_dump.c in 3.10-rc1
MIPS: Xway: Fix clk leak
Revert "MIPS: Allow ASID size to be determined at boot time."
Revert "MIPS: microMIPS: Support dynamic ASID sizing."
Diffstat (limited to 'arch/mips/kernel/traps.c')
| -rw-r--r-- | arch/mips/kernel/traps.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 77cff1f6d05..cb14db3c576 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1656,7 +1656,6 @@ void __cpuinit per_cpu_trap_init(bool is_boot_cpu) unsigned int cpu = smp_processor_id(); unsigned int status_set = ST0_CU0; unsigned int hwrena = cpu_hwrena_impl_bits; - unsigned long asid = 0; #ifdef CONFIG_MIPS_MT_SMTC int secondaryTC = 0; int bootTC = (cpu == 0); @@ -1740,9 +1739,8 @@ void __cpuinit per_cpu_trap_init(bool is_boot_cpu) } #endif /* CONFIG_MIPS_MT_SMTC */ - asid = ASID_FIRST_VERSION; - cpu_data[cpu].asid_cache = asid; - TLBMISS_HANDLER_SETUP(); + if (!cpu_data[cpu].asid_cache) + cpu_data[cpu].asid_cache = ASID_FIRST_VERSION; atomic_inc(&init_mm.mm_count); current->active_mm = &init_mm; |