diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-18 10:36:37 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-18 10:36:37 -0700 |
| commit | 3c6a279ffccd0c414ecd1d5eb4670ed70072c526 (patch) | |
| tree | 261e352318b779d7643cdcf79bb95a909389531e /arch/mips/kernel/smtc.c | |
| parent | 8f05bde9bd6da80365495369738ab869c1f8bcac (diff) | |
| parent | 2792d42fe69e098a6e08ed814f49953b52874805 (diff) | |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle:
"Patching up across the field. The reversion of the two ASID patches
is particularly important as it was breaking many platforms."
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: ralink: use the dwc2 driver for the rt305x USB controller
MIPS: Extract schedule_mfi info from __schedule
MIPS: Fix sibling call handling in get_frame_info
MIPS: MSP71xx: remove inline marking of EXPORT_SYMBOL functions
MIPS: Make virt_to_phys() work for all unmapped addresses.
MIPS: Fix build error for crash_dump.c in 3.10-rc1
MIPS: Xway: Fix clk leak
Revert "MIPS: Allow ASID size to be determined at boot time."
Revert "MIPS: microMIPS: Support dynamic ASID sizing."
Diffstat (limited to 'arch/mips/kernel/smtc.c')
| -rw-r--r-- | arch/mips/kernel/smtc.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 31d22f3121c..7186222dc5b 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -111,7 +111,7 @@ static int vpe0limit; static int ipibuffers; static int nostlb; static int asidmask; -unsigned int smtc_asid_mask = 0xff; +unsigned long smtc_asid_mask = 0xff; static int __init vpe0tcs(char *str) { @@ -1395,7 +1395,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) asid = asid_cache(cpu); do { - if (!ASID_MASK(ASID_INC(asid))) { + if (!((asid += ASID_INC) & ASID_MASK) ) { if (cpu_has_vtag_icache) flush_icache_all(); /* Traverse all online CPUs (hack requires contiguous range) */ @@ -1414,7 +1414,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) mips_ihb(); } tcstat = read_tc_c0_tcstatus(); - smtc_live_asid[tlb][ASID_MASK(tcstat)] |= (asiduse)(0x1 << i); + smtc_live_asid[tlb][(tcstat & ASID_MASK)] |= (asiduse)(0x1 << i); if (!prevhalt) write_tc_c0_tchalt(0); } @@ -1423,7 +1423,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) asid = ASID_FIRST_VERSION; local_flush_tlb_all(); /* start new asid cycle */ } - } while (smtc_live_asid[tlb][ASID_MASK(asid)]); + } while (smtc_live_asid[tlb][(asid & ASID_MASK)]); /* * SMTC shares the TLB within VPEs and possibly across all VPEs. @@ -1461,7 +1461,7 @@ void smtc_flush_tlb_asid(unsigned long asid) tlb_read(); ehb(); ehi = read_c0_entryhi(); - if (ASID_MASK(ehi) == asid) { + if ((ehi & ASID_MASK) == asid) { /* * Invalidate only entries with specified ASID, * makiing sure all entries differ. |