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author | H. Peter Anvin <hpa@zytor.com> | 2010-02-22 16:20:34 -0800 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2010-02-22 16:20:34 -0800 |
commit | d02e30c31c57683a66ed68a1bcff900ca78f6d56 (patch) | |
tree | c3ce99a00061bcc1199b50fa838147d876c56717 /arch/mips/include/asm/cpu-info.h | |
parent | 0fdc7a8022c3eaff6b5ee27ffb9e913e5e58d8e9 (diff) | |
parent | aef55d4922e62a0d887e60d87319f3718aec6ced (diff) |
Merge branch 'x86/irq' into x86/apic
Merge reason:
Conflicts in arch/x86/kernel/apic/io_apic.c
Resolved Conflicts:
arch/x86/kernel/apic/io_apic.c
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/mips/include/asm/cpu-info.h')
-rw-r--r-- | arch/mips/include/asm/cpu-info.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index 126044308de..b39def3f6e0 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h @@ -58,6 +58,9 @@ struct cpuinfo_mips { struct cache_desc tcache; /* Tertiary/split secondary cache */ int srsets; /* Shadow register sets */ int core; /* physical core number */ +#ifdef CONFIG_64BIT + int vmbits; /* Virtual memory size in bits */ +#endif #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) /* * In the MIPS MT "SMTC" model, each TC is considered |